US3045192A - Transistor oscillators - Google Patents

Description

July 17, 1962 E. M. JONES TRANSISTOR OSCILLATORS Filed Dec. 51, 1956 2 Sheets-Sheet 1 D.6.50URCE REPET/T/VE PULSE saunas MASTER 05C PULSE f SOURCE a pup r25 BASE W01. r405 Wi F/G. 5

F/6f6 e a H b m ,NVENTOR 0 Edward M. Jones Z BY H67 AGENT Unite States atent I 3,045,192 Patented July 17, 1962 free 3,045,192 TRANSISTOR OSCELATORS Edward M. Jones, Cincinnati, Ohio, assignor to The Baldwin Piano Company, Cincinnati, Ohio, a corporation of Ohio Filed Dec. 31, 1956, Ser. No. 631,681 1 Claim. (Cl. 331 111) This invention relates to relaxation oscillators employing semi-conductive devices, such as transistors, and in particular relates to systems for locking the frequencies of a plurality of such oscillators in integral relationships. Such systems of cascaded oscillators have heretofore been proposed for counting, scaling and frequency division purposes. A preferred embodiment of my invention is particularly useful and advantageous in providing octavelyrelated, complex oscillations in electronic musical instruments of the type wherein twelve cascaded generators are used, each one supplying all the octavely-related notes of the same nomenclature.

A principal object of my invention is to provide a transistor frequency divider circuit having a common base connection to all the transistors such as will permit the use of multiple transistor units having several pairs of emitter and collector electrodes contacting the same crystal or having several crystals mounted on a common heatdissipating base.

An important object of my invention is toprovid'e a divider circuit for semi-conductive devices in which synchronizing pulses of stable amplitude are produced.

Another object, which is particularly important in electronicmusical instrument usage, is to provide a divider circuit in which the semi-conductive devices operate at low duty cycle so as to reduce the amount of subharmonic modulation fed back from one stage to a previous stage.

A further object is to provide a frequency divider cir-' cuit, particularly for electronic musical instruments, wherein the DC component is eliminated from the output oscillations of the circuit.

A further object of my invention is to provide an inexpensive and simple relaxation oscillator circuit having a minimum number of electrical components.

These and other objects of the invention which will be set forth hereinafter, or will be apparent to one skilled in the art upon reading these specifications, are accomplished by those constructions and arrangements of parts of which certain exemplary embodiments will now be described. Reference is made to the accompanying drawings wherein:

FIGURE 1 is a circuit diagram of a frequency divider circuit in accordance with the present invention;

FIGURE 2 is a circuit diagram of a modification of the system of FIGURE 1;

FIGURE 3 is a circuit diagram illustrating how a pair of complementary junction transistors may be connected for use in the practice of my invention;

FIGURE 4 illustrates how connections may be made to a particular type of semi-conductive device for use with my invention;

FIGURE 5 illustrates another embodiment of a semiconductive device which may be employed in the practice of my invention;

FIGURE 6 illustrates the manner in which connections may be made to still another type of semi-conductive device for use with my invention; I

FIGURE 7 illustrates certain wave forms, useful in explaining the operation of the system;

FIGURE 8 is aview in transverse section taken through FIGURE 9, and enlarged to indicate details of construction; and

FIGURE 9 is a functional diagram of a system according to the invention, utilizing one specific but exemplary form of common base multiple contact sets transistor.

Referring now more particularly to the accompanying drawings, FIGURE 1 illustrates a circuit diagram of two similar stages 1 and 2 of a cascaded frequency divider. A repetitive pulse source 5, of positively going pulses, may be a master oscillator of any suitabletype, producing short duration pulses periodically. One example of a suitable source is disclosed in a copending patent application in the name of Jones and Winder, filed December 31, 1956, Serial No. 631,682, now Patent No. 2,902,655, and entitled Transistor Oscillators, another example being disclosed in the United States patent to Jones, No. 2,555,038. One terminal of the source 5 may be connected to a common return path 7, while the other terminal supplies periodic pulses through a resistor R1 to a common junction point 9, to which is also connected one end of a resistor R2, the other end of which is connected to a common path 11' from one terminal of a source 13 of direct current. The other terminal of the DC. source 13 may be connected to the common return path 7 The common path 11 is maintained at approximately 20 v. negative with respect to common return path 7, by source 13.

A capacitor C1 and a resistor R3 may be connected .in series between the junction point 9 and the common return path 7. The common juncture 15 between the capacitor C1 and the resistor R3 has a connection to an emitter terminal a of a semi-conductive device, T1, which may be, for example, a point-contact transistor, the terminal c being the base connection to a block of semiconductor material, and the terminal b identifying the socalled collector electrode. In accordance with the teachings of my invention the base connection c is made directly to the common path 7, while the collector electrode is connected through a resistor R4 to the common junction point 9. The series of elements as described constitutes stage 1 of the frequency divider and, as will be explained hereinafter, there will occur at the junction point 17 a series of periodic pulses, the repetition frequency of which will be an integral submultiple of the frequency supplied to the stage 1 from the repetitive pulse source 5. A saw-tooth wave-form at the divided frequency will also appear across the resistor R3, which, as will also be explained hereinafter, may be used as a signal take-oil point, if desired.

Stage 2 of the frequency divider of FIGURE 1 is similar to stage 1 except that the capacitor C2. will be selected of a higher capacity than the corresponding capacitor C1 of stage 1, so that the time constant of the stage will be lower than that of the preceding stage by' an amount which is of the order of the dividing ratio be tween adjacent stages. Corresponding resistors and junction points are similarly designated in the two stages, except for the prime indication. For example, Rl'of stage 2 corresponds to R1 of stage 1. i T

The operation of the stage 1 is in certain respects simi lar to that of other transistor relaxation oscillator circuits currently known in the art (see RCA Review, March 1949, pp. 14-16, and December 1949, pp. 463-471), one principal improvement residing in the employment of the collector resistance R4, which is made unusually low for the purpose of discharging the capacitor C1 in a very short time, so that train E, of very narrow pulses p1, p2 (see FIGURE 7a) is produced. at the collector b. These voltage pulses have amplitudes nearly equal to thesupply voltage E of the source 13 and is transferred to the second stage through the resistor R1. If the transistor T2 is out off, the trigger pulses appearing at circuit points 9 and 15' are very nearly equal to the value expected from the voltage dividing effect If the trigger pulse brings the emitter voltage 123 (see FIGURE 7b) of transistor T2 positive with respect to the base voltage, the collector current will start increasing, causing an increased voltage rise in R2, which is transmitted through capacitor C2 to further increase emitter voltage 23. The emitter now has a low impedance, and a current gain of only slightly greater than one is required in the transistor to cause a rapid regenerative increase in emitter and collector current. The collector current then immediately increases to a value which provides suf'ricient potential across resistance R4 to lower the magnitude of negative collector potential (see FIGURE 70) sufficiently to bring the current gain back down to unity. The resistor R4 is chosen to limit collector current, assuring that the collector current is safely under the allowable peak current for the point-contact transistor employed. Since the emitter voltage e3 never goes very positive, the potential e2 (FIGURE 7d) is initially quite negative due to the charge on the capacitor C2. However, due to the relatively heavy emitter current, the capacitor C2 is quickly discharged so that e2 rises quickly (point B of FIGURE 7d) toward ground potential. During this discharge, the collector voltage 64 remains approximately constant (see FIGURE 70) at several volts negative, but the current in R2 becomes appreciable, causing emitter current to drop considerably below the magnitude of collector current.

The capacitor C2 is eventually discharged to a point where the emitter current is sufficiently low relative to the collector current that the collector voltage, e4, begins to become more negative. This implies a negative impedance relationship between collector voltage and collector current. The emitter voltage e3 is still changing very slowly, so the emitter impedance is very small and the capacitor C2 prevents any sudden change in e2. When the magnitude of this negative impedance at the collector exceeds the value of R4, the decrease in voltage drops across R4 fails to keep up with the increase in magnitude of negative collector Voltage e4 demanded by the transistor to maintain a given decrease in magnitudes of collector and emitter current. The transistor T2 thus finds itself in a situation such that, at a given collector voltage, its collector current has a greater magnitude than the emitter current would normally allow. The

- collector current therefore rapidly decreases, making the collector more negative, but the emitter current decreases also, making an even greater discrepancy between the actual collector currents and the collector current than would be predicted from the values of emitter current and collector voltage alone.

When the magnitude of the collector current has decreased sufiiciently, the emitter current becomes negative and the emitter voltage e3 rapidly goes negative. Equilibrium is reached when the emitter voltage magnitude equals the magnitude of the supply voltage minus the voltage drop in resistance R2 due to the residual emitter and collector currents and minus the charge on the capacitor C2. This charge on the capacitor is essentially the same as occurs when negative impedance appears at the collector, since the entire process involved in the transistor reaching equilibrium in a cut-off condition requires only a fraction of a microsecond, compared with the 2 to 50 microseconds period during which heavy emitter current was discharging the capacitor C2.

After the transistor T2 has been cut off, the capacitor C2 charges at a more leisurely rate (see point A of FIG- URE 7b) through resistor R3 and the back-resistance of the emitter. To render the charging rate less dependent upon the characteristics of the transistor T2, it is desirable to make resistor R3 several times less than the emitter back resistance. The time constant of this circuit is arranged to be such that when the first trigger pulse p1 from stage 1 arrives, the emitter voltage e3 is still too of the resistors R1 and R2.

negative for the trigger pulse to have any effect, but when the second trigger pulse p2 arrives, the emitter is driven positive enough for the regenerative action in the tran sistor hereinabove described to take place. The stage thus acts as a frequency divider, having a division factor 2.

Since a saw-tooth signal having the same wave shape as the emitter voltage e3 appears across the resistor R3, a portion of the resistor R3 may be used as a signal take-oil point.

The transistor circuit may have such characteristics, with such suitable selection of components as will be suggested hereinafter in connection with the embodiment of FIGURE 2, that in the absence of trigger pulses, it will not function as a self-sustaining relaxation oscillator. This is because, when the emitter current is zero, which is approximately the final condition towards which the capacitor C2 discharges the impedance of the emitter of the transistor is still fairly high and comparable to R2, and therefore if the transistor has some current gain, a sufiiciently large proportion of the collector current increment is shunted through R2 that regenerative feedback to the emitter cannot occur. This implies that the transistor will fire only upon application of a trigger pulse. It is not necessary to the operation of the system, however, that a stage be inoperative until triggered, so long as the frequency of oscillation is lower than the trigger frequency. Under the latter circumstances, the trigger will cause the stage to be synchronized at the divided frequency.

Reference is now made to FIGURE 2, wherein is illustrated an embodiment of my invention preferred for use as a tone-wave generator in an electronic musical instrument. The master oscillator 19 is preferably a transistorized oscillator having a pulse-shape output, as disclosed in the above-mentioned copending application of Jones and Winder, with a connection to a common return. The output of the oscillator 19 is passed through a resistor R5 to a junction point 21. From this junction point proceed connections to a resistor R7 and directly to the collector electrode 12 of a semi-conductive device T3, which may be, as pointed out in connection with the embodiment of my invention illustrated in FIGURE 1 of the drawings, a point-contact transistor or other suitable semi-conductive device, or combination of such devices, various embodiments of which are illustrated in FIG- URES 3, 4, 5 and 6. The various other connections to the semi-conductive device T3 are made as shown, resistors R5, R6 and R7 serving purposes similar to those of resistors R1, R2, and R4, respectively, of FIGURE 1. The capacitor C3 of FIGURE 2 is similar in function to capacitor C1 of FIGURE 1, while a resistive divider comprising resistors R8 and R9 has been substituted for the resistor R3 of FIGURE 1. The common junction between resistor R8 and R9 may be utilized as a signal take-off point to signal output terminals 23 and 25, the latter being connected to a common return point. A source of negative DC. potential may be connected to the terminal 27, while a source of low positive potential E1 may be connected to the terminal 29, the point of zero potential at the source being connected to a common return path, indicated as a ground connection. A second stage may be connected to the first stage With corresponding resistors in the several stages identified by corresponding reference symbols, prime designations indicating resistors of the second stage. The capacitor C4 will have a value substantially different from the capacitor of C3, depending upon the dividing ratio of the circuit, but other circuit components may be identical in the several stages.

The operation of the circuit of FIGURE 2 is similar to that of FIGURE 1, the differences being (1) that the resistor R5 is connected to the collector end of the resistor R7 rather than to the emitter end, and (2) that the resistor divider comprising R8 and R9 replaces resistance R3 of FIGURE 1. The former difference in the circuit simplifies the wiring of the circuit in an actual chassis arrangement, while the latter makes it feasible readily to derive a signal for use in a musical instrument. As will be seen in the chart below, which provides an exemplary set of values for the components of FIGURE 2, the terminal 29 and the bus to which it and the base electrodes of the transistors T3 and T4 are connected, is maintained slightly positive relative to a reference value or ground, so that the signal is devoid of a D.C. component. This is particularly desirable if the signals are to be applied directlyto the key switches of an electronic musical instrument. As will be seen in the chart below, the values of R9 and R9 are relatively low (of the order of 1000 to 2000 ohms), so that the key switches of the musical instrument do not unduly load down the circuit or affect the time constants of the transistor circuits.

Only a small trigger is required for the operation of circuits in accordance with my invention. With resistors R6 and R5 of the order of 1,000 ohms and 12,000 ohms,

respectively, the actual trigger amplitude equals 1.2 volts,

which is several times the minimum trigger required for the operation of the circuit.

The circuits of FIGURES 1 and 2 have been illustrated and described as employing point-contact transistors. However, it is within the scope of my invention to employ other semi-conductive devices, or combinations of these, of such type as to provide current gain between a circuit through the terminals :1 and c and a circuit between the terminals b and c. For example, in FIGURE 3, are illustrated two complementary types of junction transistors, connected with the collector electrode of a PNP junction transistor connected to the base of an NPN junction transistor, the [2 connection being taken from the emitter of the latter transistor.

Another embodiment of a semi-conductor device which may be used in the practice of my invention is illustrated in FIGURE 4, wherein is shown an NPN junction transistor, the a or emitter-equivalent connection being an electrode connected to the N-type section of the transistor, as a point-contact or as a Welded or fused P-type contact. The NPN transistor of this embodiment should be of a relatively low resistivity material.

In FIGURE 5 is illustrated a further embodiment of a semi-conductive device suitable for use with the circuits of FIGURES 1 or 2, in the form of a PNPN-type transistor, which is per se Well known in the art, and wherein the a, b and connections are made as shown. This transistor is also preferably of a relatively low resistivity material.

The embodiment of FIGURE 6 is still another variation of a semi-conductive device suitable for use with my invention, the type of unit being of the type described to the art by Shockley and sometimes called the so-called npn I type of semi-conductive device. This device would require a DC. source, if employed in the system of FIG- URE I, having opposite polarity.

Following is an exemplary set of values of the components and voltages, of a system in accordance With that illustrated in FIGURE 2:

R5, R 12,000 ohms. R6, R6 1,000 ohms. R7, R7 100 ohms.

R8 17,500 ohms R9 1,350 ohms. R8 21,300 ohms. R9 1,600 ohms. C3 .0082 mf.

C4 .015 mf.

T3, T4 s W.E. #1768. E1 Plus .27 volt E2 Minus volts.

Trigger voltage (peak to peak) from master oscillator is 1.05 volts.

be obvious to one skilled in the art that integral division ratios greater than 2:1 may be obtained by properselection of components to obtain time constants suitable fo the higher division ratios.

As pointed out above the frequency divider circuit of the present invention is particularly adaptable to multiple transistor units on a common base. The state of the transistor device art has progressed to the point where a transistor of the type illustrated in FIGURES 8 and 9 is feasible. Referring first to FIGURE 8, mounted on a common pedestal 30, which may have a suitable electrical connection C comparable to the base connections of other preceding figures, is a small slab 31, which may be of germanium, silicon or other semi-conductor material suitable for transistor use. In accordance with the teachings of the article by Moll et al. on P-N-P-N transistor switches, in the September 1956 Proceedings of the IRE, pages 1174 to 1182, junctions may be arranged as indicated at 32 and 33 to provide P-N-P-N junction transistor units, which may be distributed around the slab 31 as shown in FIGURE 9. The conductivity types for the various semi-conductor areas of the assembly are indicated in FIGURE 8. For example if the slab material is N-type the area 33 is P-type and the area 32 is P-type, and vice versa, as indicated in parentheses. Suitable connections may be made tothe areas shown by leads a'l, b1, and a2, [22, these units being connectable into the circuits of FIGURES 1 and 2, having corresponding indicia a and b. Interconnecting resistors (not shown), such as R in FIGURE 2, are understood to be provided to couple the various divider circuits together. If the conductivity types indicated in the drawings Within parentheses are employed, the polarity of the DC. source must be reversed, as is well understood.

Referring to FIGURE 9, an exemplary arrangement is shown for connections to a master oscillator 34, which may be of the type referred to hereinabove. Various divider sections such as 35 and 36 may be connected as shown, It will be obvious that for 2:1 frequency dividers an arrangement such as that illustrated in FIGURE 9 will furnish harmonically related frequencies f, f/ 2, f/ 4, and so forth.

Although the particular multiple transistor arrangement illustrated in FIGURES 8 and 9 has been above described, it will be obvious that other and different multiple transistors may be employed. For example, distributed around a common base may be pairs of emitter and collector points contacting the base in the manner conventional for point contact transistors (not shown). The scope of the arrangement is not, accordingly, restricted to any particular type of transistor system employing a common base and multiple sets of contacts, but is common to all such arrangements.

While I have described and illustrated one specific embodiment of my invention, it will be clear that variations of the general arrangement and of the details of construction which are specifically illustrated and described may be restored to without departing from the true spirit and scope of the invention as defined in the appended claim.

What I claim is:

A pulse-repetition-frequency dividing circuit comprising the combination of a semi-conductive device having first, second and third terminals, said device being capable of providing current gain from a circuit through said first and third terminals to a circuit through said second and third terminals, a pulse input network including two input points with a first resistor, a capacitor and a second resistor in series in that order therebetween, the free end of the second resistor being connected to said third terminal, said first terminal being connected to the common juncture between said second resistor and said capacitor, :1 third resistor connected between said second terminal and a second common juncture between said first resistor and said capacitor, a DC. potential source having two terminals, and a fourth resistor having an end connected between said second common juncture and one terminal of said DC. potential source, the other terminal of said D.C. potential source being directlyconnected to said third terminal, whereby a sub-multiple saw-tooth repetition frequency appears across said second resistor, and a submultiple frequency of the same frequency as the sawtooth repetition frequency and having sharp pulses of short time duration relative to the sawtooth duration appear on said second terminal of said semiconductive device.

References Cited in the file of this patent UNITED STATES PATENTS 2,660,624 Bergson Nov. 24, 1953 2,663,800 Herzog Dec. 22, 1953 2,679,594 Fromm May 25, 1954 2,731,567 Sziklai et a1. Jan. 17, 1956 2,769,906 Kidd et a1 Nov. 6, 1956 2,797,327 Kidd June 25, 1957 2,826,695 Gray Mar. 11, 1958 2,874,311 Turnage Feb. 17, 1959

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