[54] MEMORY QUEUE WITH ADJUSTABLE PRIORITY AND CONFLICT DETECTION
[75] Inventors: Mitchell A. Bauman, Circle Pines;
Jerome G. Carlin, Shoreview; Roger
L. Gilbertson, Minneapolis, all of
Minn.
[73] Assignee: Unisys Corporation, Blue Bell, Pa.
[21] Appl. No.: 404,791
[22] Filed: Mar. 15, 1995
[51] Int. CI. G06F 13/18
[52] U.S. CI 395/860; 395/859; 711/151;
711/158
[58] Field of Search 395/478, 485,
395/444, 449, 872, 250, 474, 475, 477, 297, 728, 729, 732, 857; 370/60, 61, 92, 93, 94.1, 95.3, 112, 113; 711/151, 158
[56] References Cited
U.S. PATENT DOCUMENTS
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5,140,682 8/1992 Okura et al 395/457
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5,317,720 5/1994 Stamm et al 711/143
5,432,923 7/1995 Taniguchi et al 395/402
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Primary Examiner—Eddie P. Chan
Assistant Examiner—Hiep T. Nguyen
Attorney, Agent, or Firm—Charles A. Johnson; Mark T.
Starr
[57] ABSTRACT
An improved memory request storage and allocation system using parallel queues to retain different categories of memory requests until they can be acted on by the main memory. Memory requests in the parallel queues are allowed to access the main memory according to a queue priority scheme. The queue priority scheme is based on an adjustable ratio, which determines the rate at which memory requests from one queue are allowed to access the main memory versus memory requests from other queues. Registers for bypassing the adjustable ratio eliminate delays by prohibiting the queue priority circuitry from attempting to retrieve a non-existent memory request from a queue. Conflict detection circuitry maintains proper instruction order in the parallel queue architecture by ensuring that subsequent memory requests, which have the same address as a memory request already in the queue, are placed in the same queue in the order that they were entered into the queue.
25 Claims, 9 Drawing Sheets
