Disclosed is a loadboard that includes a plurality of channel pins that are arranged on the loadboard. The plurality of channel pins are electrically routed on the loadboard to a receptacle that is configured to receive I/O pins of an integrated circuit chip. The loadboard further includes a ...http://www.google.ca/patents/US5841787?utm_source=gb-gplus-sharePatent US5841787 - Memory programming and test circuitry and methods for implementing the same 
