The object is to control an interrupt request to be asserted to a host in all of a prereading mode, a postreading mode, and a both-reading mode. Until the count value of a counter becomes equal to the content of a delay register, the reset state of a flip-flop is held and an IRQ is not asserted to the...http://www.google.ca/patents/US5896540?utm_source=gb-gplus-sharePatent US5896540 - Method and apparatus for controlling data transfer between a host and a peripheral in a pre-reading mode, post-reading mode and both-reading mode
