A trench region 14 is formed in a memory cell P-type well 13. Two NAND-type memory cell units ND1 and ND2 are respectively formed along both side wall portions of this trench region 14. A floating gate FG and a control gate CG in these NAND-type memory cell units ND1 and ND2 are formed self-aligningly...http://www.google.ca/patents/US20010038118?utm_source=gb-gplus-sharePatent US20010038118 - Nonvolatile semiconductor memory and method of manufacturing the same
