The present invention relates to a method for on demand functional verification of a software model of an application specific integrated circuit (ASIC), in a low-level programming language (for example of the HDL type), which separately handles the creation of the model and the debugging of the functional...http://www.google.ca/patents/US20080270103?utm_source=gb-gplus-sharePatent US20080270103 - Method for Functional Verification of an Integrated Circuit Model for constituting a Verification Platform, Equipment Emulator and Verification Platform
