An upgradeable cache circuit is described which automatically routes those control signals necessary to maintain cache coherency in a computer system having a processor (with integrated L1 cache) coupled with main memory by a controller. The cache circuit includes an L2 cache module connector and a high...http://www.google.ca/patents/US6493798?utm_source=gb-gplus-sharePatent US6493798 - Upgradeable cache circuit using high speed multiplexer
