The process provides for the simultaneous N+ type implantation of areas of a semiconductor substrate of type P for the formation of a control gate and of highly doped regions of source and drain, defining a channel region. After oxide growth there is executed the deposition and the definition of a polysilicon...http://www.google.ca/patents/US5307312?utm_source=gb-gplus-sharePatent US5307312 - Process for obtaining an N-channel single polysilicon level EPROM cell and cell obtained with said process
