A memory system including means for verifying the contents of a memory cell contained in a memory array to determine if a shift in the threshold voltage level has occurred. The memory system is placed into a test mode of operation in which an internal program or erase verify operation is executed under...http://www.google.ca/patents/USRE37611?utm_source=gb-gplus-sharePatent USRE37611 - Non-volatile memory system having internal data verification test mode
