A memory management system couples processors to each other and to a main memory. Each processor may have one or more associated caches local to that processor. A system port of the memory management system receives a request from a source processor of the processors to access a block of data from the...http://www.google.ca/patents/US6349366?utm_source=gb-gplus-sharePatent US6349366 - Method and apparatus for developing multiprocessor cache control protocols using a memory management system generating atomic probe commands and system data control response commands
