A method and apparatus for including in a processor instructions for performing horizontal intra-add operations on packed data. One embodiment of the processor is coupled to a memory. The memory has stored therein at least a first packed data. The processor performs operations on data elements in the...http://www.google.ca/patents/US7395302?utm_source=gb-gplus-sharePatent US7395302 - Method and apparatus for performing horizontal addition and subtraction
