WO2015090426A1

WO2015090426A1 - Integrated sensor evaluation circuit and method for operating said circuit

Info

Publication number: WO2015090426A1
Application number: PCT/EP2013/077517
Authority: WO
Inventors: Jens Krüger; Dominik GAUSA
Original assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Priority date: 2013-12-19
Filing date: 2013-12-19
Publication date: 2015-06-25

Abstract

Sensor evaluation device and method for operating said device Integrated sensor evaluation circuit for evaluating a sensor signal (14) received from a sensor (12), having a first connection (28a) for connection to the sensor and a second connection (28b) for connection to the sensor. The integrated sensor evaluation circuit comprises a configuration data memory (16) for storing configuration data which describe signal properties of a plurality of sensor control signals (26a-c). The integrated sensor evaluation circuit also comprises a plurality of signal generators (18) which are connected to the configuration data memory and to the first connection and are designed to each provide a sensor control signal on the basis of a common signal clock (24) and the configuration data. The integrated sensor evaluation circuit also comprises a signal processing block (22) which is connected to the configuration data memory and to the second connection. The signal processing block is designed to receive the sensor signal which is applied to the second connection and is based on the plurality of sensor control signals. The signal processing block is also designed to evaluate the received sensor signal on the basis of the signal clock and the configuration data in order to provide an evaluation result (32).

Description

Integrated sensor evaluation circuit and method of operating the same

description

The invention relates to an integrated sensor evaluation circuit having a plurality of signal generators and a processing block for evaluating sensor signals. The invention further relates to a method of operating the same.

For applications in the field of "Westentaschenlabor", also chip lab or lab-on-chip, an array of optical micro-resonance rings (MRR) on an optical bus is arranged on a chip, as it is known for example from DE 20120182552. The optical spectral signal of all MRR sums up or optical spectral components can be decoupled by MRR In order to be able to assign the individual optical spectral signals to the respective individual sensors (MRR) from the resulting optical spectral mixture, the MRRs are thermally connected to a respective MRR By modulating the frequency of the MRR with a frequency-spectral analysis of the optical signal strength, the individual intensity of the MRR can be measured at each optical spectral step Single sensor, or which Detektionss toff, which is associated with a single sensor, which causes change in the optical signal. Such a method is described, for example, in [1].

The lock-in amplifiers required for such a measuring principle are in principle available on the market, but can usually only generate a reference signal and / or rely on external reference signal generators and can not be synchronized with one another. Synchronization may be required, for example, to measure phase information synchronously at different frequencies. Therefore, only one sensor ring per lock-in amplifier and signal generator can be read out. Therefore, this measuring process has hitherto been carried out by means of complex measuring technology consisting of several signal generators, analog measuring technology and a software for measuring automation and data analysis, as described in [1]. Such a structure is complicated, costly, slow and not applicable for a portable, mobile use of the sensor. Such structures require enormous metrological effort. Several signal generators and analogue measurement technology, such as laser controllers or amplifiers for amplifying signals provided by photo diodes, as well as a software required for measurement automation and data analysis must hitherto be used to lock a frequency and phase measurement with multiple measurement channels -In technology to realize. This technique is unsuitable for portable use. Furthermore, the structures have long calculation times. In simple terms, the structures are too slow by a factor of 10 to ensure real-time measurements, see [1].

US4539518 A describes a one-channel structure of a measuring method. This means a signal generator for generating a test signal and a fast Fourier transformation (Fast Fourier Transformation - FFT) evaluation.

The patent EP2515099 A1 contains a description of an evaluation method of sensor signals and their application. It does not specifically address how this evaluation is performed, but only which signals are generated and which are evaluated.

The publication "Digital Lock-in Algorithm for Biomedical Spectroscopy and Imaging Instruments with Multiple Modulated Sources" (Masciotti, James M. Dept. of Biomed. Eng., Columbia Univ., New York, NY Lasker, TM, Hielscher, AH, Engineering in Medicine and Biology Society, 2006. EMBS Ό6th 28th Annual International Conference of the IEEE) describes an evaluation of multiple signals via lock-in procedures, including signal generation and evaluation with serial evaluation logic.

The publication "Digital field programmable gate array-based lock-in amplifier for high-performance photonics counting applications" (Resteiii, A .; Department of Electronics and Information Technologies, Politecnico di Milano, Piazza Leonardo da Vinci 32, Milano, MI 20133, Italy, Abbiati, R.; Geraci, A. Review of Scientific Instruments (Volume: 76, Issue: 9)) describes the use of FPGA-embedded lock-in photon measurement technology to provide high-cost, high-performance FPGA computing mentioned in this area. It would therefore be desirable to have a concept for the evaluation of sensor signals, which enables a rapid evaluation of the sensor signal with respect to a plurality of sensor drive signals and at the same time enables energy-saving operation. The object of the present invention is therefore to provide a sensor evaluation circuit, so that a sensor signal with respect to several Sensoransteuersignale can be evaluated and to allow the evaluation while maintaining a phase synchronism between the Sensoransteuersignalen and additionally between the sensor signal, which at the same time an energy-efficient operation of Sensorauswerteschal- device is possible.

This object is solved by the subject matter of the independent patent claims.

The essence of the present invention is to have realized that the above object can be achieved by a common signal clock, which is applied to a plurality of signal generators and a signal processing block in an integrated circuit, a phase synchronism of the signal generators with each other and with respect to a signal processing block can allow. Furthermore, an evaluation of the sensor signal with the signal processing block based on configuration data, on which are based also generated by the signal generators Sensoransteuersignale, allow a faster and phase-synchronous evaluation. The device can be miniaturized so that a digital integrated circuit can be realized which can provide results in real time and have low power consumption

According to one embodiment, an integrated sensor evaluation circuit for evaluating a sensor signal received by a sensor comprises a first connection for connection to the sensor and a second connection for connection to the sensor. The integrated sensor evaluation circuit further comprises a configuration data memory, on which configuration data can be stored, a plurality of signal generators and a signal processing block.

The plurality of signal generators and the signal processing block are connected to the configuration data memory. The plurality of signal generators are configured to supply sensor drive signals based on configuration data, the signal characteristics describe multiple Sensoransteuersignale and stored on the configuration data memory to provide.

The signal processing block is connected to the configuration data memory and configured to receive the sensor signal based on the plurality of sensor drive signals and to evaluate the received sensor signal based on the configuration data. The signal processing block is further configured to provide an evaluation result. The plurality of signal generators and the signal processing block are configured to receive a common clock signal, so that a phase synchronism between the plurality of signal generators and the signal processing block can be established.

An advantage of this embodiment is that a common signal clock, which is used to ensure the phase synchronism, a complex wiring between see the signal generators and / or the signal processing block can replace and a phase-synchronous evaluation of the sensor signal is made possible with respect to several Sensoransteuersignale.

According to an alternative embodiment, the integrated sensor evaluation circuit comprises a clock, which is designed to provide the common signal clock.

An advantage of this embodiment is that can be dispensed with an arrangement of an external clock generator and a wiring between the clock generator and the signal evaluation circuit.

According to an alternative embodiment, the signal processing block is configured to emulate the sensor drive signals of the signal generators. An advantage of this embodiment is that providing the configuration data or the signal properties for the signal processing block allows parameterization of Signalansteuersignale, so that can be dispensed with a transfer of Sensoransteuersignale from the signal generators to the signal processing block and a current adjustment of Sensoransteuersignale with the clock , This allows a reduced computational effort and thus a faster, possibly in real time, calculation or provision of the evaluation result. A sensor drive signal For example, it may be sufficiently parameterized by the frequency if an amplitude is standardized and a phase position of the common signal clock is determined.

According to an alternative embodiment, the sensor evaluation circuit has a terminal configured to receive a user input or an external control signal. The sensor evaluation circuit is configured according to the exemplary embodiment to program the plurality of signal generators based on the user input or based on the external control signal or to change the configuration data based on the user input or the external control signal.

It is advantageous in this exemplary embodiment that adaptation or selection of the configuration data with respect to the sensor providing the sensor signal and operation of the integrated sensor evaluation circuit in conjunction with different sensors is made possible by an external control signal or user input.

Alternative embodiments show a sensor system with an integrated sensor evaluation circuit and a sensor which is connected to the evaluation circuit. An advantage of this embodiment is that the integrated sensor evaluation circuit can be tuned to the sensor and the integrated sensor system can be introduced in an environment in which the sensor is to be used. Thus, a wiring effort can be further reduced. According to an alternative embodiment, the sensor of a sensor system comprises a plurality of optical resonators. The sensor drive signals are designed to modulate optical properties in the plurality of signal generators. The sensor evaluation circuit is configured to supply an excitation signal by means of a connection to the sensor, wherein the sensor is configured to drive the plurality of optical resonators with a carrier signal which is based on the excitation signal. The plurality of optical resonators are configured to change the carrier signal based on a sensor parameter and based on one of the plurality of modulation signals. The sensor is configured to provide the sensor signal based on the changed carrier signal. The sensor evaluation circuit is configured to receive the sensor signal at a terminal. An advantage of this embodiment is that the sensor evaluation circuit can be combined with the sensor, so that the sensor system as an integrated lab-on-chip system, possibly with self-sufficient power supply, executable.

Further advantageous embodiments are the subject of the dependent claims.

Preferred embodiments of the present invention will be explained below with reference to the accompanying drawings. Show it:

1 shows a schematic block diagram of an integrated sensor evaluation circuit for evaluating a sensor signal received by a sensor;

FIG. 2 shows a schematic block diagram of a further integrated sensor evaluation circuit which, compared to the integrated sensor evaluation circuit from FIG. 1, has a third connection for connection to a sensor and a drive circuit;

3 is a schematic block diagram of a sensor evaluation circuit having an amplifier circuit; and

4 is a schematic block diagram of a sensor system with the integrated sensor evaluation circuit connected to the sensor.

Before embodiments of the present invention are explained in more detail in detail with reference to the drawings, it is pointed out that identical, functionally identical or equivalent elements, objects and / or structures in the different figures are provided with the same reference numerals, so that shown in different embodiments Description of these elements is interchangeable or can be applied to each other.

FIG. 1 shows a schematic block diagram of an integrated sensor evaluation circuit 10 for evaluating a sensor signal 14 received by a sensor 12. The integrated sensor evaluation circuit 10 comprises a configuration data memory 16, a plurality of signal generators 18 and a signal processing block 22. The plurality of signal generators 18 and the signal processing block 22 are connected to the configuration data memory 16 and configured to operate with a common signal clock 24, ie, to receive a common clock signal with the signal clock 24, so that operations such as generation of signals by the plurality of signal generators 18 or signal processing in the signal processing block 22 are synchronous with the signal clock 24.

Each of the plurality of signal generators 18 is configured to provide, based on configuration data in the configuration data memory 16, sensor drive signals 26a-c configured to drive the sensor 12. The plurality of signal generators 18 are connected to a first terminal 28a of the integrated sensor evaluation circuit 10. Expressed in simple terms, the sensor activation signals 26a-c are applied to the first connection 28a, so that the sensor 12 can be activated by means of the sensor activation signals 26a-c when the sensor 12 is connected to the first connection 28a. The sensor 12 may be, for example, an array of optical micro-resonant rings (MRR) disposed on an optical bus. The sensor drive signals 26a-c may, for example, be modulation signals for a thermal modulation of the MRR of the sensor 12. The sensor signal 14 may, for example, be an output signal which is based on a carrier signal of the sensor 12 which is influenced or modulated by the MRR.

The integrated sensor evaluation circuit 10 includes a second terminal 28b for receiving the sensor signal 14. The configuration data may include parameters of the sensor drive signals 26a-c, such as frequency, Phaseniage and / or an amplitude.

The signal processing block 22 is connected to the second terminal 28 b and configured to evaluate the received sensor signal 14 based on the signal clock 24 and the configuration data of the configuration data memory 16 and to provide an evaluation result 32. The evaluation result 32 may be provided at an output 28e to be received by an external device. Alternatively or additionally, the evaluation result 32 can also be stored in a memory of the integrated sensor evaluation circuit 10. The signal processing block 22 may be configured to evaluate the sensor signal 14 based on a lock-in method and / or a frequency evaluation method such as a Fast Fourier Transformation (FFT). The lock-in method is a phase-sensitive method in which a received signal, such as the sensor signal 14, is correlated with a reference signal. The correlation may comprise a multiplication of the (noisy) sensor signal with the reference signal. A result value of an in-phase multiplication may be a value which corresponds to or can be assigned to an amplitude of the signal component to be amplified by means of the lock-in method in the sensor signal. A result of the lock-in method is dependent on a phase position between the reference signal and the signal to be evaluated.

In the case of a faulty phase position between the sensor signal 14 and the reference signal, in the lock-in method, which evaluate only an amplitude of the sensor signal based on zero crossings in sine or cosine functions (sin (0 °) = 0; cos (90 °) = 0) a faulty measurement result or a faulty value of zero can be obtained. By detecting both components (sine and cosine), such as a real part and an imaginary part of the complex-valued sensor signal 14, this can be reduced or prevented.

If the sensor 12 is a sensor with one or more optical resonance rings, the or one of the optical resonance rings is, for example, designed to decouple a subregion of the wavelength range and to superimpose it as an interference signal on the carrier signal. Depending on a path length of the optical resonator, possibly influenced by thermal modulation, a phase shift between the carrier signal and the interference signal can lead to destructive interference in the subarea. The destructive interference leads to a reduced signal amplitude in the corresponding wavelength range, which can be represented by a negative Gaussian curve. A reduction of the signal amplitude can be detected by the integrated sensor evaluation circuit. A measurement may be referred to as a detection of the sensor signal influenced by the resonant rings over a measurement period.

Comparability of several measurements with each other can be achieved by establishing a phase relationship between the measurements. The phase relationship may, for example, be a constant phase offset of the modulators, ie of the signal generators 18. A single measurement to be linked with others may, for example, be a measurement one or more optical resonance rings at two or more different times. Alternatively or additionally, the measurements may also be measurements of two or more sensors which have a plurality of optical resonance rings or other sensor elements. In other words, a phase measurement or a phase offset which is constant between the measurements, for example from 0 ° or another angle, makes it possible to compare the measurements.

By maintaining the phase information, it can be achieved that a single or a comparatively large number of measurements can be reproduced, since the phase information can provide information about a relationship or dependence between a sensor input signal and the sensor output signal. The sensor input signal may be, for example, an excitation in the form of a carrier signal or a modulation signal for influencing sensor elements. Thus, it can be achieved that an achieved measurement result is independent of a measuring device.

In simple terms, a faulty phase position between the sensor signal 14 and the reference signal of the lock-in method (sensor drive signal) can lead to a faulty measurement result or evaluation result. A joint loading of the plurality of signal generators 18 and the signal processing block 22 with the signal clock 24 allows a correct phase position and thus correct measurement and evaluation results. The reference signal for the lock-in method may, for example, be one of the sensor drive signals 26a-c, a combination of the sensor drive signals 26a-c or the like. The signal processing block 22 may be configured to emulate the sensor drive signals 26a-c of the plurality of signal generators 18 so that the sensor drive signals 26a-c may be present in the signal processing block 22, even if a tap of the sensor drive signals 26a-c is omitted.

The plurality of signal generators 18 may, for example, be implemented in the form of counters or corresponding functions implemented in software which, according to a counter value, signal a signal edge to a value of a logical "0" or a value of a logical "1" (high-low Clock). In this case, an amplitude of the sensor drive signals 26a-c may be normalized to a voltage level of the integrated sensor evaluation circuit 10, such as 1, 3.5, 5, or 7 volts, and only in terms of frequency and / or duty cycle (duty cycle) ) differentiate the pulse width modulation (PWM). These properties can be set in parameterized form, such as in the form of a simple frequency specification, in the configuration data Memory 16 deposited. This allows a reconstruction of the sensor drive signals 26a-c in the signal processing block 22. This allows a reduced utilization of communication buses between signal generators 18 and the signal processing block 22 by eliminating a transmission of the actual Sensoransteu- signal 26a-c to the signal processing block 22nd

An advantage of this embodiment is that an implementation of a plurality of evaluation circuits, such as lock-in amplifiers and ensuring phase synchronization, is made possible in an integrated circuit. Furthermore, it is possible to dispense with the transmission of a reference signal since the operations of individual function blocks, for example of the signal processing block 22 and of the signal generators 18, are based on the common signal clock 24.

The integrated signal evaluation circuit 10 may also be referred to as an electronic front-end for thermal modulation lab-on-chip systems. The integrated sensor evaluation circuit 10 may be implemented as an FPGA or microcontroller, in which the first and / or second terminal 28a or 28b is a pin of the controller or the circuit. Sensor parameters, that is to say parameters which can be detected by the sensor 12, can be, for example, substances or a substance concentration which come into contact with one or more optical resonators of the sensor 12. Alternatively or additionally, the parameters may also be chemical properties or physical properties or optical properties of the substance. If the substance associated with the sensor 12 includes a property or component for which or for which the sensor 12 is sensitive, then a resonant frequency of the optical resonant ring may be altered. In a wavelength range which is influenced by the resonance frequency, a signal amplitude of the carrier signal or in the sensor signal 14 can be reduced based on a phase shift between the carrier signal and the interference of the optical resonant ring in the wavelength range. Based on a modulation, such as a thermal modulation, a shift of the destructive interference, ie a shift of the wavelength range, in the wavelength or frequency range can be detected by the integrated sensor evaluation circuit 10. In other words, a shift in resonance can be measured. Based on the common signal clock 24 and a common connection of the signal generators 18 and the signal processing block 22 with the configuration data memory 16, a modulation response can be detected. In simple terms, the signal processing block can have knowledge of an application of the sensor drive signals 26a-c.

The measurement, d. H. the detection of a modulation reaction can take place in a defined time. The defined time may vary depending on the modulation frequencies, i. H. the frequencies of the sensor drive signals 26a-c, be arbitrary. A detection of the sensor signal 14 can take place over the duration of a defined number of periods of one of the modulation signals, for example the one with the lowest (or middle or highest) frequency. If the lowest modulation frequency is, for example, 20 kHz and a number of 20 periods is detected, the result is a measurement duration of 1 ms. A reduced number of detected periods and / or an increased (eg lowest) frequency of the sensor drive signals 26a-c can lead to a reduced measurement duration. The defined number of detected periods or the time of the resulting period durations may correspond to a minimum (for example, 1-fold) or other multiple of the frequency or period duration of the sensor drive signals 26a-c. Alternatively, the measurement duration can also be determined by a time for acquiring a defined number of measured values, for example 2,048, 4,096, or 8,192, or another number of measured values used, for example, for an FFT. In principle, a number of periods and / or a modulation or measurement frequency can be arbitrary.

The knowledge of the signal processing block 22 via the sensor drive signals 26a-c enables a coordinated control of the light source 42 and the detection of the measured values, so that the sensor 12-1 or substances or materials that are detected by the sensor 12-1 only briefly , are essentially influenced during the measurement. For example, a wavelength λ of the light source 42 can be varied over several measurements. A varying wavelength λ may result in excitation of different resonant rings and / or destructive interference in different wavelength ranges. In other words, a short-term influence on the sensor is made possible during the measurement. A short-term influence on the sensor may be advantageous if materials or substances to be detected by the sensor 12, for example bacteria, are to be influenced only briefly, for example if a lasting influence of bacterial colonies by a thermal modulation is undesirable or disadvantageous for the materials or substances , This allows the reaction of the sensor given Parameters (such as a wavelength λ of the light source 42) are determined in a very short time or the sensor is influenced by the measurement only for a short time. The measuring duration can be arbitrary, ie any short or long. In this case, the, possibly destructive, interference of the micro-resonance rings 38a-d may have a varying phase position with a phase offset. Based on the common signal clock 24, the phase offset can be kept constant and possibly set to zero. Thus, over a number of measurements, a course of the phase position of the micro-resonance rings 38a-d can be detected and provided with the measurement result 32 or derived therefrom. This allows, for example, a representation of a graph representing the course of the sensor signal as a function of the varying phase position. The representation can take place, for example, in an external device which receives the measurement result 32. The representation can take place, for example, in a form A * sin (cp), where A is the amplitude of the sensor signal 14 and φ is the angle of the phase position. The representation can be called a phase curve. This allows a detection of a sign change of the function. Alternatively, any other function may be used. Alternatively or additionally, changes in the amplitude or of the amplitude sign designated as rotation (approximately by 180 °) can also be detected via derivative functions and / or observations of different periods. In other words, the common signal clock 24 allows comparability of different measurements.

FIG. 2 shows a schematic block diagram of an integrated sensor evaluation circuit 20 which, compared to the integrated sensor evaluation circuit from FIG. 1, has a third connection 28c for connection to a sensor 12-1 and a control circuit 34. The drive circuit 34 is connected to the configuration data memory 16 and the third terminal 28c and configured to generate an excitation signal 36 configured to drive the sensor, i. H. enable the sensor to provide an optical signal based on the drive signal 36. The drive circuit 34 may also be referred to as an optical module.

The sensor 12-1 includes a plurality of micro-resonance rings 38a-d. The excitation signal 36 is configured to drive a light source 42, such as a laser or a high power LED, which provides an input signal or carrier signal for an optical bus of the sensor 12-1, and hence the MRR 38a-d. The sensor drive signals 26a-c are modulation signals for the MRR 38a-d for implementing a thermal modulus. lation. The sensor 12-1 further includes a photoelement 44 configured to receive the modulated carrier signal and provide the sensor signal 14-1 in an analog form. The integrated sensor evaluation circuit 20 further comprises an analog-to-digital converter (ADC) 46, which is configured to digitize the analog sensor signal 14-1. The ADC 46 is further configured to receive the common signal clock 24 and to perform the conversion of the sensor signal 14-1 based on the common signal clock 24, so that the digitized sensor signal 14-1 is also present in phase synchronization and from a signal processing block 22-1 can be received.

The integrated sensor evaluation circuit 20 further comprises a result memory 48, which is connected to the signal processing block 22-1 and configured to receive the output value result 32 and to store.

The integrated sensor evaluation circuit 20 further comprises a digital interface 52 and a fourth connection 28 d, which is connected to the interface 52. The interface 52 is further connected to the result memory 48, so that an evaluation result 32 stored in the result memory 48 can be output via the interface 52 and the fourth output 28d. An output evaluation result 32 can be provided, for example, via a user interface (UI) of an external device, such as a computer, a printer, a monitor, or a device for contacting an external memory, such as USB memory.

The sensor evaluation circuit 20 is designed to receive a user input or an external control signal via the fourth terminal 28d and, after a conversion of the external control signal or the user input in the interface 52, the configuration data in the configuration data memory 16 based on the user input or the external control signal to change. A user input or an external control signal may, for example, be a selection of a type or operating state of the sensor 12-1 and input via the user interface 54. Alternatively, the external control signal may also be applied to the fourth port 28d via another device, such as a computer. The sensor drive signals 26a-c may depend on the type or condition of the sensor 12-1. For example, a frequency of one or more sensor output signals 26a-c of materials or substances to be detected by the sensor 12-1 so that the frequency or PWM duty cycle of the sensor drive signals 26a-c may depend on the user input. The state can be, for example, a type, sum or combination of materials whose presence is to be checked with the sensor 12-1. The state may thus describe an operation or operating state of the sensor 12-1, which is influenced by materials or substances or a combination thereof, with which the sensor 12-1 is brought into connection.

An advantage of this embodiment is that the integrated Sensorauswerteschal- device 20 can be adapted to different modes without this leading to increased wiring complexity. For example, the sensor 12-1 can be changed, the change can be communicated via the user interface 54 of the integrated sensor evaluation circuit 20, and an operation thereof can be continued. Alternatively, it is also conceivable that a type or a type of the sensor 12-1 be carried out by an automated query or an automatically generated message (signal). If the sensor signal 14-1 is, for example, a digital signal, then a type, a type or an operating state of the sensor 12-1 can be integrated into the digital messages so that an adaptation of the configuration data in the configuration data memory 16 takes place via the sensor signal 14-1 can.

In other words, Fig. 2 shows an integration of a measurement setup in a highly integrated electronic front-end, which generates the signals that are necessary for the measurement and automatically performs a correlation with the signal to be measured. As a result, the required measured values of the individual sensors, ie the MRR, can be read out directly. This can be done by a parallel generation of Sensoransteuersignale 26a-c by means of digital logic. In contrast to conventional lock-in amplifiers, instead of an analog reference signal, a digital signal, for example a square-wave signal, can be used for thermal modulation of the sensor. Due to the digital signal processing and the low-pass behavior of the heating elements and / or additional filters, the harmonic waves can be suppressed. By this physical behavior, the circuit complexity can be greatly reduced. The implementation of the signal generators and the signal processing in a parallel architecture, as can be done for example by Field Programmable Gate Arrays (FPGA), allows a precise and fast measurement process, since the phase synchronicity or phase synchronicity is ensured. If there is enough space for the electronics, an analog signal can be generated by a slight additional effort to sensor systems, which are not subject to thermal inertia to such an extent as the optical sensor and thus have a low or no low-pass behavior or for which higher harmonic oscillations would be critical to implement.

For portable and possibly battery-powered use, sensor evaluation circuits can be implemented to realize an energy-efficient and small-sized function of a multi-reference lock-in amplifier. The number of reference channels is variable, which means that a basic structure of the integrated sensor evaluation circuits can remain unchanged by a varying number of optical sensors on the chip or the sensor. The reference signals, d. H. the sensor drive signals 26a-c are generated by means of the plurality of signal generators 18, which receive the respective data from the configuration data memory 16. Several signal generators 18 can be instantiated in order to be able to operate a corresponding number of sensors (MRR). The signal generators 18 are synchronized with each other with respect to their phase position. The output of the reference signal, that is to say the sum of all sensor drive signals, takes place to the chip of the multi-ring resonator, that is to say of the sensor 12-1. The change in the configuration of the plurality of signal generators 18 or other parts of the integrated sensor evaluation circuit 20 may, for example, if the integrated sensor evaluation circuit comprises an FPGA such that the FPGA is reconfigured. A number of implemented signal generators 18 may be redetermined by reconfiguration.

Alternatively or additionally, a change in the integrated sensor evaluation circuit can also take place during operation, for example by changing a signal frequency of one or more signal generators or configuration data during a running operation of the integrated sensor evaluation circuit.

A readout of the sensor signal 14-1 can be carried out such that via a photoelectric converter, such as a photodiode, an analog voltage is measured according to the amplitude of the optical signal, that is, the signal of the sensors (MRR) is optically present , This voltage can be connected via an amplifier to the analog-to-digital Transducer 46 are connected, which digitizes the signals. The digitization is carried out in phase synchronization with the reference signals. Through the signal processing, that is, the signal processing block 22-1, the signals are correlated with the sensor drive signals 26a-c. As a result, the signals can be assigned to the individual optical rings 38a-d and separated. The measurement results are stored in a memory 48.

Via a digital interface 52, the structure of the sensor evaluation circuit can be configured and the measured data can be read out. A human-machine interface 54 controls the measurement and the output of the measured data.

The structure of the sensor evaluation circuit 20 can be designed based on purely digital electronics and thus replace a complex (analog-technical) measurement setup. This allows the use of the sensor chip in a portable, possibly battery-powered, application. The measurement is carried out by parallel generation of the reference signals and parallel measurement processes much faster than in a discrete structure. An expense for the external evaluation can be drastically reduced or accelerated by a described pre-analysis, such as an FFT in the signal processing block 22-1 over known methods and devices. Acceleration makes it possible to perform real-time measurements. Real-time measurements describe measurement processes which deliver a sensor result over a period of time that is such that a process step following the evaluation of the measurement result can be carried out without a time delay. The integrated sensor evaluation circuit 20 can be used, for example, as an evaluation unit for portable MRR array sensors in the form of a point-of-service device for chemical or biochemical analysis of samples. Furthermore, it is conceivable that such an arrangement is used as a portable device for substance detection in solids, liquids or in the air.

In principle, an application of the sensor evaluation circuit depends on the properties of the sensor, for example an activation layer of the optical ring resonators.

3 shows a schematic block diagram of a sensor evaluation circuit 30 having an amplifier circuit 56 with an input side and an output side. On the input side, the amplifier circuit 56 with the plurality of signal generators 18 and connected on the output side to the first terminal 28a. The amplifier circuit 56 is designed to receive and amplify the sensor drive signals 26a-c, so that the sensor drive signals, in addition to an independent frequency, can also have the same or individual signal amplitude or signal power, which is sufficiently large, for example for optical ring resonators provide thermal power. An amplification factor for controlling the amplifier circuit or the amplification of the sensor drive signals 26a-c may be part of the configuration data.

The integrated sensor evaluation circuit 30 also has a converter circuit 58, which is connected to the drive circuit 34 and an optical emitter 62 of the integrated sensor evaluation circuit 30. The converter circuit 58 is designed to receive the excitation signal 36 and to transform it such that the optical emitter 62, for example a laser (monochromatic or tunable) or a light source 42, emits an optical signal which is transmitted via the third connection 28c to a sensor 12. 2 can be issued. The sensor 12-2 has an optical input 62 configured to receive the optical signal from the third port 28c. A connection between the third terminal 28c and the sensor input 62 can be provided for example via an optical waveguide. In principle, the converter circuit 58 may also be part of the drive circuit 34.

The integrated sensor evaluation circuit 30 further includes an internal clock 64, such as a system clock or a quartz element, configured to provide the common signal clock 24. Alternatively or additionally, the integrated sensor evaluation circuit 30 may also be connected to an external clock generator, for example when the internal evaluation circuit 30 is a microcontroller having a clock input. The external clock may, for example, be arranged on the same board as the corresponding microcontroller.

The amplifier circuit 56 may further include an analogizer configured to receive the sensor drive signals 26a-c in the form of digital square wave signals and to convert them to analog waveforms, such as a sine wave or a continuous time varying signal. In simple terms, the analogizer is designed, for example, to convert the discrete signal stages into continuous signal levels by means of capacitors, coils and / or resistors. An advantage of an analog signal form is that a generation of signal harmonics can be reduced by a system of analog signals and a measurement accuracy can be increased. This can be For example, be advantageous if a sensor connected to the integrated Sensorauswerteschaltung sensor elements, which have a lower or substantially lower inertia compared with optical resonance rings with a thermal inertia. The term inertia can be understood to mean that a continuous or discontinuous change in a signal level at an input with delay causes a continuous change in a signal level of an output signal, as is the case, for example, in a charging curve of an electrical capacitor.

The sensor 12-2 is connected to the integrated sensor evaluation circuit 30 via a common signal line 66, which is designed to transmit a plurality of sensor drive signals 26a-c in common. The common signal line 66 may be, for example, a multi-core cable in which a sensor drive signal 26a-c is transmitted via an individual wire. Alternatively, it is also conceivable that the common signal line 66 has electrical or optical transmission links which are used in a frequency or time-division multiplexing method by a plurality of sensor drive signals 26a-c.

A signal processing block 22-2 of the integrated sensor evaluation circuit 30 has a buffer memory 68 which is designed to latch a plurality of values of the sensor signal 14-2 or the digitized values of the sensor signal 14-2. This can be advantageous, for example, when carrying out an FFT (Fast Fourier Transformation) if a certain number of, for example, 4,000, 8,000 or 16,000 measured values are stored and processed in a common FFT evaluation in the signal processing block 22-2.

The integrated sensor evaluation circuit 30 can be supplied, for example via a battery and a DC electrical voltage with electrical energy, so that one of a network connection independent portable, mobile operation is possible. Alternatively or additionally, the integrated sensor evaluation circuit 30 can be supplied with electrical energy via a mains connection and an electrical alternating voltage.

4 shows a schematic block diagram of a sensor system 40 with the integrated sensor evaluation circuit 10, which is connected to the sensor 12 of the sensor system 40. The sensor system 40 may be, for example, a chip, a circuit board or another system in which the integrated sensor evaluation circuit 10 is arranged in common with the sensor 12. For example, the sensor system 40 may include a circuit, a chip, a device or a system that invariably expands the sensor 12 through the integrated sensor evaluation circuit 10. In other words, the sensor system 40 may be a lab-on-chip device, in which the sensor 12 is supplemented with an evaluation circuit 10. Alternatively or in addition to the sensor 12, the sensor system 40 may comprise another sensor. Alternatively or in addition to the sensor evaluation circuit 10, the sensor system 40 may comprise a different sensor evaluation circuit. The sensor system 40 may comprise a common housing in which the sensor evaluation circuit 10 and the sensor 12 are arranged. The sensor system 40 may be configured such that the sensor 12 comprises a plurality of optical resonators. The sensor drive signals may be modulation signals for changing optical characteristics of the plurality of optical resonators. The integrated sensor evaluation circuit 10 includes the third terminal 28c and is configured to supply the excitation signal 36 to the sensor 12 via the third terminal 28c. The sensor 12 is designed to drive the plurality of optical resonators with a carrier signal based on the excitation signal 36. For example, the plurality of optical resonators may be configured to change the carrier signal based on a sensor parameter and based on one of the plurality of modulation signals. The sensor 12 is configured to provide the sensor signal 14 based on the changed carrier signal. The integrated sensor evaluation circuit 10 is designed to receive the sensor signal at the second terminal 28b.

According to embodiments, the sensor system 40 is configured such that the signal processing block of the integrated sensor evaluation circuit 10 is a lock-in amplifier configured to obtain information on the change of the carrier signal based on a correlation of the plurality of sensor drive signals and the sensor signal 14. The change in the carrier signal may be based on a change in resonant frequencies and / or resonant wavelengths of optical resonant rings. The change in resonant frequencies and / or wavelengths may be due to contact of a respective resonant ring with a substance, gas or material for which the resonant optical ring is sensitive.

Although in previous embodiments the signal processing block has always been described as having the signal processing block configured to perform a lock-in procedure, the signal processing block may alternatively or additionally be configured to perform other signal amplification methods, such as a chopper method.

Although in previous embodiments the evaluation of sensors with optical resonance rings has been described, it is also conceivable to evaluate optical sensors, resistive sensors, inductive or capacitive sensors by means of the integrated sensor evaluation circuits. Alternatively or additionally, sensors for detecting inductive or capacitive measuring objects can also be arranged. It is also conceivable that an arranged sensor is designed to detect properties of a bacterial or cell colony (such as a germ or cell density), for example by an impedance measurement or a capacitance measurement of a material having a corresponding colony. Alternatively or additionally, it is also conceivable that a corresponding sensor is designed to detect a temperature or an air conductance. The sensor may alternatively or additionally also be a microinert sensor, for example for detecting gyroscopic effects or accelerations.

The sensors used may be configured to provide sensor signals based on thermal modulation of sensor elements or components. Alternatively, another modulation, for example an amplitude modulation or a frequency modulation, can be used to separate or differentiate individual signal components. Alternatively, a use of a modulation can also be dispensed with, for example if different sensors or sensor elements are designed to operate in different operating ranges, such as wavelength ranges of optical sensors or frequency ranges of capacitive sensors.

Although some aspects have been described in the context of a device, it will be understood that these aspects also constitute a description of the corresponding method, so that a block or a component of a device is also to be understood as a corresponding method step or as a feature of a method step. Similarly, aspects described in connection with or as a method step also represent a description of a corresponding block or detail or feature of a corresponding device. Depending on particular implementation requirements, embodiments of the invention may be implemented in hardware or in software. The implementation can using a digital storage medium, such as a floppy disk, a DVD, a Blu-ray Disc, a CD, a ROM, a PROM, an EPROM, an EEPROM or FLASH memory, a hard disk or other magnetic or optical memory are stored on the electronically readable control signals, which can cooperate with a programmable computer system or cooperate such that the respective method is performed. Therefore, the digital storage medium can be computer readable. Thus, some embodiments according to the invention include a data carrier having electronically readable control signals capable of interacting with a programmable computer system such that one of the methods described herein is performed.

In general, embodiments of the present invention may be implemented as a computer program product having a program code, wherein the program code is operable to perform one of the methods when the computer program product runs on a computer. The program code can also be stored, for example, on a machine-readable carrier.

Other embodiments include the computer program for performing any of the methods described herein, wherein the computer program is stored on a machine-readable medium.

In other words, an exemplary embodiment of the method according to the invention is thus a computer program which has program code for carrying out one of the methods described herein when the computer program runs on a computer. A further embodiment of the inventive method is thus a data carrier (or a digital storage medium or a computer-readable medium) on which the computer program is recorded for carrying out one of the methods described herein.

A further embodiment of the method according to the invention is thus a data stream or a sequence of signals, which represent the computer program for performing one of the methods described herein. The data stream or the sequence of signals may be configured, for example, to be transferred via a data communication connection, for example via the Internet. Another embodiment includes a processing device, such as a computer or a programmable logic device, that is configured or adapted to perform one of the methods described herein. Another embodiment includes a computer on which the computer program is installed to perform one of the methods described herein.

In some embodiments, a programmable logic device (eg, a field programmable gate array, an FPGA) may be used to perform some or all of the functionality of the methods described herein. In some embodiments, a field programmable gate array may cooperate with a microprocessor to perform one of the methods described herein. In general, in some embodiments, the methods are performed by any hardware device. This may be a universal hardware such as a computer processor (CPU) or hardware specific to the process, such as an ASIC.

The embodiments described above are merely illustrative of the principles of the present invention. It will be understood that modifications and variations of the arrangements and details described herein will be apparent to others of ordinary skill in the art. Therefore, it is intended that the invention be limited only by the scope of the appended claims and not by the specific details presented in the description and explanation of the embodiments herein.

bibliography

[1] P. Lützow, D. Pergande, and H. Heidrich, "Integrated Optical Sensor Platform for Multiparameter Bio-chemical Analysis," Optics Express Vol. 19, Issue 14, 2011.

Claims

claims

1. Integrated sensor evaluation circuit for evaluating one of a sensor (12;

12-1; 12-2), having a first terminal (28a) for connection to the sensor (12; 2-1; 12-2); a second port (28b) for connection to the sensor (12; 12-1; 12-2); a configuration data memory (16) for storing configuration data describing signal characteristics of a plurality of sensor drive signals (26a-c); a plurality of signal generators (18) connected to the configuration data memory (16) and the first terminal (28a) and configured to provide a sensor drive signal (26a-c) based on a common signal clock (24) and the configuration data, respectively; and a signal processing block (22; 22-1; 22-2) connected to the configuration data memory (16) and the second terminal (28b) and configured to receive the sensor signal (14; 14-1; 14-2) based on the plurality of sensor drive signals (26a-c) to receive the received sensor signal (14; 14-1; 14-2) based on the signal clock (24) and the configuration data evaluate and provide an evaluation result (32).

The sensor evaluation circuit of claim 1, further comprising a clock generator (64) configured to provide the signal clock (24).

A sensor evaluation circuit according to claim 1 or 2, wherein the signal processing block (22; 22-1; 22-2) is adapted to model the sensor drive signals (26a-c) based on the configuration data.

Sensor evaluation circuit according to one of the preceding claims, further comprising a third terminal (28c) for connection to the sensor (12; 12-1; 12-2) and a drive circuit (34), wherein the third terminal (28c) with the Driving circuit (34) is connected and wherein the drive circuit (34) is designed to generate an excitation signal (36) which is designed to drive the sensor (12; 12-1; 12-2).

Sensor evaluation circuit according to claim 4, wherein the drive circuit (34) is an optical module, and wherein the excitation signal (36) is adapted to drive a laser (42).

Sensor evaluation circuit according to claim 4 or 5, further comprising a converter circuit (58) and an optical emitter (62), wherein the converter circuit (58) is connected to the drive circuit (34) and the optical emitter (62), wherein the optical emitter ( 62) is connected to the converter circuit (58) and the third terminal (28c), wherein the converter circuit (58) is adapted to receive the excitation signal (36) and to supply the optical emitter (62) based on the excitation signal (36) to stimulate an optical emission.

Sensor evaluation circuit according to one of the preceding claims, further comprising a result memory (48) which is designed to store the evaluation result (32).

A sensor evaluation circuit according to any one of the preceding claims, wherein the signal processing block (22; 22-1; 22-2) comprises a latch (68) adapted to receive a plurality of values of the sensor signal (14; 14-1; 14-2 ) and to evaluate the plurality of values with a frequency evaluation method.

The sensor evaluation circuit of claim 1, further comprising a fourth terminal configured to receive a user input or an external control signal, wherein the sensor evaluation circuit is configured to connect at least one of the plurality of signal generators based on the To program user input or based on the external control signal or to change the configuration data.

Sensor evaluation circuit according to one of the preceding claims, which is further configured to be operated with an AC electrical voltage or a DC electrical voltage. 1 1. A sensor evaluation circuit according to any one of the preceding claims, arranged to supply the plurality of sensor drive signals (26a-c) at the first terminal (28a) to the sensor (12; 12-1; 12-2) via a common connection.

A sensor evaluation circuit according to any one of the preceding claims, arranged to receive the sensor signal (14; 14-1; 14-2) in an analog form at the second terminal (28b).

13. A sensor evaluation circuit according to claim 1, further comprising an amplifier circuit connected to the first terminal and the plurality of signal generators, and configured to generate the plurality of sensor drive signals (26a-c). and to provide the amplified sensor drive signals (26a-c) at the first port (28a).

14. A sensor system (40) comprising: a sensor evaluation circuit (10; 20; 30) according to one of the preceding claims; and a sensor (12; 12-1; 12-2) connected to the sensor evaluation circuit (10; 20; 30). The sensor system (40) of claim 16, wherein the sensor (12; 12-1; 12-2) comprises a plurality of optical resonators (38a-d); wherein the sensor drive signals (26a-c) of the plurality of signal generators (18) are modulation signals for changing optical characteristics of the plurality of optical resonators (38a-d); in which the sensor evaluation circuit has a third terminal (28c) and is designed to supply an excitation signal (36) to the sensor (12; 12-1; 12-2) by means of the third terminal (28c), the sensor (12 12-1, 12-2). is formed to drive the plurality of optical resonators (38a-d) with a carrier signal based on the excitation signal (36); wherein each of the plurality of optical resonators (38a-d) is configured to change the carrier signal based on a sensor parameter and based on one of the plurality of modulation signals (26a-c); wherein the sensor (12; 12-1; 12-2) is configured to provide the sensor signal (14; 14-1; 14-2) based on the changed carrier signal; and wherein the sensor evaluation circuit is configured to receive the sensor signal (14; 14-1; 14-2) at the second terminal (28b).

The sensor system of claim 15, wherein the signal processing block (22; 22-1; 22-2) is a lock-in amplifier configured to generate, based on a correlation of the plurality of sensor drive signals (26a-c) and the sensor signal (14 14-1; 14-2) obtain information about the change of the carrier signal by the plurality of optical resonators (38a-d).

A sensor system according to any one of claims 15 or 16, wherein the sensor parameters comprise at least one of a substance concentration, a chemical property, a physical property, or an optical property of a substance associated with the sensor.

Method for evaluating a sensor signal (14; 14-1; 14-2) received from a sensor (12; 12-1; 12-2) with an integrated sensor circuit comprising the following steps:

Connecting the sensor (12; 12-1; 12-2) to the sensor circuit (10; 20; 30) to a first terminal (28a);

Connecting the sensor (12; 12-1; 12-2) to the sensor circuit (10; 20; 30) at a second terminal (28b);

Storing configuration data describing signal characteristics of a plurality of sensor drive signals (26a-c); Providing a plurality of sensor drive signals (26a-c) to the first port (28a) based on a signal clock (24) and the configuration data; Receiving the sensor signal (14; 14-1; 14-2) at the second port (28b);

Evaluating the sensor signal (14; 14-1; 14-2) based on the signal clock (24) and the configuration data; and providing an evaluation result (32). A computer program comprising program code for carrying out the method of claim 18 when the program is run on a computer.