WO2012124623A1 - Liquid crystal display device and method for driving same - Google Patents

Abstract

This liquid crystal display device for dividing a single frame period into a plurality of sub-frame periods and displaying an image offers both high-speed drive and lower power consumption. A pixel circuit is functionally configured so as to comprise a sample-and-hold circuit for holding one bit of data on the basis of a video signal potential, and a level shifter circuit for converting a level between the video signal potential and a pixel electrode potential. A single frame period comprises n×3 sub-frame periods (where n is the number of bits of data for each of the colors), and each of the sub-frame periods comprises a first period (T1) and a second period (T2). During the first period (T1), data in accordance with the video signal potential is held in the sample-and-hold circuit sequentially one line at a time. During the second period (T2), a backlight is turned off, and a potential in accordance with the data held in the sample-and-hold circuit is simultaneously applied to the pixel electrodes in the entire pixel circuit by the level shifter circuit.

Description

Liquid crystal display device and driving method thereof

The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device that displays an image by dividing one frame period into a plurality of subframe periods, such as a field sequential method.

Many liquid crystal display devices that perform color display include a color filter that transmits red (R), green (G), and blue (B) light for each sub-pixel obtained by dividing one pixel into three. However, since about 2/3 of the backlight light applied to the liquid crystal panel is absorbed by the color filter, the color filter type liquid crystal display device has a problem that the light use efficiency is low. Therefore, a field sequential type liquid crystal display device that performs color display without using a color filter has attracted attention.

In the field sequential method, one screen display period (one frame period) is divided into three subframe periods. Note that the subframe period is also called a subfield, but in the following description, the term “subframe period” is used as a unit. In the first subframe period, a red screen is displayed based on the red component of the input signal. In the second subframe period, a green screen is displayed based on the green component of the input signal. In the third subframe period, a blue screen is displayed based on the blue component of the input signal. By displaying one color at a time as described above, a color image is displayed on the liquid crystal panel. Thus, the field sequential type liquid crystal display device eliminates the need for a color filter, so that the light utilization efficiency is about three times that of the color filter type liquid crystal display device.

By the way, in the field sequential method, as described above, one frame period is divided into three subframe periods, and it is necessary to rewrite the image data for the entire display unit for each subframe period. For this reason, high-speed driving is required as compared with the color filter method. In the field sequential method, color breaks (color breaks) may occur when displaying a moving image. Therefore, driving may be performed at a high frame rate to prevent color breaks. However, when the image data is rewritten at high speed, the response of the liquid crystal may not follow the rewrite and the display quality may deteriorate.

Deterioration of display quality when the field sequential method is adopted will be described with reference to FIG. FIG. 20 shows changes in pixel potential (pixel electrode potential) and transmittance and changes in the state of each color of the backlight (lighted state / lighted state) in the upper and lower portions of the screen during one frame period. Rewriting of image data is typically performed sequentially line by line from the top of the screen to the bottom of the screen. For this reason, it takes a relatively long time to rewrite the image data for the entire display unit. Further, it is necessary to turn off the backlight during a period when image data is being rewritten. From the above, the time during which the backlight can be turned on in each subframe period becomes relatively short as indicated by reference numeral 91 in FIG. 20, resulting in insufficient luminance. Further, since it takes time for the liquid crystal to respond to the change in pixel potential, the transmittance gradually changes in each pixel portion. For this reason, as can be understood from the portion denoted by reference numeral 92 in FIG. 20, color mixing occurs when the backlight is turned on before the liquid crystal transmittance sufficiently changes in the lower portion of the screen.

In response to the above problems, it is conceivable to improve the response characteristics of the liquid crystal by increasing the liquid crystal applied voltage. However, if the voltage applied to the liquid crystal is increased as compared with the conventional case, not only the power required for charging / discharging the source bus line (video signal line) is increased, but also the time required for charging is increased, so that high-speed driving becomes difficult.

Therefore, Japanese Patent Application Laid-Open No. 11-295694 discloses an invention of a liquid crystal display device that makes it possible to extend the lighting time of the backlight. In this liquid crystal display device, two TFTs (first TFT and second TFT), a sample hold capacitor, and a pixel capacitor are provided for each pixel. As for the first TFT, the gate terminal is connected to the gate bus line (scanning signal line), the source terminal is connected to the source bus line (video signal line), and the drain terminal is connected to the sample hold capacitor. For the second TFT, the source terminal is connected to the drain terminal of the first TFT, and the drain terminal is connected to the pixel capacitor. Further, the gate terminals of the second TFTs for all the pixels are connected to each other by a gate short-circuit line, and the second TFTs for all the pixels are simultaneously turned on by a collective driving gate signal. . In the configuration as described above, by turning on the first TFT for each row, a video signal is written to the sample hold capacitor of each pixel. Then, after the video signal is written in the sample and hold capacitors for all the pixels, the second TFTs for all the pixels are turned on based on the collective drive gate signal. As a result, the writing to the pixel capacitor is performed simultaneously on the entire display unit. Here, the liquid crystal applied voltage does not change during the period during which writing to the sample hold capacitor (image data capture) is performed (however, fluctuations due to leakage current etc. are ignored). The backlight can be turned on. As described above, it is possible to lengthen the lighting time of the backlight. In the display devices disclosed in Japanese Unexamined Patent Publication No. 3-18892, Japanese Unexamined Patent Publication No. 8-95526, and Japanese Unexamined Patent Publication No. 2001-272657, the capacity provided for each pixel is one. The image data is fetched line by line, and the image for one frame is displayed all at once after the capture of the image data for all lines is completed. Japanese Unexamined Patent Application Publication No. 2009-134156 discloses a technique for preventing the occurrence of color breakup with respect to a field sequential image display apparatus.

Japanese Unexamined Patent Publication No. 11-295694 Japanese Unexamined Patent Publication No. 3-18892 Japanese Unexamined Patent Publication No. 8-95526 Japanese Unexamined Patent Publication No. 2001-272657 Japanese Unexamined Patent Publication No. 2009-134156

However, according to the liquid crystal display device disclosed in Japanese Patent Application Laid-Open No. 11-295694, the voltage is divided by the capacity ratio of the sample hold capacitor and the pixel capacitor in each pixel during the collective driving. For this reason, it is necessary to increase the voltage of the video signal transmitted through the source bus line in advance in consideration of such voltage division. In addition, since the liquid crystal needs to be AC driven to prevent deterioration, a potential having an amplitude twice as large as a desired liquid crystal applied voltage must be applied to the pixel electrode. Therefore, it is necessary to further increase the voltage of the video signal transmitted by the source bus line. Therefore, a large driving capability is required for the source driver, and high-speed driving becomes difficult. In addition, power consumption increases.

Accordingly, the present invention provides a liquid crystal display device that displays an image by dividing one frame period into a plurality of sub-frame periods, performs high-speed driving without impairing display quality, and reduces power consumption as compared with the prior art. Objective.

A first aspect of the present invention is a liquid crystal display device that displays an image by dividing one frame period into a plurality of subframe periods,
A plurality of video signal lines for transmitting video signals, a plurality of scanning signal lines intersecting with the plurality of video signal lines, and corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, each including a pixel electrode. A display unit having a common circuit disposed so as to sandwich a liquid crystal between the pixel circuit provided and the pixel electrode;
A backlight for irradiating the display unit with light,
The pixel circuit includes:
A data storage unit capable of storing binary data;
A data output unit for applying either a relatively high potential or a relatively low potential to the pixel electrode according to the value of the binary data stored in the data storage unit,
Each subframe period consists of a preceding first period and a subsequent second period,
In the first period,
The plurality of scanning signal lines are sequentially selected,
In all the pixel circuits, when a scanning signal line passing through the corresponding intersection is selected, binary data having a value corresponding to the potential of the video signal applied to the video signal line passing through the intersection is the data. Stored in the storage unit,
In the second period,
The backlight is turned off,
In all of the pixel circuits, a potential corresponding to the value of the binary data stored in the data storage unit is applied to the pixel electrode.

According to a second aspect of the present invention, in the first aspect of the present invention,
A common power supply potential that changes between a first potential that is a relatively high potential and a second potential that is a relatively low potential is commonly applied to all the pixel circuits,
The data output unit applies the first potential or the second potential to the pixel electrode in the second period according to the value of binary data stored in the data storage unit,
The common power supply potential has an amplitude larger than that of the video signal.

According to a third aspect of the present invention, in the second aspect of the present invention,
A third potential that is a relatively high potential and a fourth potential that is a relatively low potential are alternately applied to the common electrode,
In the first period of the subframe period in which the third potential is applied to the common electrode, a potential lower than the third potential is applied to the pixel electrode,
In the first period of the subframe period in which the fourth potential is applied to the common electrode, a potential higher than the fourth potential is applied to the pixel electrode.

According to a fourth aspect of the present invention, in the first aspect of the present invention,
A unit image capable of n (n is a natural number) -bit gradation display has a voltage corresponding to the value of each bit in n subframe periods of a plurality of subframe periods constituting one frame period. Is displayed on the display unit by being applied to
When the backlight focuses on n subframe periods for displaying each unit image, the backlight irradiates the display unit with light having different luminance for each subframe period.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention,
An image for one frame is composed of k unit images (k is a natural number),
A plurality of subframe periods constituting one frame period are classified into k groups such that one group includes n subframe periods,
The backlight is
It consists of multiple color light sources that can be turned on / off for each color.
The color of the light source that is turned on in the first period is switched for each group.

A sixth aspect of the present invention is the fifth aspect of the present invention,
When attention is paid to k consecutive subframe periods, the k subframe periods are classified into different groups.

According to a seventh aspect of the present invention, in the fifth aspect of the present invention,
In the first period of the subframe period included in at least one of the k groups, the light sources of two or more colors are turned on.

According to an eighth aspect of the present invention, in the fourth aspect of the present invention,
An image for one frame includes a first image that is the unit image for the left eye and a second image that is the unit image for the right eye.
The plurality of subframe periods constituting one frame period include a group for displaying the first image and the second image so that one group includes n × p times (p is a natural number) subframe periods. It is classified into a group for displaying.

A ninth aspect of the present invention is the eighth aspect of the present invention,
P is a natural number of 2 or more,
The sub-frame period in which the voltage corresponding to the value of each bit representing the gradation of the first image and the gradation of the second image is to be applied to the liquid crystal is provided so as to continue p times. It is characterized by.

A tenth aspect of the present invention is the eighth aspect of the present invention,
The group for displaying the first image includes n consecutive sub-times in which a voltage corresponding to each value of n bits representing the gradation of the first image should be sequentially applied to the liquid crystal. Including the frame period,
The group for displaying the second image includes n consecutive sub-times in which a voltage corresponding to each value of n bits representing the gradation of the second image should be sequentially applied to the liquid crystal. Including the frame period,
When the backlight focuses on n subframe periods included in each group, the backlight gradually increases the luminance of light applied to the display unit for each subframe period.

According to an eleventh aspect of the present invention, in the first aspect of the present invention,
The data storage unit
A storage capacitor for storing a charge indicating the value of the binary data;
A first switching element having a control terminal connected to the scanning signal line, a first conduction terminal connected to the video signal line, and a second conduction terminal connected to one end of the storage capacitor;
The data output unit includes:
Connected to the other end of the holding capacitor and connected to a control terminal to which a collective drive signal commonly input to all pixel circuits is applied, a first conduction terminal to which the common power supply potential is applied, and the pixel electrode A second switching element having a second conduction terminal;
And a third switching element having a control terminal connected to one end of the storage capacitor, a first conduction terminal to which the common power supply potential is applied, and a second conduction terminal connected to the pixel electrode. .

A twelfth aspect of the present invention includes a plurality of video signal lines for transmitting a video signal, a plurality of scanning signal lines intersecting with the plurality of video signal lines, and a plurality of pixel electrodes, and the plurality of video signal lines and the plurality of scannings. In order to irradiate the display unit with light, a pixel circuit provided corresponding to each intersection with a signal line, a display unit having a common electrode disposed so as to sandwich liquid crystal between the pixel electrode A liquid crystal display driving method for displaying an image by dividing one frame period into a plurality of subframe periods,
A data storage step for storing binary data in each pixel circuit;
A data output step for applying either a relatively high potential or a relatively low potential to the pixel electrode according to the value of the binary data stored in the data storage step,
Each subframe period is a first period that is a preceding period and is a period for executing the data storage step, and a second period that is a subsequent period and is a period for executing the data output step; Consists of
In the data storing step,
The plurality of scanning signal lines are sequentially selected,
In all pixel circuits, when a scanning signal line passing through the corresponding intersection is selected, binary data having a value corresponding to the potential of the video signal applied to the video signal line passing through the intersection is stored. ,
In the data output step,
The backlight is turned off,
In all the pixel circuits, a potential corresponding to the value of the binary data stored in the data storage step is applied to the pixel electrodes at the same time.

According to the first aspect of the present invention, in a liquid crystal display device that displays an image by dividing one frame period into a plurality of subframe periods, each subframe period includes a preceding first period and a subsequent second period. Consists of. In such a configuration, pixel data for the entire display unit is stored in the data storage unit in the pixel circuit in the first period of each subframe period, and stored in the data storage unit in the second period of each subframe period. Based on the stored data, the pixel electrode potential is updated all at once in the entire display portion. In other words, the liquid crystal applied voltage is updated all over the display unit. Since the backlight can be lit during a period other than the period during which the liquid crystal applied voltage is updated, it is possible to sufficiently ensure the lighting time of the backlight. Thereby, the brightness | luminance fall resulting from insufficient lighting time of a backlight is suppressed. In each subframe period, a voltage is applied to the liquid crystal based on binary data (1 bit data). Therefore, in each subframe period, the liquid crystal can be driven so that a transmittance close to 100% or a transmittance close to 0% can be obtained. This suppresses the deterioration of display quality due to the low response speed of the liquid crystal.

According to the second aspect of the present invention, the amplitude of the pixel electrode potential is larger than the amplitude of the video signal. Therefore, a large liquid crystal applied voltage can be obtained with a relatively small amplitude of the video signal. Therefore, the load on the video signal line driving circuit (source driver) is reduced, so that high-speed driving is possible, and power consumption associated with charging / discharging of the video signal line is reduced.

According to the third aspect of the present invention, since the relatively high potential and the relatively low potential are alternately applied to the common electrode, it is possible to reduce the amplitude of the pixel electrode potential. For this reason, it is possible to reduce the amplitude of the video signal, and the power consumption is effectively reduced.

According to the fourth aspect of the present invention, n-bit gradation display is performed by applying a voltage corresponding to the value of each bit to the liquid crystal during n subframe periods. The backlight brightness in the frame period is different from each other. Thereby, gradation display can be performed without changing the lighting time of the backlight for each subframe period.

According to the fifth aspect of the present invention, in the field sequential type liquid crystal display device, the same effect as in the first and fourth aspects of the present invention can be obtained.

According to the sixth aspect of the present invention, the lighting color of the backlight is switched every time the subframe period is switched. As a result, display colors are frequently switched, and the occurrence of color breaks (color breaks) when displaying moving images is effectively suppressed.

According to the seventh aspect of the present invention, since the sub-frame period in which the light sources of a plurality of colors are turned on is provided, occurrence of color breaks (color breaks) at the time of moving image display is suppressed.

According to the eighth aspect of the present invention, in the liquid crystal display device that performs three-dimensional stereoscopic display, the same effects as those of the first and fourth aspects of the present invention are obtained.

According to the ninth aspect of the present invention, in a liquid crystal display device that performs three-dimensional stereoscopic display, a 1-bit image is continuously displayed a plurality of times, so that a left-eye image and a right-eye image are displayed. Crosstalk is less visible.

According to the tenth aspect of the present invention, in the subframe period immediately after switching between the left eye image and the right eye image, the luminance of the backlight is the lowest in one frame period. For this reason, even if the response of the liquid crystal is insufficient, the crosstalk between the image for the left eye and the image for the right eye is difficult to be visually recognized.

According to the eleventh aspect of the present invention, the same effect as in the first aspect of the present invention can be obtained without complicating the configuration of the pixel circuit.

According to the twelfth aspect of the present invention, the same effect as that of the first aspect of the present invention can be achieved in the driving method of the liquid crystal display device.

FIG. 6 is a diagram for explaining a relationship between an operation of a pixel circuit and a lighting state of a backlight in the liquid crystal display device according to the embodiment of the present invention. In the said embodiment, it is a block diagram which shows the whole structure of a liquid crystal display device. FIG. 4 is a circuit diagram illustrating a configuration of a pixel circuit in the embodiment. In the said embodiment, it is a figure for demonstrating how the image for 1 frame is displayed. In the said embodiment, it is a figure for demonstrating a group. FIG. 6 is a signal waveform diagram for describing an operation in a unit pixel in the embodiment. FIG. 5 is a signal waveform diagram for explaining the operation of a unit pixel whose corresponding bit value is 1 in a subframe period in which a common electrode potential changes from a low level to a high level in the embodiment. FIG. 6 is a signal waveform diagram for explaining an operation of a unit pixel whose corresponding bit value is 0 in a subframe period in which a common electrode potential changes from a low level to a high level in the embodiment. FIG. 6 is a signal waveform diagram for explaining the operation of a unit pixel whose corresponding bit value is 1 in a subframe period in which a common electrode potential changes from a high level to a low level in the embodiment. FIG. 6 is a signal waveform diagram for explaining an operation of a unit pixel whose corresponding bit value is 0 in a subframe period in which a common electrode potential changes from a high level to a low level in the embodiment. FIG. 3 is a block diagram illustrating a functional configuration of a pixel circuit in the embodiment. It is a figure for demonstrating the effect in the said embodiment. A and B are diagrams for explaining effects in the embodiment. FIG. 2 is a diagram showing the characteristics of an image display device disclosed in Japanese Unexamined Patent Publication No. 2009-134156. It is a figure for demonstrating how the image for 1 frame is displayed in the 1st modification of the said embodiment. It is a figure for demonstrating how the image for 1 frame is displayed in the 2nd modification of the said embodiment. It is a figure for demonstrating how the image for 1 frame is displayed in the 3rd modification of the said embodiment. It is a figure for demonstrating a group in the 3rd modification of the said embodiment. It is a figure for demonstrating how the image for 1 frame is displayed in another example of the 3rd modification of the said embodiment. In a conventional example, it is a figure for demonstrating the fall of display quality when a field sequential system is employ | adopted.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

<1. Overall configuration and operation overview>
FIG. 2 is a block diagram showing the overall configuration of the liquid crystal display device according to the first embodiment of the present invention. The liquid crystal display device includes a display unit 100, a gate driver 200, a source driver 300, a timing control circuit 400, a sequential video signal generation circuit 500, a backlight control circuit 600, and backlights 60R, 60G, and 60B. And. For example, an LED is used as the light source of the backlight. In FIG. 2, a backlight that emits red light is indicated by reference numeral 60R, a backlight that emits green light is indicated by reference numeral 60G, and a backlight that emits blue light is indicated by reference numeral 60B.

The timing control circuit 400 receives a timing signal group (horizontal synchronization signal, vertical synchronization signal, etc.) TG sent from the outside, a control signal S1 for controlling the operation of the sequential video signal generation circuit 500, and a backlight control circuit 600. Control signal S2 for controlling the operation of the gate driver, gate control signal SG which is a plurality of signals (gate start pulse signal, gate clock signal, etc.) for controlling the operation of the gate driver 200, and the operation of the source driver 300. A source control signal SS which is a plurality of signals (source start pulse signal, source clock signal, etc.) for control, a common power supply potential VL described later, and a collective drive signal CL described later are output.

The sequential video signal generation circuit 500 receives RGB three-color video signals Din (R), Din (G), and Din (B) inputted in parallel, and converts them into a sequential video signal DV. The sequential video signal DV is given to the source driver 300. Here, the sequential video signal DV is a signal in which R (red) data, G (green) data, and B (blue) data are serially sequentially transmitted.

As in the conventional liquid crystal display device, the display unit 100 includes a plurality of source bus lines (video signal lines) SL and a plurality of gate bus lines (scanning signal lines) GL. A pixel circuit 10 including a pixel electrode is provided corresponding to each intersection with the gate bus line GL. In the present embodiment, a line for supplying a common power supply potential VL to each pixel circuit 10 (hereinafter referred to as “common power supply potential line”) and a line for supplying a collective drive signal CL to each pixel circuit 10 ( Hereinafter, the “collective drive signal line” is provided on the display unit 100. The detailed configuration of the pixel circuit 10 will be described later.

The gate driver 200 applies a scanning signal to each gate bus line GL based on the gate control signal SG. The plurality of gate bus lines are selectively driven sequentially one by one. The source driver 300 applies a video signal to each source bus line SL based on the source control signal SS. The backlight control circuit 600 controls the control signals SB (R), SB (G), and SB (B) for controlling the on / off states of the backlights 60R, 60G, and 60B based on the control signal S2. Is output. Backlights 60R, 60G, and 60B irradiate display unit 100 with light based on control signals SB (R), SB (G), and SB (B), respectively.

In the following, for convenience, the same reference symbol GL is assigned to the gate bus line and the scanning signal, the same reference symbol SL is assigned to the source bus line and the video signal, and the common power supply potential line and the common power supply potential are assigned. Are assigned the same reference symbol VL, and the collective drive signal line and the collective drive signal are assigned the same reference symbol CL.

<2. Configuration of pixel circuit>
FIG. 3 is a circuit diagram showing a configuration of the pixel circuit 10 in the present embodiment. The pixel circuit 10 includes three thin film transistors M1, M2, and M3, a storage capacitor Cs, and a pixel electrode 11. As for the thin film transistor M1, the gate terminal (control terminal) is connected to the gate bus line GL, the source terminal (first conduction terminal) is connected to the source bus line SL, and the drain terminal (second conduction terminal) is the gate of the thin film transistor M3. The terminal and one end of the holding capacitor Cs are connected. As for the thin film transistor M2, the gate terminal is connected to the other end of the collective drive signal line CL and the storage capacitor Cs, the source terminal is connected to the common power supply potential line VL, and the drain terminal is connected to the pixel electrode 11. As for the thin film transistor M3, the gate terminal is connected to the drain terminal of the thin film transistor M1 and one end of the storage capacitor Cs, the source terminal is connected to the common power supply potential line VL, and the drain terminal is connected to the pixel electrode 11. The holding capacitor Cs has one end connected to the drain terminal of the thin film transistor M1 and the gate terminal of the thin film transistor M3, and the other end connected to the gate terminal of the thin film transistor M2 and the collective drive signal line CL. In addition, a liquid crystal capacitor Clc is formed by the pixel electrode 11 and the common electrode 12 provided in common to all the pixel circuits 10. The node (node) indicated by reference numeral 15 in FIG. 3 is hereinafter referred to as “internal node”, and the potential of the internal node is indicated by reference numeral Vc. In the following description, the potential of the pixel electrode 11 (pixel electrode potential) is represented by the symbol Vpix, and the potential of the common electrode 12 (common electrode potential) is represented by the symbol Vcom.

In the configuration as described above, the storage capacitor Cs and the thin film transistor M1 realize a data storage unit that captures and holds the value of the video signal, and the thin film transistor M2 and the thin film transistor M3 hold the value stored in the data storage unit. A data output unit for supplying a potential corresponding to the above to the pixel electrode 11 is realized. The first switching element is realized by the thin film transistor M1, the second switching element is realized by the thin film transistor M2, and the third switching element is realized by the thin film transistor M3.

<3.1 Frame Display Method>
FIG. 4 is a diagram for explaining how an image for one frame is displayed in the present embodiment. In FIG. 4, the backlight brightness indicates that the longer the length of the vertical axis, the higher the brightness (the same applies to FIGS. 15, 16, 17, and 19). As shown in FIG. 4, one frame period is composed of (n × 3) subframe periods. Here, “n” represents the number of bits of data of each color. For example, if each color data is 6 bits (that is, 64 gradations), one frame period is composed of 18 subframe periods, and if each color data is 8 bits (that is, 256 gradations). 1) One frame period is composed of 24 subframe periods. The (n × 3) subframe periods constituting one frame period are classified into three groups so that one group includes n subframe periods. In the present embodiment, as shown in FIG. 5, the subframe period includes a group 7R for displaying red, a group 7G for displaying green, and a group for displaying blue. 7B. A subframe period for performing display corresponding to each of the first bit to the nth bit is provided for each group. In this way, gradation display is performed for each color by time division.

Note that the number of sub-frame periods constituting one frame period may be varied according to the number of gradations to be displayed. For example, by switching the number of subframe periods between 18 and 24, it is possible to switch between display of 64 gradations and display of 256 gradations.

In each subframe period, display corresponding to any bit of any color is performed. For example, display corresponding to the second bit of the green data is performed in the subframe period indicated as “G2” in the display data column in FIG. Focusing on one frame period, in this embodiment, as shown in FIG. 4, “display for the first bit of red data, display for the first bit of green data, and first bit of blue data. Display for the second bit of red data, display for the second bit of green data, display for the second bit of blue data, ..., for the nth bit of red data Display is performed in the order of “display, display for nth bit of green data, and display for nth bit of blue data”. By sequentially displaying colors one by one in this way, a color image is displayed on the display unit 100.

Here, attention is paid to n subframe periods (n subframe periods included in one group) for displaying one color. N subframe periods for displaying each color are included in one frame period. The transmittance of the liquid crystal in each pixel in each subframe period is set to either a transmittance close to 100% or a transmittance close to 0% depending on the value of the corresponding bit. Then, in order to perform n-bit gradation display using n subframe periods, the backlight emits light so as to have different luminances in the n subframe periods. In the example shown in FIG. 4, with respect to the data of each color, the luminance of the backlight is gradually decreased as the display is sequentially shifted from the display for the first bit to the display for the nth bit. In this way, by changing the luminance of the backlight for each bit, it is possible to perform gradation display without changing the lighting time of the backlight for each subframe period.

If an image for one screen capable of n-bit gradation display such as an image of each color of RGB is defined as “unit image”, k unit images (k is a natural number) for one frame. In this case, one frame period is composed of (n × k) subframe periods, and one group includes these (n × k) subframe periods so that it includes n subframe periods. Into k groups.

<4. Driving method>
Next, a driving method in the present embodiment will be described with reference to FIGS. 3 and 6. FIG. 6 is a signal waveform diagram for explaining an operation in one pixel portion (hereinafter referred to as “unit pixel”). As shown in FIG. 6, each subframe period includes a first period T1 that is a preceding period and a second period T2 that is a subsequent period. Note that the common electrode 12 employs a driving method (opposite AC driving) in which a high-level potential and a low-level potential are alternately applied. In addition, the amplitude of the common power supply potential VL is larger than the amplitude of the video signal SL.

During the period from time t10 to time t11, the scanning signal GL becomes high level. As a result, the thin film transistor M1 is turned on. During this period, the video signal SL has a potential corresponding to the bit value, and the collective drive signal CL is maintained at a low level. As a result, charge corresponding to the bit value is accumulated in the storage capacitor Cs, and the internal node has a potential corresponding to the bit value. For example, if the bit value is 1, the potential of the internal node is 5V, and if the bit value is 0, the potential of the internal node is 0V. FIG. 6 shows the waveform of the scanning signal GL for the first row. During the period from time t11 to time t12, the scanning signal GL for the second row and thereafter is a predetermined period (from time t10 to time t11). The period of the same length as the period (1) is sequentially set to the high level. As a result, at the end of the first period T1, the potential of the internal node is the potential corresponding to the value of the corresponding bit in all the unit pixels.

At time t12, the collective drive signal CL changes from low level to high level. As a result, the thin film transistor M2 is turned on. At time t12, the common power supply potential VL is at a high level. Therefore, a high level common power supply potential VL is applied to the pixel electrode 11. At time t12, the common electrode potential Vcom changes from the low level to the high level. At time t13, the collective drive signal CL changes from the high level to the low level. As a result, the thin film transistor M2 is turned off. At this time, the thin film transistor M3 is turned on or off according to the state of the internal node. For example, when the potential of the internal node is 5V, the thin film transistor M3 is turned on, and when the potential of the internal node is 0V, the thin film transistor M3 is turned off. At time t13, the common power supply potential VL changes from the high level to the low level. Therefore, when the thin film transistor M3 is in the on state at time t13, the low-level common power supply potential VL is applied to the pixel electrode 11. On the other hand, when the thin film transistor M3 is in the off state at the time point t13, a state where a relatively high potential is applied to the pixel electrode 11 is maintained.

The above operation is repeated during the operation period of the liquid crystal display device. However, for the common electrode potential Vcom, the change from the low level to the high level and the change from the high level to the low level are alternately repeated every subframe period.

FIG. 1 is a diagram for explaining the relationship between the operation of the pixel circuit 10 and the lighting state of the backlight. As can be seen from FIG. 1, in the first period of each subframe period, a backlight having a color corresponding to the data is applied in a state where a voltage based on the data captured in the previous subframe period is applied to the liquid crystal. It is turned on, and the data for the color to be displayed in the next subframe period is captured. For example, during the period from time t20 to time t22, the red backlight is turned on while the red display voltage is applied to the liquid crystal, and green data is captured. In the second period of each subframe period, the backlight is turned off as shown in FIG. The backlight is turned off in the second period as described above in order to change the pixel electrode potential and the common electrode potential during the second period as described above for the display of the next subframe period. This is because the voltage applied to the liquid crystal is changed during the two periods.

Since the amplitude of the common power supply potential VL is made larger than the amplitude of the video signal SL and the common electrode 12 employs counter AC driving, the applied voltage of the liquid crystal is significantly larger than the amplitude of the video signal SL. ing.

Hereinafter, a specific operation example of the unit pixel will be described. It is assumed that the normally black mode is adopted as the display mode.

<4.1 First Operation Example of Unit Pixel>
FIG. 7 is a signal waveform diagram for explaining the operation of the unit pixel whose corresponding bit value is 1 in the subframe period in which the common electrode potential Vcom changes from the low level to the high level. During the period from time t10 to time t11, the scanning signal GL is at a high level. As a result, the thin film transistor M1 is turned on. During this period, the video signal SL is at a potential indicating a value “1” (here, 5 V), and the internal node is at a potential indicating a value “1” (here, 5 V). At time t12, the collective drive signal CL changes from the low level to the high level. As a result, the thin film transistor M2 is turned on. Since the common power supply potential VL is 10 V at time t12, the pixel electrode potential Vpix is 10 V when the thin film transistor M2 is turned on. At time t12, the potential Vc of the internal node also increases via the storage capacitor Cs as the collective drive signal CL increases in potential. At time t12, the common power supply potential Vcom changes from 1V to 11V.

At time t13, the collective drive signal CL changes from the high level to the low level, and the common power supply potential VL changes from 10V to 0V. When the collective driving signal CL becomes low level, the thin film transistor M2 is turned off. At this time, as the collective drive signal CL is lowered, the potential Vc of the internal node is also lowered via the storage capacitor Cs. As a result, the potential Vc of the internal node is 5V. Accordingly, the thin film transistor M3 is in an on state. As a result, the pixel electrode potential Vpix drops from 10V to 0V at time t13. At time t20, the common power supply potential VL changes from 0V to 10V. At this time, due to the parasitic capacitance between the common power supply potential line VL and the pixel electrode 11, the pixel electrode potential Vpix increases from 0V to 2V, for example. The pixel electrode potential Vpix is maintained at 2V during the period from time t20 to time t22. During this period, since the common electrode potential Vcom is 11V, the liquid crystal applied voltage is −9V.

As described above, in the unit pixel in which the video signal indicating the value “1” is captured in the subframe period in which the common electrode potential Vcom changes from the low level to the high level, the first in the next subframe period. White display is performed during the period.

<4.2 Second Operation Example of Unit Pixel>
FIG. 8 is a signal waveform diagram for explaining the operation of the unit pixel in which the value of the corresponding bit is 0 in the subframe period in which the common electrode potential Vcom changes from the low level to the high level. During the period from time t10 to time t11, the scanning signal GL is at a high level. As a result, the thin film transistor M1 is turned on. During this period, the video signal SL is at a potential indicating a value “0” (here, 0 V), and the internal node is at a potential indicating a value “0” (here, 0 V). At time t12, as in the first operation example, the pixel electrode potential Vpix becomes 10 V, and the potential Vc of the internal node also increases as the collective drive signal CL increases. At time t12, the common power supply potential Vcom changes from 1V to 11V.

At time t13, as in the first operation example, the thin film transistor M2 is turned off, and the potential Vc of the internal node is lowered as the collective drive signal CL is lowered. As a result, the potential Vc of the internal node becomes 0V. Accordingly, the thin film transistor M3 is in an off state. For this reason, the pixel electrode potential Vpix does not drop to 0 V at time t13. The pixel electrode potential Vpix drops from 10V to 8V, for example, due to the parasitic capacitance between the common power supply potential line VL and the pixel electrode 11 at time t13. At time t20, the common power supply potential VL changes from 0V to 10V. At this time, the pixel electrode potential Vpix rises to 10V due to the parasitic capacitance between the common power supply potential line VL and the pixel electrode 11. The pixel electrode potential Vpix is maintained at 10 V during the period from time t20 to time t22. During this period, since the common electrode potential Vcom is 11V, the liquid crystal applied voltage is −1V.

As described above, in the unit pixel in which the video signal indicating the value “0” is captured in the subframe period in which the common electrode potential Vcom changes from the low level to the high level, the first subframe period of the next subframe period is used. Black display is performed during the period.

<4.3 Third Operation Example of Unit Pixel>
FIG. 9 is a signal waveform diagram for explaining the operation of the unit pixel whose corresponding bit value is 1 in the subframe period in which the common electrode potential Vcom changes from the high level to the low level. During the period from time t10 to time t11, the scanning signal GL is at a high level. As a result, the thin film transistor M1 is turned on. During this period, the video signal SL has a potential indicating the value “1”, and the internal node has a potential indicating the value “1”. At time t12, as in the first operation example, the pixel electrode potential Vpix becomes 10 V, and the potential Vc of the internal node also increases as the collective drive signal CL increases. At time t12, the common power supply potential Vcom changes from 11V to 1V.

At time t13, as in the first operation example, the thin film transistor M2 is turned off, and the potential Vc of the internal node is lowered as the collective drive signal CL is lowered. As a result, the potential Vc of the internal node is 5V. Accordingly, the thin film transistor M3 is in an on state. As a result, the pixel electrode potential Vpix drops from 10V to 0V at time t13. At time t20, as in the first operation example, the pixel electrode potential Vpix rises from 0V to 2V, for example. The pixel electrode potential Vpix is maintained at 2V during the period from time t20 to time t22. During this period, since the common electrode potential Vcom is 1V, the liquid crystal applied voltage is 1V.

As described above, in the unit pixel in which the video signal indicating the value “1” is captured in the subframe period in which the common electrode potential Vcom changes from the high level to the low level, the first in the next subframe period. Black display is performed during the period.

<4.4 Fourth Operation Example of Unit Pixel>
FIG. 10 is a signal waveform diagram for explaining the operation of the unit pixel whose corresponding bit value is 0 in the subframe period in which the common electrode potential Vcom changes from the high level to the low level. During the period from time t10 to time t11, the scanning signal GL is at a high level. As a result, the thin film transistor M1 is turned on. During this period, the video signal SL is at a potential indicating the value “0”, and the internal node is at a potential indicating the value “0”. At time t12, as in the first operation example, the pixel electrode potential Vpix becomes 10 V, and the potential Vc of the internal node also increases as the collective drive signal CL increases. At time t12, the common power supply potential Vcom changes from 11V to 1V.

At time t13, as in the first operation example, the thin film transistor M2 is turned off, and the potential Vc of the internal node is lowered as the collective drive signal CL is lowered. As a result, the potential Vc of the internal node becomes 0V. Accordingly, the thin film transistor M3 is in an off state. For this reason, the pixel electrode potential Vpix does not drop to 0 V at time t13. The pixel electrode potential Vpix drops from 10V to 8V, for example, due to the parasitic capacitance between the common power supply potential line VL and the pixel electrode 11 at time t13. At time t20, the pixel electrode potential Vpix rises to 10V as in the second operation example. The pixel electrode potential Vpix is maintained at 10 V during the period from time t20 to time t22. During this period, since the common electrode potential Vcom is 1V, the liquid crystal applied voltage is 9V.

As described above, in the unit pixel in which the video signal indicating the value “0” is captured in the subframe period in which the common electrode potential Vcom changes from the high level to the low level, the first subframe period is displayed in the first subframe period. White display is performed during the period.

<5. Effect>
According to the present embodiment, the pixel circuit 10 functionally includes a sample and hold circuit 71 capable of holding 1-bit data based on the video signal potential, and the video signal potential as shown in FIG. The pixel electrode 11 includes a level shift circuit 72 for converting the level between the pixel electrode potential and the pixel electrode 11. Each subframe period includes a first period T1 and a second period T2. Data corresponding to the video signal potential is held in the sample and hold circuit 71 in all the pixel circuits 10 during the first period T1 of each subframe period. In the second period T2 of each subframe period, either a relatively high potential or a relatively low potential is applied to the pixel electrode 11 by the level shift circuit 72 according to the data held in the sample and hold circuit 71. It is done. As described above, the liquid crystal applied voltages corresponding to all the pixels in the display unit 100 are updated all at once in the second period of each subframe period. That is, as indicated by reference numeral 73 in FIG. 12, the liquid crystal applied voltage is updated all over the display unit. This makes it possible to lengthen the lighting time of the backlight, as indicated by reference numeral 74 in FIG. As a result, a decrease in luminance due to insufficient lighting time of the backlight is suppressed.

Further, in this embodiment, in addition to the level conversion between the video signal potential and the pixel electrode potential, the common electrode potential Vcom is changed to a high level potential and a low level potential every subframe period. Driving method (opposite AC driving) is used. By the way, assuming that the pixel electrode potential Vpix is changed as shown in FIG. 13A when the common electrode potential Vcom is constant, in order to obtain the same liquid crystal applied voltage, when the counter AC drive is employed. As shown in FIG. 13B, the pixel electrode potential Vpix may be changed. As described above, it is possible to obtain a larger liquid crystal applied voltage than before without increasing the amplitude of the video signal as compared with the conventional case. In the example shown in FIG. 7, the amplitude of the video signal is 5V, while the liquid crystal applied voltage is in the range of -9V to 9V. Since the response characteristics of the liquid crystal improve as the applied voltage increases, a higher liquid crystal applied voltage than before can be obtained, thereby suppressing a reduction in display quality due to a low response speed of the liquid crystal. Further, in order to obtain the same liquid crystal applied voltage as in the present embodiment in the conventional example, the amplitude of the video signal needs to be 18 V or more. For this reason, in the conventional example, when the liquid crystal application voltage is increased, the load applied to the source driver is increased, and the power consumption associated with charging / discharging of the source bus line is increased. In contrast, in the present embodiment, a large liquid crystal applied voltage can be obtained with a relatively small amplitude of the video signal. Therefore, high-speed driving becomes possible, and power consumption accompanying charging / discharging of the source bus line is reduced.

Furthermore, in this embodiment, the liquid crystal responds so that a transmittance close to 100% or a transmittance close to 0% is obtained in each subframe period according to the value of 1-bit data. That is, since the liquid crystal does not respond so that the transmittance in the conventional halftone display can be obtained, the deterioration of the display quality due to the low response speed of the liquid crystal is also suppressed from this viewpoint.

Furthermore, in the present embodiment, as shown in FIG. 4, the lighting color of the backlight is switched every time the subframe period is switched. As a result, display colors are frequently switched, and the occurrence of color breaks (color breaks) when displaying moving images is effectively suppressed.

As described above, according to the present embodiment, a field-sequential liquid crystal display device that can be driven at a high speed without impairing display quality and can reduce power consumption as compared with the prior art is realized.

<6. Modification>
Hereinafter, modifications of the embodiment will be described.

<6.1 First Modification>
In the above embodiment, as shown in FIG. 4, the R, G, and B backlights are sequentially turned on one by one for each subframe period, but the present invention is not limited to this. A plurality of colors of backlights may be turned on in one subframe period. This will be described below.

The liquid crystal display device adopting the field sequential method has a problem that a color break occurs when displaying a moving image. As a countermeasure against the color breakup, a method of providing a subframe period in which a plurality of colors of backlights is turned on is known. For example, in the image display device disclosed in Japanese Unexamined Patent Publication No. 2009-134156, as shown in FIG. 14, the subframe period (first subfield) in which the R light and the B light are turned on, the R light and the G light are turned on. A subframe period (second subfield) in which light and B light are lit and a subframe period (third subfield) in which B light is lit are provided. This technique can be applied to the present invention as follows. The configuration of the pixel circuit and the driving method are the same as in the above embodiment.

FIG. 15 is a diagram for explaining how an image for one frame is displayed in the present modification. As shown in FIG. 15, one frame period is composed of (n × 3) subframe periods. Here, “n” represents the number of bits of each data. The (n × 3) subframe periods constituting one frame period are classified into three groups so that one group includes n subframe periods. Specifically, the (n × 3) subframe periods are classified into a group that lights R light and B light, a group that lights R light, G light, and B light, and a group that lights B light. The For each group, a subframe period for performing display corresponding to each of the first bit to the nth bit is provided. In each frame period, “display for the first bit performed by turning on R light and B light, display for the first bit performed by lighting R light, G light, and B light, and B light Display for the first bit performed by lighting, display for the second bit performed by lighting the R light and B light, display for the second bit performed by lighting the R light, G light, and B light, Display for the second bit performed by turning on the B light,..., Display for the nth bit performed by turning on the R light and the B light, and turning on the R light, the G light, and the B light The display is performed in the order of “display for the nth bit and display for the nth bit by turning on the B light”. Here, when attention is paid to n subframe periods included in one group, each color is sequentially shifted from the display for the 1st bit to the display for the nth bit in the same manner as in the above embodiment. The backlight brightness is gradually reduced.

As described above, even in a field sequential type liquid crystal display device in which backlights of a plurality of colors are turned on in one subframe period, high-speed driving is performed without impairing display quality and consumption is higher than in the past. It becomes possible to reduce electric power.

<6.2 Second Modification>
In the above embodiment, the backlights of R, G, and B are used, and the backlights of R, G, and B are sequentially turned on one by one for each subframe period as shown in FIG. However, the present invention is not limited to this. For example, using four color backlights of R, G, B, and W (white), as shown in FIG. 16, the R, G, B, and W backlights are sequentially provided for each subframe period one color at a time. You may make it light up. Similarly, backlights of five colors or more may be used to sequentially turn on one color for each subframe period.

<6.3 Third Modification>
In the above embodiment, the field sequential type liquid crystal display device has been described as an example, but the present invention is not limited to this. The present invention can be applied to liquid crystal display devices other than the field sequential method as long as high-speed driving is performed by dividing one frame period into a plurality of subframe periods. For example, in a liquid crystal display device that performs three-dimensional stereoscopic display called “3D display”, in order to prevent the occurrence of crosstalk, each unit image is continuously displayed a plurality of times within one frame period. ing. As a typical example, one frame period is composed of four sub-frame periods, and “the left-eye image display, the left-eye image display, the right-eye image display, the right-eye image display Display in the order of “display” is performed. Such a display method can be applied to the present invention as follows. The configuration of the pixel circuit and the driving method are the same as in the above embodiment.

FIG. 17 is a diagram for explaining how an image for one frame is displayed in the present modification. Referring to FIG. 17, for example, display corresponding to the first bit of the left-eye image is performed in the subframe period indicated as “L1” in the display data column, and “R2” is indicated in the display data column. During the subframe period, display corresponding to the second bit of the right-eye image is performed. As shown in FIG. 17, one frame period is composed of (n × 4) subframe periods. Here, “n” represents the number of bits of data constituting each unit image (left eye image, right eye image). The (n × 4) subframe periods constituting one frame period are classified so that one group includes (n × 2) subframe periods. Specifically, as shown in FIG. 18, the group is classified into a group 8L for displaying a left-eye image and a group 8R for displaying a right-eye image. For each group, two subframe periods are provided for performing display corresponding to the first to nth bits. In each frame period, “the first display for the first bit of the image for the left eye, the second display for the first bit of the image for the left eye, and the first display for the first bit of the image for the right eye. Display, second display for the first bit of the image for the right eye, first display for the second bit of the image for the left eye, second display for the second bit of the image for the left eye, right eye First display for the second bit of the image for the second time, second display for the second bit of the image for the right eye, ..., first display for the nth bit of the image for the left eye, for the left eye The display is performed in the order of the second display of the image for the nth bit, the first display of the right eye image for the nth bit, and the second display of the right eye image for the nth bit. Here, as in the above embodiment, the luminance of the backlight is gradually lowered as the display is sequentially shifted from the display for the first bit to the display for the n-th bit.

As described above, even in a liquid crystal display device that performs three-dimensional stereoscopic display, it is possible to perform high-speed driving without impairing display quality and to reduce power consumption as compared with the prior art. In the example shown in FIG. 17, an image of 1 bit is continuously displayed twice, but the present invention is not limited to this. For example, p is a natural number of 3 or more, and one group is represented by n × It may be composed of p subframe periods, and a 1-bit image may be continuously displayed p times.

Further, regarding a liquid crystal display device that performs three-dimensional stereoscopic display, as shown in FIG. 17, one frame is displayed as shown in FIG. 19 without continuously displaying an image of 1 bit twice (or three times or more). The image for the left eye, the display for the nth bit of the image for the left eye, the display for the (n-1) th bit of the image for the left eye, ..., the display for the second bit of the image for the left eye, left Display for the first bit of the image for the eye, Display for the nth bit of the image for the right eye, Display for the (n-1) th bit of the image for the right eye, ..., 2 bits of the image for the right eye You may make it display in order of the display for eyes, and the display for the 1st bit of the image for right eyes. At this time, it is preferable to gradually increase the luminance of the backlight as shown in FIG. 19 during the display period of the left-eye image and the display period of the right-eye image. Thereby, in the sub-frame period immediately after switching between the image for the left eye and the image for the right eye, the luminance of the backlight is the lowest in one frame period. As a result, even if the response of the liquid crystal is insufficient, the crosstalk between the image for the left eye and the image for the right eye is hardly visible.

DESCRIPTION OF SYMBOLS 10 ... Pixel circuit 11 ... Pixel electrode 12 ... Common electrode 60R, 60G, 60B ... Backlight 100 ... Display part 200 ... Gate driver 300 ... Source driver 400 ... Timing control circuit 500 ... Sequential video signal generation circuit 600 ... Backlight control circuit M1 to M3 ... Thin film transistor Cs ... Retention capacitance Clc ... Liquid crystal capacitance GL ... Gate bus line, scanning signal SL ... Source bus line, video signal CL ... Collective drive signal line, collective drive signal VL ... Common power supply potential line, Common power supply potential Vpix ... Pixel electrode potential Vcom ... Common electrode potential Vc ... Internal node potential Vlc ... Liquid crystal applied voltage

Claims (12)

1. A liquid crystal display device that displays an image by dividing one frame period into a plurality of subframe periods,
   A plurality of video signal lines for transmitting video signals, a plurality of scanning signal lines intersecting with the plurality of video signal lines, and corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, each including a pixel electrode. A display unit having a common circuit disposed so as to sandwich a liquid crystal between the pixel circuit provided and the pixel electrode;
   A backlight for irradiating the display unit with light,
   The pixel circuit includes:
   A data storage unit capable of storing binary data;
   A data output unit for applying either a relatively high potential or a relatively low potential to the pixel electrode according to the value of the binary data stored in the data storage unit,
   Each subframe period consists of a preceding first period and a subsequent second period,
   In the first period,
   The plurality of scanning signal lines are sequentially selected,
   In all the pixel circuits, when a scanning signal line passing through the corresponding intersection is selected, binary data having a value corresponding to the potential of the video signal applied to the video signal line passing through the intersection is the data. Stored in the storage unit,
   In the second period,
   The backlight is turned off,
   A liquid crystal display device characterized in that a potential corresponding to a value of binary data stored in the data storage unit is applied to the pixel electrodes all at once in all the pixel circuits.
2. A common power supply potential that changes between a first potential that is a relatively high potential and a second potential that is a relatively low potential is commonly applied to all the pixel circuits,
   The data output unit applies the first potential or the second potential to the pixel electrode in the second period according to the value of binary data stored in the data storage unit,
   The liquid crystal display device according to claim 1, wherein an amplitude of the common power supply potential is larger than an amplitude of the video signal.
3. A third potential that is a relatively high potential and a fourth potential that is a relatively low potential are alternately applied to the common electrode,
   In the first period of the subframe period in which the third potential is applied to the common electrode, a potential lower than the third potential is applied to the pixel electrode,
   3. The pixel electrode according to claim 2, wherein a potential higher than the fourth potential is applied to the pixel electrode in a first period of a subframe period in which the fourth potential is applied to the common electrode. Liquid crystal display device.
4. A unit image capable of n (n is a natural number) -bit gradation display has a voltage corresponding to the value of each bit in n subframe periods among a plurality of subframe periods constituting one frame period. Is displayed on the display unit by being applied to
   2. The backlight according to claim 1, wherein when the backlight is focused on n subframe periods for displaying each unit image, the display unit is irradiated with light having a different luminance for each subframe period. The liquid crystal display device described.
5. An image for one frame is composed of k unit images (k is a natural number),
   A plurality of subframe periods constituting one frame period are classified into k groups such that one group includes n subframe periods,
   The backlight is
   It consists of multiple color light sources that can be turned on / off for each color.
   The liquid crystal display device according to claim 4, wherein the color of the light source that is turned on in the first period is switched for each group.
6. 6. The liquid crystal display device according to claim 5, wherein when paying attention to k consecutive subframe periods, the k subframe periods are classified into different groups.
7. 6. The liquid crystal display according to claim 5, wherein light sources of two or more colors are turned on in a first period of a subframe period included in at least one of the k groups. apparatus.
8. An image for one frame includes a first image that is the unit image for the left eye and a second image that is the unit image for the right eye,
   The plurality of subframe periods constituting one frame period include a group for displaying the first image and the second image so that one group includes n × p times (p is a natural number) subframe periods. The liquid crystal display device according to claim 4, wherein the liquid crystal display device is classified into a group for displaying images.
9. P is a natural number of 2 or more,
   The subframe period in which the voltage corresponding to the value of each bit representing the gradation of the first image and the gradation of the second image is to be applied to the liquid crystal is provided so as to continue p times. The liquid crystal display device according to claim 8, wherein:
10. The group for displaying the first image includes n consecutive sub-times in which a voltage corresponding to each value of n bits representing the gradation of the first image should be sequentially applied to the liquid crystal. Including the frame period,
    The group for displaying the second image includes n consecutive sub-times in which a voltage corresponding to each value of n bits representing the gradation of the second image should be sequentially applied to the liquid crystal. Including the frame period,
    9. The backlight according to claim 8, wherein when the backlight is focused on n subframe periods included in each group, the luminance of light applied to the display unit is gradually increased for each subframe period. The liquid crystal display device described.
11. The data storage unit
    A storage capacitor for storing a charge indicating the value of the binary data;
    A first switching element having a control terminal connected to the scanning signal line, a first conduction terminal connected to the video signal line, and a second conduction terminal connected to one end of the storage capacitor;
    The data output unit includes:
    Connected to the other end of the holding capacitor and connected to a control terminal to which a collective drive signal commonly input to all pixel circuits is applied, a first conduction terminal to which the common power supply potential is applied, and the pixel electrode A second switching element having a second conduction terminal;
    And a third switching element having a control terminal connected to one end of the storage capacitor, a first conduction terminal to which the common power supply potential is applied, and a second conduction terminal connected to the pixel electrode. The liquid crystal display device according to claim 1.
12. A plurality of video signal lines for transmitting video signals, a plurality of scanning signal lines intersecting with the plurality of video signal lines, and corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, each including a pixel electrode. And a display unit having a common electrode arranged to sandwich liquid crystal between the pixel circuit and the pixel electrode, and a backlight for irradiating the display unit with light. A method of driving a liquid crystal display device that displays an image by dividing a period into a plurality of subframe periods,
    A data storage step for storing binary data in each pixel circuit;
    A data output step for applying either a relatively high potential or a relatively low potential to the pixel electrode according to the value of the binary data stored in the data storage step,
    Each subframe period is a first period that is a preceding period and is a period for executing the data storage step, and a second period that is a subsequent period and is a period for executing the data output step; Consists of
    In the data storing step,
    The plurality of scanning signal lines are sequentially selected,
    In all pixel circuits, when a scanning signal line passing through the corresponding intersection is selected, binary data having a value corresponding to the potential of the video signal applied to the video signal line passing through the intersection is stored. ,
    In the data output step,
    The backlight is turned off,
    A driving method characterized in that a potential corresponding to the value of binary data stored in the data storage step is applied to all the pixel circuits simultaneously to the pixel electrodes.

Images