WO2009143344A2

WO2009143344A2 - Multiple e-carrier transport over dsl

Info

Publication number: WO2009143344A2
Application number: PCT/US2009/044839
Authority: WO
Inventors: Xinkuan Zhou; Clifton Powers; Laxman Anne; Manish Sharma; Joe Polland
Original assignee: Adc Dsl Systems, Inc.
Priority date: 2008-05-22
Filing date: 2009-05-21
Publication date: 2009-11-26
Also published as: WO2009143344A3

Abstract

A communication system comprises a first multiplexer card having a first plurality of time division multiplex (TDM) ports and a first differential signaling interface, wherein the first multiplexer card is operable to map timeslots from each of the first plurality of TDM ports to a first combined signal transmitted via the first differential signaling interface; a first unit having a second differential signaling interface coupled to the first differential signaling interface, wherein the first unit is operable to extract the timeslots from the first combined signal and to map the extracted timeslots to a digital subscriber line (DSL) frame for transmission over a DSL link; a second unit coupled to the first unit via the DSL link, the second unit having a third differential signaling interface, wherein the second unit is operable to extract the timeslots in the DSL frame and to map the timeslots to a second combined signal transmitted via the third differential signaling interface; and a second multiplexer card having a second plurality of TDM ports and a fourth differential signaling interface, wherein the second multiplexer card is operable to map each of the timeslots from the second combined signal to one of the second plurality of TDM ports.

Description

MULTIPLE E-CARRIER TRANSPORT OVER DSL

CROSS-REFERENCE TO RELATED CASES

This application is related to the following co-pending United States patent applications, all of which are hereby incorporated herein by reference:

United States patent application serial number 11/566,493 (attorney docket number 100.801US01) entitled "POINT-TO-MULTIPOINT DATA COMMUNICATIONS WITH CHANNEL ASSOCIATED SIGNALING" filed on December 4, 2006 and which is referred to herein as the '801 application; and United States provisional patent application serial number 61/055,353, filed May 22,

2008 entitled "El TRANSPORT OVER G.SHDSL," (attorney docket number 100.1063USPR) and referred to herein as the '"353 Application". The present application hereby claims priority to U.S. Provisional Patent Application No. 61/055,353.

BACKGROUND Many telecommunications services utilize time division protocols such as E-carrier and

T-carrier protocols. For example, E-carrier systems allocate bandwidth or timeslots for a voice call for the entire duration of the call. Thus, E-carrier systems provide high call quality since the bandwidth and system latency is constant and predictable. However, this also increases the cost of utilizing E-carrier systems due to the persistent allocation of bandwidth. In particular, individuals and small businesses often find the cost of an E-carrier service to be cost-prohibitive despite its benefits.

SUMMARY

In one embodiment a communication system is provided. The communication system comprises a first multiplexer card having a first plurality of time division multiplex (TDM) ports and a first differential signaling interface, wherein the first multiplexer card is operable to map timeslots from each of the first plurality of TDM ports to a first combined signal transmitted via the first differential signaling interface; a first unit having a second differential signaling interface coupled to the first differential signaling interface, wherein the first unit is operable to extract the timeslots from the first combined signal and to map the extracted timeslots to a digital subscriber line (DSL) frame for transmission over a DSL link; a second unit coupled to the first unit via the DSL link, the second unit having a third differential signaling interface, wherein the second unit is operable to extract the timeslots in the DSL frame and to map the timeslots to a second combined signal transmitted via the third differential signaling interface; and a second multiplexer card having a second plurality of TDM ports and a fourth differential signaling interface, wherein the second multiplexer card is operable to map each of the timeslots from the second combined signal to one of the second plurality of TDM ports.

DRAWINGS

Understanding that the drawings depict only exemplary embodiments and are not therefore to be considered limiting in scope, the exemplary embodiments will be described with additional specificity and detail through the use of the accompanying drawings, in which:

Figure 1 is a block diagram of one embodiment of a communication system.

Figure 2 depicts mapping of an exemplary TDM frame to a DSL frame.

Figure 3 depicts mapping of exemplary fractional TDM frames to a single TDM frame.

Figure 4 is a block diagram of one embodiment of a multiplexing card. Figure 5 is a flow chart depicting one embodiment of a method of communicating fractional TDM frames.

Figure 6 is a block diagram of one embodiment of a communication system. Figure 7 is a diagram depicting remapping of an exemplary fractional TDM frame. Figure 8 is a flow diagram depicting one embodiment of an initialization sequence. Figure 9 depicts an exemplary mapping of signals to a DSL frame.

Figure 10 is a flow diagram depicting one embodiment of a method of transporting signals from a plurality of time division multiplex (TDM) ports over a digital subscriber line (DSL) link.

In accordance with common practice, the various described features are not drawn to scale but are drawn to emphasize specific features relevant to the exemplary embodiments.

DETAILED DESCRIPTION

In the following detailed description, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration specific illustrative embodiments. However, it is to be understood that other embodiments may be utilized and that logical, mechanical, and electrical changes may be made. Furthermore, the method presented in the drawing figures and the specification is not to be construed as limiting the order in which the individual steps may be performed. The following detailed description is, therefore, not to be taken in a limiting sense.

FIG. 1 is a block diagram of a communication system 100 that enables a plurality of end user equipment 104-1 ... 104-N to communicate over a single Time Division Multiplex (TDM) port 112 in a networking device 110 at the central office 102. As used herein, a TDM port is a port configured to transmit and receive TDM frames. A TDM frame, as used herein, is a frame configured according to one of an E-carrier protocol and a T-carrier protocol. E-carrier and T- carrier protocols are known to one of skill in the art. In particular, the embodiments described herein implement the El protocol defined in the International Telecommunications Union (ITU) G.703 standard. However, it is to be understood that other E-carrier and T-carrier protocols can be used in other embodiments. In addition, as used herein, a fractional TDM frame is a TDM frame in which less than the total number of available timeslots in the frame are used for carrying user data. For example, in embodiments using the El protocol, the fractional El frame contains 32 timeslots, but less than 32 timeslots are used for carrying data. The timeslots not used are also referred to herein as empty timeslots. The networking device 110 can be implemented as an Open Systems Interconnection (OSI) International Standards Organization (ISO) 3 networking device such as a bridge, switch, or router. For example, in this exemplary embodiment a TDM switch 110 is used.

Each end user equipment 104 transmits data, such as voice data, via a fractional El frame to a respective remote unit 106 (labeled as STU-R) for transmission to the central office 102. For example, each end user equipment 104 is a private branch exchange (PBX) in a business office in some embodiments. However, it is to be understood that, in other embodiments, other types of data can be used, such as, but not limited to, email and multimedia capture (image, video, sound). The fractional El port 116 of each end user equipment 104 is connected to an available El port connector 118 of a corresponding remote unit 106. The exemplary fractional El frame 203 in FIG.2 uses 10 timeslots (timeslots 1-10) for user data. However, it is to be understood that other amounts of timeslots can be used in other fractional El frames. Timeslot 0 is referred to as the synchronization timeslot and is used for signaling the start of the frame. In addition, timeslot 0 can be used to carry a multi-frame Cyclic Redundancy Check (CRC) and/or to send and receive alarms. Timeslot 16 is referred to as the Channel Associated Signaling (CAS) timeslot and is used for providing CAS information as known to one of skill in the art.

Each remote unit 106 maps the received fractional El frame 203 to a corresponding sub- block 209 of a DSL frame 207. In some embodiments, as shown in FIG. 2, each remote unit 106 maps timeslot 16 to the timeslot after the last timeslot used for user data (e.g. timeslot 11 in this example). In particular, each remote unit 106 does not map the empty timeslots in the fractional El frame 203 to the sub-block 209 (e.g. timeslots 11-15 and 17-31 in the example of FIG. 2).

Additional details of CAS timeslot remapping are found in the '801 application. Each sub-block 209 includes 12 timeslots in this example. The number of timeslots required for the fractional El timeslots determines the sub-block size. Each block 211 in the DSL frame 207 includes 12 sub-blocks 209 and each block 211 is separated by a header 213. Thus, through the procedure described above, the fractional El frame is transported to the central office 102 over DSL links 114. In this exemplary embodiment, the Global. Standard High-Bit-Rate Digital Subscriber Line (G.SHDSL), defined in ITU G.991.2 standard, is used to transport data from the remote units 106 to the central office 102. However, it is to be understood that other DSL variants can be used in other embodiments. Each remote unit 106 is coupled to a corresponding central unit 108 (labeled as STU-C).

At the central office 102, the corresponding central unit 108 receives the DSL frame 209 via the DSL link 114 and extracts the remapped fractional El timeslots from the DSL frame 209. Each central unit 108 then maps the El timeslot 16 back to its original location and inserts the empty timeslots (e.g. timeslots 11-15 and 17-31 in this example) to re-create the fractional El frame 203. In other words, each central unit 108 reverses the mapping performed in the corresponding remote unit 106. Each remote unit 108 then outputs the fractional El frame 203 via its El port connector 118 to a multiplexer card 120.

Multiplexer card 120 includes a plurality of El ports 122-1 ... 122-N. One of the El ports 122 is labeled the primary El port and is used to connect to the TDM switch 110. In this example El port 122-1 is the primary El port. Also, in this example, multiplexer card 120 includes 5 El ports. However, it is to be understood that more or fewer El ports can be used in other embodiments. The combined number of timeslots for user data received at the El ports 122-2 ... 122-N connected to the central units 108 may not exceed the El port capacity of the primary El port 122-1 (30 timeslots in this example). Hence, each El port 122-2 ... 122-N can have a configured bandwidth up to the maximum available on an El port (i.e., from 1-30 timeslots) as long as the total of all the timeslots is not greater than 30 timeslots. The timeslots are allocated in blocks from the primary El port 122-1. A block that begins after timeslot 1 on the primary El port 122-1 is remapped on the corresponding fractional El port 122 connected to a central unit 108, as shown in the example in FIG. 3. The corresponding CAS signaling is also adjusted as shown in FIG. 3. In the example in FIG. 3, four fractional El frames are coupled to the El ports 122-2 ...

122-N (also referred to herein as secondary El ports). In this example, the fractional El frame corresponding to El port 122-2 is assigned 10 timeslots and the fractional El frame corresponding to each of El ports 122-3 ... 122-N is assigned 5 timeslots for a combined total of 25 timeslots. As shown in the example in FIG. 3, timeslots 1-10 from El port 122-2 are mapped to timeslots 1-10 on the primary El port 122-1. Timeslots 1-5 from El ports 122-3, 122-4, and 122-N are mapped to timeslots 11-15, 17-21, and 22-26, respectively, on the primary El port 122-1. In addition, the timeslot 16 from each of the El ports 122-2 ... 122-N is buffered and mapped at CAS remapping block 424 into a single timeslot 16 sent on the primary El port 122-1. Similarly, the multiplexer card 120 is responsible for terminating the timeslot 0 from each fractional El frame received on the secondary El ports 122-2 ... 122-N. The multiplexer card 120 generates and transmits a single timeslot 0 over the primary El port 122-1. In addition, the multiplexer card 120 terminates the timeslot 0 from each El frame received on the primary El port 122-1. The multiplexer card 120 then generates a timeslot 0 for each of the fractional El frames transmitted over secondary El ports 122-2 ...122-N. The El multiplexer card 120 is configured a priori to know how many timeslots are to be received on each of the El ports 122-2 ... 122-N. Thus, when an El frame is received from the TDM switch 110 on the primary port 122-1, the El multiplexer card 120 is able to identify the CAS signaling information which is relevant to each block of timeslots assigned a priori to the El ports 122-2 ... 122-N. The multiplexer card 120 then separates the received El frame into the assigned blocks and maps the assigned blocks to the corresponding timeslots on each El port 122-2 ... 122-N. The multiplexer card 120 also maps the corresponding CAS signaling information to the correct timeslot 16 of each El port 122-2 ... 122-N. The fractional El frames are then sent to the corresponding central unit 108.

The processing described above to deliver a fractional El frame from the end user equipment 104 to the TDM switch 110 is reversed to provide a fractional El frame from the TDM switch 110 to the end user equipment 104. For example, each central unit 108 maps the fractional El frame to a DSL frame. In particular, each central unit 108 remaps the El timeslot 16 (also referred to as the CAS timeslot) for each fractional TDM frame received from the multiplexing card 120 to the timeslot after the last timeslot used for user data as described above. The corresponding remote unit 106 extracts the factional El timeslots and remaps the El timeslot 16 to its original location and provides the fractional El frame to the corresponding end user equipment 104.

Hence, system 100 reduces the cost of an E-carrier service by providing multiple El connections to remote locations from a single El connection at the central office. In addition, system 100 enables the delivery of the fractional El frames without requiring a redesign of the remote units 106 or the central units 108. Customers which do not require a full El frame are, thus, provided El service over an existing network infrastructure through the addition of the functionality provided by the El multiplexer card 120. Thus, multiple customers are able to connect to an El port while only consuming one El port at the central office TDM switch 110.

Figure 4 is a block diagram of one embodiment of an El multiplexer card 120. The exemplary El multiplexer card 120 in FIG. 4 includes a primary El port 422-1 and four additional El ports 422-2 ... 422-N. The El ports 422 are coupled to a logic device 426. The logic device 426 is responsible for switching timeslots between the primary El port 422-1 and the other El ports 422-2 ... 422-N described above. The logic device 426 is also responsible for the CAS signaling remapping of timeslots 16 and generation/termination of timeslot 0, as described above.

In this example, the logic device 426 is an FPGA that is controlled by a processing unit 428. The processing unit 428 is responsible for configuration, status and error handling of the El multiplexer card 120. For example, the processing unit 428 configures the FPGA 426 for the specific number of timeslot blocks to be used and the number of timeslots to be allocated to each timeslot block. The processing unit 428 is communicatively coupled to a memory 430, which, in some embodiments, stores a menu that includes the options for configuring the number of timeslot blocks and the number of timeslots allocated to each timeslot block.

The memory 430 can be implemented as any available media that can be accessed by a general purpose or special purpose computer or processor, or any programmable logic device. Suitable processor-readable media may include storage or memory media such as magnetic or optical media. For example, storage or memory media may include conventional hard disks, Compact Disk - Read Only Memory (CD-ROM), volatile or non-volatile media such as Random Access Memory (RAM) (including, but not limited to, Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate (DDR) RAM, RAMBUS Dynamic RAM (RDRAM), Static RAM (SRAM), etc.), Read Only Memory (ROM), Electrically Erasable Programmable ROM (EEPROM), and flash memory, etc. Suitable processor-readable media may also include transmission media such as electrical, electromagnetic, or digital signals, conveyed via a communication medium such as a network and/or a wireless link.

In addition, in some embodiments, processor-readable instructions are tangibly embodied on the memory 430 and, when executed by the processing unit 428, the processor-readable instructions cause the processing unit 428 to perform the configuration, status and error handling of the El multiplexer card 120. Although the logic device 426 is implemented as an FPGA in this example, it is to be understood that in other embodiments, other programmable logic devices are used such as a complex programmable logic device (CPLD), a field programmable object array (FPOA), or a digital signal processor (DSP). Additionally, in some embodiments, the logic device 426 is implemented as an application specific integrated circuit (ASIC).

Figure 5 is a flow chart depicting one embodiment of a method 500 of communicating fractional TDM frames. At block 502, a fractional TDM frame is transmitted from each of a plurality of end user devices (e.g. end user device equipment 104) to a corresponding remote unit (e.g. remote units 106). For example, the fractional TDM frame from one end user device may use 10 timeslots, whereas the fractional TDM frame from another end user device may use 5 timeslots. At block 504, the fractional TDM frame received at each remote unit is transported in a DSL frame over a DSL link (e.g. DSL links 114) to a corresponding central unit (e.g. central unit 108). Transporting the TDM frame includes mapping the CAS timeslot to a timeslot following the last timeslot carrying user data as described above. At block 506, the fractional TDM frame is extracted from the DSL frame at the corresponding central unit. Extracting the fractional TDM frame includes remapping the CAS timeslot to its original location and inserting the empty timeslots as described above. At block 508, the extracted fractional TDM frame is provided to a multiplexing card (e.g. multiplexing card 120). At block 510, the multiplexing card maps timeslots from each of the fractional TDM frames received from the central units to a single TDM frame as described above. At block 512, the single TDM frame is provided to the networking device.

FIG. 6 is a block diagram of one embodiment of a communication system 600 that enables communication signals from a plurality of Time Division Multiplex (TDM) ports 610 to be transmitted over a Digital Subscriber Line (DSL) link 608. System 600 includes a remote unit 604 (labeled as STU-R) coupled to a central unit 602 (labeled as STU-C) over the DSL link 608. In this exemplary embodiment, the Global. Standard High-Bit-Rate Digital Subscriber Line (G.SHDSL), defined in the ITU G.991.2 standard, is used for the DSL link 608. However, it is to be understood that other DSL variants can be used in other embodiments. The remote unit 604 and the central unit 602 each include a differential signaling interface 616 which is coupled to a differential signaling interface 616 of a multiplexer card 606. In this exemplary embodiment, the differential signaling interface 616 is implemented according to the International Telecommunication Union (ITU) V.35 standard. However, it is to be understood that other differential signaling interfaces can be used in other embodiments. For example, the ITU V.I 1 standard or the Electronic Industries Alliance (EIA) 485 standard can be used in other embodiments. Various connectors can be used with the above differential signaling interfaces such as, but not limited to, the connectors defined by the EIA-530 or EIA-449 standards.

Multiplexer cards 606-1 and 606-2 each include a plurality of TDM ports 610 and a differential signaling interface 616. In particular, in the exemplary embodiment shown in FIG. 6, each multiplexer card 606 includes 4 TDM ports 610. Each TDM port can be configured for full or fractional TDM frames. The multiplexer cards 606 combine the TDM frames from the TDM ports 610 into a single continuous data stream that is transmitted over the differential signaling interface 616. In addition, the multiplexer cards 606 separate a continuous data stream received over the differential signaling interface 616 into TDM frames provided to the respective TDM port 610. Each TDM port 610 can be configured for structured or unstructured operation. Structured operation refers to transmitting and receiving structured TDM frames which have a specified number of timeslots in each frame. In structured mode, each TDM port 610 can be configured for fractional TDM frames, with a specified number of timeslots. Error checking mechanisms, such as Cyclic Redundancy Check-4 (CRC-4), known to one of skill in the art can be enabled/disabled. Channel Associated Signaling (CAS) in timeslot 16 of each TDM frame can be enabled or disabled as well. CAS signaling is known to one of skill in the art. When CAS signaling is disabled, timeslot 16 is treated as a normal payload timeslot. When CAS signaling is enabled, pass-through of the CAS signaling can be used, or an idle code can be configured and inserted in the CAS timeslot 16. When fractional TDM frames are configured, the multiplexer cards 606 are configured, in some embodiments, for CAS timeslot remapping. In CAS timeslot remapping, the CAS signaling timeslot 16 is remapped as the timeslot following the last timeslot carrying user data as shown in FIG. 7. Additional details of CAS timeslot remapping are found in the '801 application. In unstructured mode, TDM ports 610 operate at 2 Mbits/sec unframed. In other words, in unstructured mode, TDM ports 610 transmit and receive unframed TDM timeslots at a rate of 2 Mbits/sec.

The differential signaling interface 616 is configured to operate at a data rate that will allow transport of all configured TDM ports 610, plus any overhead. A timeslot map is defined for the TDM ports 610 that are combined and transmitted over the differential signaling interface 616. No rigid mapping rules are adopted, which enables flexibility in the number of ports, order of ports, and number of timeslots that may be transported over the differential signaling interface 616. The timeslot map may be created via STU-C/STU-R craft menu screens, or via a menu screen of the multiplexer cards 606-1, and distributed to each device. A consistent timeslot map between each device in system 600 is maintained for proper operation. In some embodiments, the timeslot map is automatically created after configuring each TDM port 610. The timeslot map is then passed to the other devices (e.g. central unit 602 and remote unit 604) along with configuration information. The timeslot map defines the amount of traffic on the differential signaling interface 616 and is used as the basis for calculating the data rate of the differential signaling interface 616. In the exemplary embodiment of FIG. 6, each multiplexer card 606 includes a Field

Programmable Gate Array (FPGA) 618 that is responsible for timeslot mapping, El framing, CRC-4 handling, El alarms, Timeslot 16/ CAS handling, and V.35 signal generation and termination. However, it is to be understood that in other embodiments, other programmable logic devices are used, such as, but not limited to, a complex programmable logic device (CPLD), a field programmable object array (FPOA), and a digital signal processor (DSP).

The differential signaling interface 616 is an unframed interface in this example. Hence, data is transmitted and received as a continuous stream of bytes without any explicit frame delineation inherent in the signal. In this embodiment, TDM ports 610 can be configured in structured or unstructured mode as described above. In structured mode, the TDM signals are framed data streams. The system 600 is configured to identify an origin (e.g. start of the multiplexed signal on the differential signaling interface 616). A timeslot map is used together with the knowledge of the origin to locate each data stream. Even if all TDM ports 610 are configured in unstructured mode, the system 600 uses a defined map and origin to locate each TDM stream within the combined signal transported on the differential signaling interface 616. Since the differential signaling interface 616 is an unframed interface, the differential signaling interface 616 is assigned a data rate based on the timeslot map. For example, a time slot map of 32 timeslots is assigned a data rate of 2 Mbits/sec.

In some embodiments, prior to transmitting any data, each multiplexer card 606 transmits its request to send (RTS) signal over the differential signaling interface as shown in FIG. 8. On receipt of the RTS signal, the corresponding central unit 602 or remote unit 604 responds with a clear to send (CTS) signal as shown in FIG. 8. After the CTS signal is sent, both the multiplexer card 606 and corresponding central unit 602 or remote unit 604 can send data. The first byte sent from either side is the first byte of the timeslot map. All subsequent data is relative to the transmission of the first byte and no explicit framing information is included. If one side looses synchronization or can no longer locate its position in the map, RTS and CTS signals can be used to resynchronize. In other embodiments, High-level Data Link Control (HDLC) encoding is used to identify the origin or start of the signal. HDLC encoding can be implemented as bit-oriented or byte-oriented HDLC encoding. For example, bit-oriented HDLC encoding involves appending a two byte cyclic redundancy check (CRC) using the polynomial X16 + X12 + X5 +1. Each of the TDM frames are then examined for a continuous bit sequence of five 1 's (that is, 11111). A zero is inserted at the end of each sequence of five 1 's (that is, 111110). HDLC flags with the pattern "01111110" are also inserted at the beginning and end of the combined signal containing the TDM signals from each of the TDM ports 610. Zero insertion after a sequence of five Is in the payload is used to avoid confusion of payload with HDLC flags. The HDLC flags are used to identify the start and end of the combined signal.

Once the start of the combined signal has been identified via HDLC flags or RTS/CTS signaling, the timeslot map is used to identify the location of individual TDM signals and timeslots. The maximum size of the timeslot map is Nx32 timeslots where N is the number of full TDM frames supported. Smaller timeslot maps are also possible, and are created for configurations with less ports or fractional ports.

The TDM ports 610 can be located within the timeslot map in any order. Additionally, each TDM port 610 can be configured as full or fractional, and structured or unstructured. For example, Table 1 shows a timeslot map with TDM ports inserted in order - 610-1 (labeled El in Table 1), 610-2 (labeled E2 in Table 1), 610-3 (labeled E3 in Table 1), and 610-N (labeled E4 in Table 1). All TDM ports 610 are full El 's in structured mode in Table 1. In Table 1, F is the framing/synch byte (timeslot 0) and C is the CAS signaling byte (timeslot 16) for each TDM port 610.

Table 1

Another exemplary timeslot map is shown in Table 2. In table 2, only 2 TDM ports 610- 2 and 610-N are configured. TDM port 610-N is configured in unstructured mode and is inserted into the map first. Therefore, bandwidth for a full 32 timeslots must be allocated to the unstructured signal (labeled as U4). The TDM port 610-N is followed by the TDM port 610-2 that is configured as a fractional TDM port with 8 timeslots (labeled as E2). As with the timeslot map in Table 1 , F represents the framing/synch byte (timeslot 0) and C represents the CAS signaling byte (timeslot 16) for the structured TDM port 610-2. Additionally, in Table 2, CAS timeslot 16 remapping is used for TDM port 610-2 as described above and in the '801 application. In this example, timeslot 0, the framing byte, of the structured TDM frame is not dropped and is included in the data transfer.

Table 2

The central unit 602 and the remote unit 604 map the combined signals received over the differential signaling interface 616 from the respective multiplexer card 606 to a DSL frame. One exemplary embodiment of the timeslot mapping on the DSL link 608 between the central unit 602 and the remote unit 604 is shown in FIG. 9. As discussed above, in this exemplary embodiment, the G. SHDSL standard is used for DSL communications. Each of the central unit 602 and the remote unit 604, in this example, is configured with an El interface 611, an Ethernet interface 614, and the differential signaling interface 616, which is a V.35 interface in this example. The DSL interface, in the embodiment of FIG. 9, is operating in M-Pair mode, where M = 2 (i.e. 2-pair mode). As described above, the central unit 602 and remote unit 604 are coupled to a respective multiplexer card 606 via the differential signaling interface 616. Since, the V.35 signal is a continuous byte stream, the central unit 602 and remote unit 604 map the V.35 signal to a DSL frame by knowing when the V.35 signal starts and the data rate assigned to the differential signaling interface 616. The DSL interface is allocated timeslots for the V.35 signal, based on the data rate of the differential signaling interface 616. Based on the allocated DSL timeslots, the V.35 byte stream is mapped to DSL timeslots as shown in the exemplary embodiment of FIG. 9.

In this exemplary embodiment, interfaces are mapped into G. SHDSL in the following order: El, Ethernet, and differential signaling interface (V.35 in this example). All the El timeslots from El interface 611 are mapped into the G. SHDSL frame first. Then all the Ethernet timeslots from the Ethernet interface 614 are mapped into the G. SHDSL frame, followed by all the timeslots extracted from the differential signaling interface 616. It is to be understood that the mapping order of the interfaces can be different in other embodiments However, if an El interface 611 is configured on the central unit 602 and the central unit 604, the El interface is inserted first into the G. SHDSL frame in this embodiment.

In this exemplary embodiment, timeslot mapping is interleaved between the two G. SHDSL pairs (DSL pair 1 and DSL pair 2), which creates a doubling of the throughput by using 2-pairs versus using a single pair DSL link. For example, as shown in FIG. 9, timeslot 0 from the El interface 611 is mapped to DSL pair 1/sub-block 1/timeslot 1. Timeslot 1 from the El interface 611 is mapped to DSL pair 2/sub-block 1/timeslot 1 and timeslot 2 from the El interface 611 is mapped to DSL pair 1/sub-block 1/timeslot 2. This interleaving continues until all the timeslots from the first El frame on El interface 611 are mapped. After mapping the first El frame from El interface 611, the timeslots from the first frame of Ethernet interface 614 are interleaved between the DSL pair 1 and the DSL pair 2 in a similar manner. After mapping the Ethernet interface 614 timeslots from the first Ethernet frame, the timeslots extracted from the differential signaling interface 616 are interleaved in a similar manner between the DSL pairs 1 and 2 until sub-block 1 is filled on both DSL pair 1 and DSL pair 2. The sub-block size reflects the amount of data to be transferred. In particular, in a

G. SHDSL frame, there are 12 sub-blocks per block, and there are 4 blocks for a total of 48 sub- blocks per DSL frame, as shown in FIG. 9. The sub-block size is calculated to incorporate a frame from the El interface 611, the Ethernet interface 614 and a complete timeslot map from the differential signaling interface 616. Each of the interfaces is allocated a specified number of timeslots in each sub-block. Thus, once sub-block 1 is filled, timeslots are mapped to the following sub-block. When mapping interleaved timeslots from the DSL pairs to the corresponding interface, the central unit 602 and the remote unit 604 de-interleave the timeslots to place them in the original order.

FIG. 10 is a flow chart depicting one embodiment of a method 1000 of transporting signals from a plurality of TDM ports over a DSL. At block 1002, a first multiplexer card maps at least one timeslot from each of the plurality of TDM ports into a first combined signal. As discussed above, in this embodiment, each of the TDM ports is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard. In addition, in some embodiments, mapping the timeslots to the first combined signal includes bit stuffing or byte stuffing the signal and inserting HDLC flags at the beginning and end of the first combined signal as discussed above.

At block 1004, the first combined signal is transmitted over a differential signaling interface in the first multiplexer card to a differential signaling interface in a first unit, such as the central unit 602. The differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard in this embodiment. In some embodiments, transmitting the first combined signal via the differential signaling interface includes transmitting a request to send (RTS) signal over the differential signaling interface and waiting for a clear to send (CTS) in response to the RTS signal prior to transmitting the first combined signal over the differential signaling interface.

At block 1006, the first unit maps the first combined signal to timeslots in a DSL frame. In some embodiments, mapping the first combined signal comprises interleaving the first combined signal between timeslots in a first DSL frame on a first DSL pair and timeslots in a second DSL frame on a second DSL pair. In addition, in some embodiments the first unit also includes an Ethernet port and an additional TDM port. Signals from the Ethernet port and the additional TDM port are also interleaved between timeslots in the first DSL frame and the second DSL frame as discussed above.

At block 1008, the DSL frames are transmitted over a DSL link to a second unit, such as remote unit 604. At block 1010, the second unit extracts the DSL timeslots that correspond to the timeslots from the plurality of TDM ports in the first multiplexer card. The second unit also extracts the signals from the Ethernet port and the additional TDM port in the first unit. At block 1012, the second unit maps the extracted timeslots to a second combined signal. The second unit also maps signals from the Ethernet port and the additional TDM port to corresponding ports in the second unit (e.g. El port 611 and Ethernet port 614). At block 1014, the second unit transmits the second combined signal to a second multiplexer card via a differential signaling interface. At block 1016, the second multiplexer card extracts the timeslots from the second combined signal. At block 1018, at least one timeslot is provided to each of a plurality of TDM ports in the second multiplexer card. It is to be understood that while method 1000 is described in relation to a single direction, method 1000 can be used for bi-directional communication between the first and second units.

Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement, which is calculated to achieve the same purpose, may be substituted for the specific embodiments shown. Therefore, it is manifestly intended that this invention be limited only by the claims and the equivalents thereof.

Claims

CLAIMSWhat is claimed is:

1. A multiplexing card for fractional time division multiplex (TDM) frames, the multiplexing card comprising: a primary TDM port over which TDM frames are communicated to and from a networking device, a plurality of secondary TDM ports over each of which fractional TDM frames are communicated to and from a plurality of digital subscriber line (DSL) units; and a logic device coupled between the primary TDM port and the plurality of secondary TDM ports, wherein the logic device is operable to map timeslots from each of the fractional TDM frames received over the plurality of secondary TDM ports to timeslots in a TDM frame communicated over the primary TDM port, and to map each of a plurality of blocks of timeslots in a TDM frame received over the primary TDM port to one of the plurality of secondary TDM ports; wherein the combined number of timeslots containing user data in the fractional TDM frames received over the plurality of secondary TDM ports is less than or equal to the maximum number of available timeslots in the corresponding TDM frame communicated over the primary TDM port.

2. The multiplexing card of claim 1, wherein the logic device is a programmable logic device and the multiplexing card further comprises a processing unit to control configuration of the programmable logic device.

3. The multiplexing card of claim 2, wherein the programmable logic device is one of a field programmable gate array and a field programmable object array.

4. The multiplexing card of claim 1, wherein the TDM frames are structured according to an E-carrier protocol.

5. The multiplexing card of claim 1, wherein the TDM frames are structured according to a T-carrier protocol.

6. The multiplexing card of claim 1, wherein the logic device is further operable to remove a synchronization timeslot from each of the fractional TDM frames received over the plurality of secondary TDM ports, and to generate a synchronization timeslot for each of the plurality of blocks of timeslots mapped to a corresponding fractional TDM frame transmitted over one of the plurality of secondary TDM ports

7. The multiplexing card of claim 1, wherein the logic device is further operable to map a Channel Associated Signaling (CAS) timeslot from each of the fractional TDM frames received over the plurality of secondary TDM ports to a single CAS timeslot in the corresponding TDM frame communicated over the primary TDM port.

8. The multiplexing card of claim 1 , wherein the plurality of secondary TDM ports comprises four secondary TDM ports.

9. A communication system comprising: a plurality of end user devices having a time division multiplex (TDM) port; a plurality of remote units having a TDM port, the TDM port in each of the plurality of remote units coupled to the TDM port in one of the plurality of end user devices, a plurality of central units having a TDM port, each of the plurality of central units coupled to one of the plurality of remote units via a digital subscriber line (DSL) link, wherein each remote unit is operable to transport, over the DSL link to the corresponding central unit, a fractional TDM frame received from the corresponding end user device; a networking device to transmit and receive TDM frames; and a multiplexing card having a primary TDM port coupled to the networking device and a plurality of secondary TDM ports each coupled to the TDM port in one of the plurality of central units, wherein the multiplexing card is operable to map timeslots from each of the fractional TDM frames received from the plurality of central units to timeslots in a TDM frame transmitted over the primary TDM port to the networking device, and to map each of a plurality of blocks of timeslots in a TDM frame received over the primary TDM port from the networking device to a fractional TDM frame transmitted over one of the plurality of secondary TDM ports to one of the plurality of central units.

10. The communication system of claim 9, wherein the plurality of secondary TDM ports in the multiplexing card comprises four secondary TDM ports.

11. The communication system of claim 9, wherein the multiplexing card is operable to remove a synchronization timeslot from each of the fractional TDM frames received over the plurality of secondary TDM ports, and to generate a synchronization timeslot for each of the plurality of blocks of timeslots mapped to a corresponding fractional TDM frame transmitted over one of the plurality of secondary TDM ports.

12. The communication system of claim 9, wherein the multiplexing card is operable to map a Channel Associated Signaling (CAS) timeslot from each of the fractional TDM frames received over the plurality of secondary TDM ports to a single CAS timeslot in a corresponding TDM frame transmitted over the primary TDM port.

13. The communication system of claim 9, wherein the TDM frames are structured according to an E-carrier protocol.

14. The communication system of claim 9, wherein the TDM frames are structured according to a T-carrier protocol.

15. The communication system of claim 9, wherein each of the plurality of remote units is operable to map a Channel Associated Signaling (CAS) timeslot to a timeslot immediately following the last timeslot carrying user data prior to transporting the fractional TDM frame over the DSL link to the corresponding central unit; and wherein the corresponding central unit is operable to map the CAS timeslot to its original location in the fractional TDM frame.

16. The communication system of claim 9, wherein the DSL link is configured according to the Global.Standard High-Bit-Rate Digital Subscriber Line (G. SHDSL) standard.

17. A method of communicating fractional TDM frames, the method comprising: transmitting a fractional TDM frame from each of a plurality of end user devices to a corresponding remote unit; transporting the fractional TDM frame received at each remote unit in a digital subscriber line (DSL) frame over a DSL link to a corresponding central unit; extracting the fractional TDM frame from the DSL frame at each central unit; providing the extracted fractional TDM frame from each central unit to a multiplexing card; mapping timeslots from each of the fractional TDM frames to timeslots in a single TDM frame in the multiplexing card; and providing the single TDM frame to a networking device.

18. The method of claim 17, wherein transporting the fractional TDM frame received at each remote unit in a digital subscriber line (DSL) frame over a DSL link comprises: mapping a Channel Associated Signaling (CAS) timeslot to a timeslot immediately following the last timeslot carrying user data; and wherein extracting the fractional TDM frame from the DSL frame at each central unit includes mapping the CAS timeslot to its original location.

19. The method of claim 17, wherein mapping timeslots from each of the fractional TDM frames to timeslots in a single TDM frame comprises: removing the synchronization timeslot from each of the fractional TDM frames; and mapping the Channel Associated Signaling (CAS) timeslot from each of the fractional TDM frames to a single CAS timeslot in the single TDM frame.

20. The method of claim 17, wherein each of the fractional TDM frames is configured according to an E-carrier protocol.

21. A communication system comprising: a first multiplexer card having a first plurality of time division multiplex (TDM) ports and a first differential signaling interface, wherein the first multiplexer card is operable to map timeslots from each of the first plurality of TDM ports to a first combined signal transmitted via the first differential signaling interface; a first unit having a second differential signaling interface coupled to the first differential signaling interface, wherein the first unit is operable to extract the timeslots from the first combined signal and to map the extracted timeslots to a digital subscriber line (DSL) frame for transmission over a DSL link; a second unit coupled to the first unit via the DSL link, the second unit having a third differential signaling interface, wherein the second unit is operable to extract the timeslots in the DSL frame and to map the timeslots to a second combined signal transmitted via the third differential signaling interface; and a second multiplexer card having a second plurality of TDM ports and a fourth differential signaling interface, wherein the second multiplexer card is operable to map each of the timeslots from the second combined signal to one of the second plurality of TDM ports.

22. The communication system of claim 21, wherein each TDM port of the first and second plurality of TDM ports is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard.

23. The communication system of claim 21, wherein each TDM port of the first and second plurality of TDM ports is configured for one of structured and unstructured operation.

24. The communication system of claim 21, wherein at least one TDM port of each of the first and second plurality of TDM ports is configured to transmit and receive fractional TDM frames.

25. The communication system of claim 21 , wherein each differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard.

26. The communication system of claim 21, wherein each of the first multiplexer card, the first unit, the second unit, and the second multiplexer cards are operable to insert High-level Data

Link Control (HDLC) flags at the beginning and end of each combined signal transmitted over the respective differential signaling interfaces.

27. The communication system of claim 21, wherein each of the first multiplexer card, the first unit, the second unit, and the second multiplexer card are operable to transmit a request to send (RTS) signal over the differential signaling interface and to wait for a clear to send (CTS) in response to the RTS signal prior to transmitting each combined signal over the respective differential signaling interfaces.

28. The communication system of claim 21, wherein each of the first unit and the second unit include a TDM port and an Ethernet port; wherein each of the first unit and the second unit are further operable to map timeslots from the TDM port and the Ethernet port to the DSL frame.

29. The communication system of claim 21 , wherein the first unit and the second unit are configured according to the Global. Standard High-Bit-Rate Digital Subscriber Line (G. SHDSL) standard.

30. The communication system of claim 21 , wherein the first unit and the second unit are operable to map timeslots to a DSL frame by interleaving the timeslots between a first DSL frame on a first DSL pair and a second DSL frame on a second DSL pair.

31. A multiplexer card comprising: a plurality of time division multiplex (TDM) ports; a differential signaling interface; and a logic unit operable to map timeslots from each of the plurality of TDM ports to a combined signal transmitted via the differential signaling interface; and to map each timeslot in a signal received over the differential signaling interface to one of the plurality of TDM ports.

32. The multiplexer card of claim 31 , wherein the logic unit comprises one of a field programmable gate array (FPGA), a field programmable object array (FPOA), a digital signal processor (DSP), and a complex programmable logic device (CPLD).

33. The multiplexer card of claim 31, wherein each of the plurality of TDM ports is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard.

34. The multiplexer card of claim 31, wherein each of the plurality of TDM ports is configured for one of structured and unstructured operation.

35. The multiplexer card of claim 31, wherein at least one of the TDM ports is configured to transmit and receive fractional TDM frames.

36. The multiplexer card of claim 31 , wherein the differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard.

37. The multiplexer card of claim 31 , wherein the logic unit is operable to insert High-level Data Link Control (HDLC) flags at the beginning and end of the combined signal.

38. The multiplexer card of claim 31 , wherein the logic unit is operable to transmit a request to send (RTS) signal over the differential signaling interface and to wait for a clear to send (CTS) in response to the RTS signal prior to transmitting the combined signal over the differential signaling interface.

39. A method of transporting signals from a plurality of time division multiplex (TDM) ports over a digital subscriber line (DSL) link, the method comprising: mapping at least one timeslot from each of the plurality of TDM ports to a first combined signal in a first multiplexer card; transmitting the first combined signal to a first unit via a differential signaling interface in the first multiplexer card; mapping the first combined signal to timeslots in a DSL frame at the first unit; transmitting the DSL frame over the DSL link to a second unit; extracting the DSL timeslots, which correspond to the timeslots from the plurality of

TDM ports in the first multiplexer card, from the DSL frame at the second unit; mapping the extracted DSL timeslots to a second combined signal at the second unit; transmitting the second combined signal to a second multiplexer card via a differential signaling interface in the second unit; extracting the timeslots from the second combined signal at the second multiplexer card; and providing at least one extracted timeslot to each of a plurality of TDM ports in the second multiplexer card.

40. The method of claim 39, wherein the differential signaling interface is configured according to the International Telecommunication Union (ITU) V.35 standard.

41. The method of claim 39, wherein each of the plurality of TDM ports in the first and second multiplexer cards is configured to transmit and receive TDM frames according to the International Telecommunications Union (ITU) G.703 standard.

42. The method of claim 39, wherein the first and second units are configured according to the Global.Standard High-Bit-Rate Digital Subscriber Line (G. SHDSL) standard.

43. The method of claim 39, wherein mapping at least one timeslot from each of the plurality of TDM ports to the first combined signal in the first multiplexer card comprises inserting High- level Data Link Control (HDLC) flags at the beginning and end of the first combined signal.

44. The method of claim 39, wherein transmitting the first combined signal to the first unit via the differential signaling interface in the first multiplexer card includes: transmitting a request to send (RTS) signal over the differential signaling interface; and waiting for a clear to send (CTS) in response to the RTS signal prior to transmitting the first combined signal over the differential signaling interface.

45. The method of claim 39, wherein mapping the first combined signal to timeslots in a DSL frame at the first unit includes by interleaving the first combined signal between timeslots in a first DSL frame on a first DSL pair and timeslots in a second DSL frame on a second DSL pair.