WO2008057833A3 - System and method for remote direct memory access without page locking by the operating system - Google Patents

System and method for remote direct memory access without page locking by the operating system Download PDF

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Publication number
WO2008057833A3
WO2008057833A3 PCT/US2007/082869 US2007082869W WO2008057833A3 WO 2008057833 A3 WO2008057833 A3 WO 2008057833A3 US 2007082869 W US2007082869 W US 2007082869W WO 2008057833 A3 WO2008057833 A3 WO 2008057833A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory access
direct memory
remote direct
operating system
page locking
Prior art date
Application number
PCT/US2007/082869
Other languages
French (fr)
Other versions
WO2008057833A2 (en
Inventor
David Gingold
Philip J Mucci
Lawrence C Stewart
Judson S Leonard
Matthew H Reilly
Original Assignee
Sicortex Inc
David Gingold
Philip J Mucci
Lawrence C Stewart
Judson S Leonard
Matthew H Reilly
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/594,446 external-priority patent/US7533197B2/en
Priority claimed from US11/594,447 external-priority patent/US20080109604A1/en
Priority claimed from US11/594,427 external-priority patent/US20080109569A1/en
Priority claimed from US11/594,443 external-priority patent/US20080109573A1/en
Application filed by Sicortex Inc, David Gingold, Philip J Mucci, Lawrence C Stewart, Judson S Leonard, Matthew H Reilly filed Critical Sicortex Inc
Publication of WO2008057833A2 publication Critical patent/WO2008057833A2/en
Publication of WO2008057833A3 publication Critical patent/WO2008057833A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G06F12/0835—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means for main memory peripheral accesses (e.g. I/O or DMA)
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]

Abstract

Systems and methods for remote direct memory access (404) without page locking by the operating system (406). A multi-node computer system (426-432) has a plurality of interconnected processing nodes (434,412). DMA engines are used in a way to avoid page locking.
PCT/US2007/082869 2006-11-08 2007-10-29 System and method for remote direct memory access without page locking by the operating system WO2008057833A2 (en)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US11/594,427 2006-11-08
US11/594,446 US7533197B2 (en) 2006-11-08 2006-11-08 System and method for remote direct memory access without page locking by the operating system
US11/594,447 US20080109604A1 (en) 2006-11-08 2006-11-08 Systems and methods for remote direct memory access to processor caches for RDMA reads and writes
US11/594,443 2006-11-08
US11/594,446 2006-11-08
US11/594,427 US20080109569A1 (en) 2006-11-08 2006-11-08 Remote DMA systems and methods for supporting synchronization of distributed processes in a multi-processor system using collective operations
US11/594,443 US20080109573A1 (en) 2006-11-08 2006-11-08 RDMA systems and methods for sending commands from a source node to a target node for local execution of commands at the target node
US11/594,447 2006-11-08

Publications (2)

Publication Number Publication Date
WO2008057833A2 WO2008057833A2 (en) 2008-05-15
WO2008057833A3 true WO2008057833A3 (en) 2008-10-02

Family

ID=39365212

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/082869 WO2008057833A2 (en) 2006-11-08 2007-10-29 System and method for remote direct memory access without page locking by the operating system

Country Status (1)

Country Link
WO (1) WO2008057833A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11847074B2 (en) 2020-11-02 2023-12-19 Honeywell International Inc. Input/output device operational modes for a system with memory pools

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9953006B2 (en) 2015-06-23 2018-04-24 International Business Machines Corporation Lock-free processing of stateless protocols over RDMA
US10891253B2 (en) 2016-09-08 2021-01-12 Microsoft Technology Licensing, Llc Multicast apparatuses and methods for distributing data to multiple receivers in high-performance computing and cloud-based networks
JP6443572B1 (en) * 2018-02-02 2018-12-26 富士通株式会社 Storage control device, storage control method, and storage control program
GB2575289B (en) * 2018-07-04 2020-09-16 Graphcore Ltd Streaming engine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5887134A (en) * 1997-06-30 1999-03-23 Sun Microsystems System and method for preserving message order while employing both programmed I/O and DMA operations

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5887134A (en) * 1997-06-30 1999-03-23 Sun Microsystems System and method for preserving message order while employing both programmed I/O and DMA operations

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11847074B2 (en) 2020-11-02 2023-12-19 Honeywell International Inc. Input/output device operational modes for a system with memory pools

Also Published As

Publication number Publication date
WO2008057833A2 (en) 2008-05-15

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