WO2006084589A3 - Data processing system and method for processing transaction information - Google Patents

Data processing system and method for processing transaction information Download PDF

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Publication number
WO2006084589A3
WO2006084589A3 PCT/EP2006/000739 EP2006000739W WO2006084589A3 WO 2006084589 A3 WO2006084589 A3 WO 2006084589A3 EP 2006000739 W EP2006000739 W EP 2006000739W WO 2006084589 A3 WO2006084589 A3 WO 2006084589A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
transaction information
data processing
processing system
operation processing
Prior art date
Application number
PCT/EP2006/000739
Other languages
German (de)
French (fr)
Other versions
WO2006084589A2 (en
Inventor
Joerg Westerweller
Juergen Kranz
Original Assignee
Deutsche Post Ag
Joerg Westerweller
Juergen Kranz
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Post Ag, Joerg Westerweller, Juergen Kranz filed Critical Deutsche Post Ag
Publication of WO2006084589A2 publication Critical patent/WO2006084589A2/en
Publication of WO2006084589A3 publication Critical patent/WO2006084589A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes

Abstract

The invention relates to a data processing system for processing transaction information, comprising a memory element. According to the invention, said memory element is configured as a shared memory (100) by a memory area of a computer, the memory area permits standard access by several clients and an interface for accessing the shared memory (100) is configured as an inter-process communication layer (IPC layer). The data processing system is characterised in that it contains several operation processing modules (20), that the latter are configured in such a way that they record status information, that said status information that has been recorded by the operation processing modules (20) is stored in the memory element and that memory areas, which are assigned to a respective physical port (30) or the operation processing modules (20), are contained in the shared memory (100). The invention also relates to a method for processing transaction information.
PCT/EP2006/000739 2005-02-09 2006-01-27 Data processing system and method for processing transaction information WO2006084589A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05002651.7 2005-02-09
EP05002651A EP1691323B1 (en) 2005-02-09 2005-02-09 Data processing system and method for processing transactional data

Publications (2)

Publication Number Publication Date
WO2006084589A2 WO2006084589A2 (en) 2006-08-17
WO2006084589A3 true WO2006084589A3 (en) 2007-11-08

Family

ID=34933650

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2006/000739 WO2006084589A2 (en) 2005-02-09 2006-01-27 Data processing system and method for processing transaction information

Country Status (4)

Country Link
EP (1) EP1691323B1 (en)
AT (1) ATE462171T1 (en)
DE (1) DE502005009273D1 (en)
WO (1) WO2006084589A2 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6302326B1 (en) * 1996-06-10 2001-10-16 Diebold, Incorporated Financial transaction processing system and method
US20030014552A1 (en) * 2001-06-15 2003-01-16 Girish Vaitheeswaran Methodology providing high-speed shared memory access between database middle tier and database server
US20030050972A1 (en) * 2001-07-17 2003-03-13 Felt Edward P. System and method for transaction processing with transaction property feature
US20030069938A1 (en) * 2001-10-04 2003-04-10 Russell Lance W. Shared memory coupling of network infrastructure devices
US6728746B1 (en) * 1995-02-14 2004-04-27 Fujitsu Limited Computer system comprising a plurality of machines connected to a shared memory, and control method for a computer system comprising a plurality of machines connected to a shared memory
US20040117510A1 (en) * 2002-12-12 2004-06-17 International Business Machines Corporation Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6728746B1 (en) * 1995-02-14 2004-04-27 Fujitsu Limited Computer system comprising a plurality of machines connected to a shared memory, and control method for a computer system comprising a plurality of machines connected to a shared memory
US6302326B1 (en) * 1996-06-10 2001-10-16 Diebold, Incorporated Financial transaction processing system and method
US20030014552A1 (en) * 2001-06-15 2003-01-16 Girish Vaitheeswaran Methodology providing high-speed shared memory access between database middle tier and database server
US20030050972A1 (en) * 2001-07-17 2003-03-13 Felt Edward P. System and method for transaction processing with transaction property feature
US20030069938A1 (en) * 2001-10-04 2003-04-10 Russell Lance W. Shared memory coupling of network infrastructure devices
US20040117510A1 (en) * 2002-12-12 2004-06-17 International Business Machines Corporation Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system

Also Published As

Publication number Publication date
EP1691323B1 (en) 2010-03-24
EP1691323A1 (en) 2006-08-16
WO2006084589A2 (en) 2006-08-17
DE502005009273D1 (en) 2010-05-06
ATE462171T1 (en) 2010-04-15

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