WO2006076420A3 - High-speed sampling architecture - Google Patents

High-speed sampling architecture Download PDF

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Publication number
WO2006076420A3
WO2006076420A3 PCT/US2006/000959 US2006000959W WO2006076420A3 WO 2006076420 A3 WO2006076420 A3 WO 2006076420A3 US 2006000959 W US2006000959 W US 2006000959W WO 2006076420 A3 WO2006076420 A3 WO 2006076420A3
Authority
WO
WIPO (PCT)
Prior art keywords
samples
sub
rate
generating
analog
Prior art date
Application number
PCT/US2006/000959
Other languages
French (fr)
Other versions
WO2006076420A2 (en
Inventor
Sandeep Kumar Gupta
Olesty Zabroda
Original Assignee
Teranetics Inc
Sandeep Kumar Gupta
Olesty Zabroda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teranetics Inc, Sandeep Kumar Gupta, Olesty Zabroda filed Critical Teranetics Inc
Priority to JP2007551346A priority Critical patent/JP4593633B2/en
Priority to CN2006800076127A priority patent/CN101164237B/en
Publication of WO2006076420A2 publication Critical patent/WO2006076420A2/en
Publication of WO2006076420A3 publication Critical patent/WO2006076420A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245—Details of sampling arrangements or methods
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing

Abstract

A high-speed sampling system (Fig. 6) and an analog to digital converter (620, 622, 624) are disclosed. One embodiment of a method of sampling (610, 620, 622, 624) a signal includes receiving an analog signal and generating first samples at a rate of Fs, and generating second sub-samples (M bit @Fs/n) from the first samples at a rate of Fs/N and having a relative phase of approximately (360/N)*(i-1) degrees, where i varies from 1 to N. In a first embodiment, at most two second sub- samplers are tracking the output of the first sampler at any point in time. In a second embodiment, only one of the N second sub-samplers are tracking the output of the first sampler at any point in time. A third embodiment further includes generating third samples from the second samples at a rate of Fs/N, and having a relative phase of approximately ((360/N)*(i-1)+180) degrees. A method of interleaved analog to digital converting includes corresponding time interleaved ADCs receiving the third samples.
PCT/US2006/000959 2005-01-12 2006-01-12 High-speed sampling architecture WO2006076420A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007551346A JP4593633B2 (en) 2005-01-12 2006-01-12 High-speed sampling architecture
CN2006800076127A CN101164237B (en) 2005-01-12 2006-01-12 High-speed sampling architectures

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/033,661 US7015842B1 (en) 2005-01-12 2005-01-12 High-speed sampling architectures
US11/033,661 2005-01-12

Publications (2)

Publication Number Publication Date
WO2006076420A2 WO2006076420A2 (en) 2006-07-20
WO2006076420A3 true WO2006076420A3 (en) 2006-10-19

Family

ID=36045576

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/000959 WO2006076420A2 (en) 2005-01-12 2006-01-12 High-speed sampling architecture

Country Status (5)

Country Link
US (2) US7015842B1 (en)
JP (1) JP4593633B2 (en)
CN (1) CN101164237B (en)
TW (1) TWI390855B (en)
WO (1) WO2006076420A2 (en)

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US7015842B1 (en) * 2005-01-12 2006-03-21 Teranetics, Inc. High-speed sampling architectures
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CN101802926B (en) * 2007-09-12 2013-07-10 Nxp股份有限公司 Time-interleaved track and hold
GB0717840D0 (en) * 2007-09-13 2007-10-24 Nxp Bv A signal sampling circuit
JP2012506557A (en) * 2008-10-22 2012-03-15 ライフ テクノロジーズ コーポレーション Integrated sensor arrays for biological and chemical analysis
US8086197B2 (en) * 2008-11-12 2011-12-27 Nxp B.V. Multi-channel receiver architecture and reception method
JP2010193089A (en) * 2009-02-17 2010-09-02 Toshiba Corp Discrete time circuit
US7924062B2 (en) * 2009-07-15 2011-04-12 Mediatek Inc. Sampling circuits
US8310387B2 (en) * 2009-11-30 2012-11-13 Intersil Americas Inc. Sampling method for time-interleaved data converters in frequency-multiplexed communications systems
US8248282B2 (en) * 2010-08-17 2012-08-21 Texas Instruments Incorporated Track and hold architecture with tunable bandwidth
US8611483B2 (en) 2011-06-03 2013-12-17 Maxlinear, Inc. Multi-layer time-interleaved analog-to-digital convertor (ADC)
US8344920B1 (en) 2011-09-29 2013-01-01 Hittite Microwave Norway As Methods and apparatus for calibrating pipeline analog-to-digital converters
US8604953B2 (en) * 2011-11-14 2013-12-10 Analog Devices, Inc. Calibrating timing, gain and bandwidth mismatch in interleaved ADCs
US8941518B2 (en) 2012-02-14 2015-01-27 Hittite Microwave Corporation Methods and apparatus for calibrating pipeline analog-to-digital converters having multiple channels
US8610467B2 (en) * 2012-04-25 2013-12-17 Freescale Semiconductor, Inc. Sample and hold circuit
JP5667602B2 (en) * 2012-06-28 2015-02-12 旭化成エレクトロニクス株式会社 Sampling circuit, integrating circuit and A / D converter
US8736471B2 (en) 2012-08-22 2014-05-27 Hittite Microwave Corporation Methods and apparatus for calibrating stages in pipeline analog-to-digital converters
GB201305473D0 (en) 2013-03-26 2013-05-08 Ibm Sampling device with buffer circuit for high-speed adcs
GB2519746B (en) * 2013-10-22 2016-12-14 Canon Kk Method, device and computer program for encapsulating scalable partitioned timed media data
US9143150B1 (en) * 2014-08-25 2015-09-22 Nxp B.V. Data communications with analog-to-digital conversion
JP2016225840A (en) * 2015-05-29 2016-12-28 株式会社東芝 Amplifier circuit, ad converter, radio communication device, and sensor system
US9979582B1 (en) 2017-07-10 2018-05-22 IQ-Analog Corp. Multi-zone analog-to-digital converter (ADC)
US10033398B1 (en) 2017-07-10 2018-07-24 IQ-Analog Corporation Multi-zone digital-to-analog converter (DAC)
CN107911118A (en) * 2017-12-08 2018-04-13 成都聚利中宇科技有限公司 A kind of multi-channel sampling tracking keeps equipment and signal sampling method
CN108494402B (en) * 2018-03-14 2021-07-27 东南大学 TIADC system error estimation and compensation method based on sine fitting
US10707889B1 (en) 2019-05-13 2020-07-07 Analog Devices International Unlimited Company Interleaving method for analog to digital converters
US10790845B1 (en) * 2019-05-31 2020-09-29 The Boeing Company Clocking circuit and method for time-interleaved analog-to-digital converters
US11196534B1 (en) * 2020-12-02 2021-12-07 Ciena Corporation Apparatus and methods for low power clock generation in multi-channel high speed devices

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US7015842B1 (en) * 2005-01-12 2006-03-21 Teranetics, Inc. High-speed sampling architectures

Also Published As

Publication number Publication date
JP2008527925A (en) 2008-07-24
CN101164237B (en) 2012-03-21
JP4593633B2 (en) 2010-12-08
US7015842B1 (en) 2006-03-21
US7132965B2 (en) 2006-11-07
US20060152393A1 (en) 2006-07-13
CN101164237A (en) 2008-04-16
TW200640149A (en) 2006-11-16
TWI390855B (en) 2013-03-21
WO2006076420A2 (en) 2006-07-20

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