WO2006053069A3 - Low-k dielectric layer formed from aluminosilicate precursors - Google Patents

Low-k dielectric layer formed from aluminosilicate precursors Download PDF

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Publication number
WO2006053069A3
WO2006053069A3 PCT/US2005/040635 US2005040635W WO2006053069A3 WO 2006053069 A3 WO2006053069 A3 WO 2006053069A3 US 2005040635 W US2005040635 W US 2005040635W WO 2006053069 A3 WO2006053069 A3 WO 2006053069A3
Authority
WO
WIPO (PCT)
Prior art keywords
low
dielectric layer
layer formed
aluminosilicate precursors
aluminosilicate
Prior art date
Application number
PCT/US2005/040635
Other languages
French (fr)
Other versions
WO2006053069A2 (en
Inventor
Michael Goodner
Original Assignee
Intel Corp
Michael Goodner
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Michael Goodner filed Critical Intel Corp
Priority to JP2007540195A priority Critical patent/JP2008519459A/en
Priority to DE112005002334T priority patent/DE112005002334T5/en
Priority to CN2005800357785A priority patent/CN101053070B/en
Publication of WO2006053069A2 publication Critical patent/WO2006053069A2/en
Publication of WO2006053069A3 publication Critical patent/WO2006053069A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312Organic layers, e.g. photoresist
    • H01L21/3121Layers comprising organo-silicon compounds
    • H01L21/3122Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Silicates, Zeolites, And Molecular Sieves (AREA)

Abstract

A method for forming a high mechanical strength, low k, interlayer dielectric material with aluminosilicate precursors so that aluminum is facilely incorporated into the silicon matrix of the material, and an integrated circuit device comprising one or more high-strength, low-k interlayer dielectric layers so formed.
PCT/US2005/040635 2004-11-08 2005-11-08 Low-k dielectric layer formed from aluminosilicate precursors WO2006053069A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007540195A JP2008519459A (en) 2004-11-08 2005-11-08 Low-k dielectric layer formed from aluminosilicate precursor
DE112005002334T DE112005002334T5 (en) 2004-11-08 2005-11-08 Low-K dielectric layer formed from precursors of an aluminum silicate
CN2005800357785A CN101053070B (en) 2004-11-08 2005-11-08 Low-k dielectric layer formed from aluminosilicate precursors

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/984,595 2004-11-08
US10/984,595 US7563727B2 (en) 2004-11-08 2004-11-08 Low-k dielectric layer formed from aluminosilicate precursors

Publications (2)

Publication Number Publication Date
WO2006053069A2 WO2006053069A2 (en) 2006-05-18
WO2006053069A3 true WO2006053069A3 (en) 2006-11-23

Family

ID=36315480

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/040635 WO2006053069A2 (en) 2004-11-08 2005-11-08 Low-k dielectric layer formed from aluminosilicate precursors

Country Status (6)

Country Link
US (1) US7563727B2 (en)
JP (1) JP2008519459A (en)
CN (1) CN101053070B (en)
DE (1) DE112005002334T5 (en)
TW (1) TWI310224B (en)
WO (1) WO2006053069A2 (en)

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US6913992B2 (en) 2003-03-07 2005-07-05 Applied Materials, Inc. Method of modifying interlayer adhesion
US7563727B2 (en) 2004-11-08 2009-07-21 Intel Corporation Low-k dielectric layer formed from aluminosilicate precursors
US20060289966A1 (en) * 2005-06-22 2006-12-28 Dani Ashay A Silicon wafer with non-soluble protective coating
KR100698094B1 (en) * 2005-07-27 2007-03-23 동부일렉트로닉스 주식회사 Method for forming metal line of semiconductor device
US7598183B2 (en) * 2006-09-20 2009-10-06 Applied Materials, Inc. Bi-layer capping of low-K dielectric films
JP5354143B2 (en) * 2007-07-12 2013-11-27 日東化成株式会社 Curing catalyst for organic polymer and moisture curable composition containing the same
JP5354511B2 (en) * 2007-07-12 2013-11-27 日東化成株式会社 Curing catalyst for organic polymer and moisture curable organic polymer composition containing the same
JP5177809B2 (en) * 2007-07-02 2013-04-10 日東化成株式会社 Curing catalyst for organic polymer and moisture curable composition containing the same
WO2009004986A1 (en) * 2007-07-02 2009-01-08 Nitto Kasei Co., Ltd. Curing catalyst for organic polymer and moisture-curable composition containing the same
KR101895398B1 (en) * 2011-04-28 2018-10-25 삼성전자 주식회사 Method of forming an oxide layer and a method of fabricating a semiconductor device comprising the same
JP5545277B2 (en) * 2011-08-26 2014-07-09 信越化学工業株式会社 Solar cell and manufacturing method thereof
KR102123996B1 (en) 2013-02-25 2020-06-17 삼성전자주식회사 Aluminum precursor, method of forming a thin layer and method of forming a capacitor using the same
CN104103572B (en) * 2013-04-02 2017-02-08 中芯国际集成电路制造(上海)有限公司 Formation method of multi-hole low-k dielectric layer and multi-hole low-k dielectric layer
WO2018118932A1 (en) * 2016-12-22 2018-06-28 Illumina, Inc. Imprinting apparatus
US11649560B2 (en) 2019-06-20 2023-05-16 Applied Materials, Inc. Method for forming silicon-phosphorous materials
JP2024022694A (en) * 2020-12-28 2024-02-20 株式会社Adeka Thin film forming raw material for atomic layer deposition method, thin film manufacturing method, and aluminum compound

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WO2001086708A2 (en) * 2000-05-09 2001-11-15 Motorola, Inc. Amorphous metal oxide gate dielectric structure
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US20040099951A1 (en) * 2002-11-21 2004-05-27 Hyun-Mog Park Air gap interconnect structure and method

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JPS56130945A (en) * 1980-03-18 1981-10-14 Toshiba Corp Coupling agent between inorganic insulating film with silicon and polyimide resin film
WO2001086708A2 (en) * 2000-05-09 2001-11-15 Motorola, Inc. Amorphous metal oxide gate dielectric structure
US20030127640A1 (en) * 2002-01-08 2003-07-10 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing semiconductor device
WO2004017378A2 (en) * 2002-08-18 2004-02-26 Aviza Technology, Inc. Atomic layer deposition of high k metal silicates
US20040099951A1 (en) * 2002-11-21 2004-05-27 Hyun-Mog Park Air gap interconnect structure and method

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Also Published As

Publication number Publication date
US20060097359A1 (en) 2006-05-11
CN101053070A (en) 2007-10-10
TWI310224B (en) 2009-05-21
CN101053070B (en) 2010-07-21
DE112005002334T5 (en) 2007-12-27
US7563727B2 (en) 2009-07-21
JP2008519459A (en) 2008-06-05
TW200629414A (en) 2006-08-16
WO2006053069A2 (en) 2006-05-18

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