WO2006023289A3 - Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures - Google Patents

Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures Download PDF

Info

Publication number
WO2006023289A3
WO2006023289A3 PCT/US2005/027786 US2005027786W WO2006023289A3 WO 2006023289 A3 WO2006023289 A3 WO 2006023289A3 US 2005027786 W US2005027786 W US 2005027786W WO 2006023289 A3 WO2006023289 A3 WO 2006023289A3
Authority
WO
WIPO (PCT)
Prior art keywords
strained semiconductor
insulator structures
semiconductor
methods
insulator
Prior art date
Application number
PCT/US2005/027786
Other languages
French (fr)
Other versions
WO2006023289A2 (en
Inventor
Kishor P Gadkaree
Matthew J Dejneka
Linda R Pinckney
Bruce G Aitken
Original Assignee
Corning Inc
Kishor P Gadkaree
Matthew J Dejneka
Linda R Pinckney
Bruce G Aitken
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Corning Inc, Kishor P Gadkaree, Matthew J Dejneka, Linda R Pinckney, Bruce G Aitken filed Critical Corning Inc
Priority to KR1020077006152A priority Critical patent/KR101140450B1/en
Priority to JP2007527857A priority patent/JP2008510315A/en
Priority to EP05779271A priority patent/EP1782472B1/en
Publication of WO2006023289A2 publication Critical patent/WO2006023289A2/en
Publication of WO2006023289A3 publication Critical patent/WO2006023289A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Abstract

The present invention relates to semiconductor-on-insulator structures having strained semiconductor layers. According to one embodiment of the invention, a semiconductor-on-insulator structure has a first layer including a semiconductor material, attached to a second layer including a glass or glass-ceramic, with the CTEs of the semiconductor and glass or glass-ceramic selected such that the first layer is under tensile strain. The present invention also relates to methods for making strained semiconductor-on-insulator layers.
PCT/US2005/027786 2004-08-18 2005-08-03 Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures WO2006023289A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020077006152A KR101140450B1 (en) 2004-08-18 2005-08-03 Strained semiconductor-on-insulator structure and methods for making strained semiconductor-on-insulator structures
JP2007527857A JP2008510315A (en) 2004-08-18 2005-08-03 Strained semiconductor structure on insulator and method for making strained semiconductor structure on insulator
EP05779271A EP1782472B1 (en) 2004-08-18 2005-08-03 Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60278204P 2004-08-18 2004-08-18
US60/602,782 2004-08-18

Publications (2)

Publication Number Publication Date
WO2006023289A2 WO2006023289A2 (en) 2006-03-02
WO2006023289A3 true WO2006023289A3 (en) 2007-03-01

Family

ID=35968055

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/027786 WO2006023289A2 (en) 2004-08-18 2005-08-03 Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures

Country Status (7)

Country Link
US (1) US7262466B2 (en)
EP (1) EP1782472B1 (en)
JP (1) JP2008510315A (en)
KR (1) KR101140450B1 (en)
CN (1) CN100527416C (en)
TW (1) TWI289904B (en)
WO (1) WO2006023289A2 (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10350034A1 (en) * 2003-10-27 2005-05-25 Robert Bosch Gmbh Antenna arrangement in particular for radar applications in motor vehicles
JP2008511137A (en) * 2004-08-18 2008-04-10 コーニング インコーポレイテッド Semiconductor structure on insulator with high strain glass / glass-ceramic
JP5638755B2 (en) * 2005-08-17 2014-12-10 コーニング インコーポレイテッド High strain point glass
JP5041714B2 (en) * 2006-03-13 2012-10-03 信越化学工業株式会社 Microchip and SOI substrate for microchip manufacturing
US7608521B2 (en) * 2006-05-31 2009-10-27 Corning Incorporated Producing SOI structure using high-purity ion shower
US20070281440A1 (en) * 2006-05-31 2007-12-06 Jeffrey Scott Cites Producing SOI structure using ion shower
KR100851551B1 (en) * 2007-03-12 2008-08-11 삼성전자주식회사 Semiconductor device and method of forming the same
WO2008121262A2 (en) 2007-03-30 2008-10-09 Corning Incorporated Glass-ceramic-based semiconductor-on-insulator structures and method for making the same
US20090032873A1 (en) * 2007-07-30 2009-02-05 Jeffrey Scott Cites Ultra thin single crystalline semiconductor TFT and process for making same
JP5064508B2 (en) * 2007-09-13 2012-10-31 旭硝子株式会社 TiO2-containing quartz glass substrate
JP5649579B2 (en) * 2008-09-26 2015-01-07 コーニング インコーポレイテッド Semiconductor structure on glass-ceramic base insulator and method of making the same
FR2942910B1 (en) * 2009-03-06 2011-09-30 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A HETEROSTRUCTURE TO REDUCE THE STRAIN STRENGTH OF THE DONOR SUBSTRATE
US8062956B2 (en) 2009-08-26 2011-11-22 Corning Incorporated Semiconductor on insulator and methods of forming same using temperature gradient in an anodic bonding process
FR2949606B1 (en) * 2009-08-26 2011-10-28 Commissariat Energie Atomique METHOD FOR FRACTURE DETACHMENT OF A THIN SILICON FILM USING A TRIPLE IMPLANTATION
US20110207306A1 (en) * 2010-02-22 2011-08-25 Sarko Cherekdjian Semiconductor structure made using improved ion implantation process
US8196546B1 (en) 2010-11-19 2012-06-12 Corning Incorporated Semiconductor structure made using improved multiple ion implantation process
US8558195B2 (en) 2010-11-19 2013-10-15 Corning Incorporated Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process
US8008175B1 (en) 2010-11-19 2011-08-30 Coring Incorporated Semiconductor structure made using improved simultaneous multiple ion implantation process
US9082948B2 (en) 2011-02-03 2015-07-14 Soitec Methods of fabricating semiconductor structures using thermal spray processes, and semiconductor structures fabricated using such methods
US8436363B2 (en) 2011-02-03 2013-05-07 Soitec Metallic carrier for layer transfer and methods for forming the same
US9142412B2 (en) 2011-02-03 2015-09-22 Soitec Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods
JP6149428B2 (en) * 2012-12-28 2017-06-21 住友電気工業株式会社 Composite substrate, semiconductor wafer manufacturing method using composite substrate, and support substrate for composite substrate
CN112166310A (en) * 2018-02-01 2021-01-01 电力研究所有限公司 Device for measuring strain and method for manufacturing and using the device
CN115867107B (en) * 2023-02-27 2023-12-08 青禾晶元(天津)半导体材料有限公司 Method for synchronously preparing two composite piezoelectric substrates by using bonding technology

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6328904B1 (en) * 1998-12-14 2001-12-11 Yamaha Corporation Manufacture of a field emission element with fined emitter electrode
US6809380B2 (en) * 2002-10-03 2004-10-26 Oki Electric Industry Co., Ltd. Semiconductor device formed on an SOI structure with a stress-relief layer
US6825909B2 (en) * 1999-05-17 2004-11-30 Brillian Corporation Micro liquid crystal displays
US6987028B2 (en) * 2003-07-24 2006-01-17 Intel Corporation Method of fabricating a microelectronic die
US6991944B2 (en) * 2003-12-10 2006-01-31 S.O.I.Tec Silicon on Insulation Technologies S.A. Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials
US7053361B2 (en) * 2003-05-09 2006-05-30 Harmonic Drive Systems Inc. Projection encoder with moving side gratings and fixed side gratings
US7098085B2 (en) * 2001-02-14 2006-08-29 Sony Corporation Method and apparatus for forming a thin semiconductor film, method and apparatus for producing a semiconductor device, and electro-optical apparatus

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5395788A (en) * 1991-03-15 1995-03-07 Shin Etsu Handotai Co., Ltd. Method of producing semiconductor substrate
JP2812405B2 (en) * 1991-03-15 1998-10-22 信越半導体株式会社 Semiconductor substrate manufacturing method
US5442205A (en) 1991-04-24 1995-08-15 At&T Corp. Semiconductor heterostructure devices with strained semiconductor layers
FR2681472B1 (en) 1991-09-18 1993-10-29 Commissariat Energie Atomique PROCESS FOR PRODUCING THIN FILMS OF SEMICONDUCTOR MATERIAL.
US5273827A (en) * 1992-01-21 1993-12-28 Corning Incorporated Composite article and method
JPH06163943A (en) * 1992-11-19 1994-06-10 Fujikura Ltd Fabrication of electronic device
US5258323A (en) 1992-12-29 1993-11-02 Honeywell Inc. Single crystal silicon on quartz
JP3352340B2 (en) 1995-10-06 2002-12-03 キヤノン株式会社 Semiconductor substrate and method of manufacturing the same
JPH0888154A (en) * 1994-09-20 1996-04-02 Toyota Central Res & Dev Lab Inc Anode-junction device
CA2232796C (en) 1997-03-26 2002-01-22 Canon Kabushiki Kaisha Thin film forming process
US5968857A (en) 1997-03-31 1999-10-19 Corning Incorporated Glass-ceramics
US5985742A (en) 1997-05-12 1999-11-16 Silicon Genesis Corporation Controlled cleavage process and device for patterned films
WO1998059365A1 (en) 1997-06-24 1998-12-30 Massachusetts Institute Of Technology CONTROLLING THREADING DISLOCATION DENSITIES IN Ge ON Si USING GRADED GeSi LAYERS AND PLANARIZATION
JPH11163363A (en) * 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd Semiconductor device and its forming method
JPH11307747A (en) 1998-04-17 1999-11-05 Nec Corp Soi substrate and production thereof
US6093623A (en) 1998-08-04 2000-07-25 Micron Technology, Inc. Methods for making silicon-on-insulator structures
JP4476390B2 (en) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
EP0997445B1 (en) 1998-10-27 2004-03-10 Corning Incorporated Low expansion glass-ceramics
US6323108B1 (en) 1999-07-27 2001-11-27 The United States Of America As Represented By The Secretary Of The Navy Fabrication ultra-thin bonded semiconductor layers
JP3762157B2 (en) * 1999-09-02 2006-04-05 旭テクノグラス株式会社 Anodic bonding glass
JP2004507084A (en) 2000-08-16 2004-03-04 マサチューセッツ　インスティテュート　オブ　テクノロジー Manufacturing process of semiconductor products using graded epitaxial growth
US6539641B2 (en) 2000-12-07 2003-04-01 J. Leo Belliveau Tool for spacing separable objects
JP4569058B2 (en) * 2001-08-20 2010-10-27 株式会社デンソー Evaluation method of anodic bonding substrate
US6635909B2 (en) * 2002-03-19 2003-10-21 International Business Machines Corporation Strained fin FETs structure and method
JP4772258B2 (en) * 2002-08-23 2011-09-14 シャープ株式会社 Manufacturing method of SOI substrate
US7119365B2 (en) * 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
US6707106B1 (en) * 2002-10-18 2004-03-16 Advanced Micro Devices, Inc. Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer
FR2847076B1 (en) * 2002-11-07 2005-02-18 Soitec Silicon On Insulator METHOD OF DETACHING A THIN LAYER AT MODERATE TEMPERATURE AFTER CO-IMPLANTATION
FR2848337B1 (en) * 2002-12-09 2005-09-09 Commissariat Energie Atomique METHOD FOR PRODUCING A COMPLEX STRUCTURE BY ASSEMBLING STRESS STRUCTURES
US7176528B2 (en) * 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6328904B1 (en) * 1998-12-14 2001-12-11 Yamaha Corporation Manufacture of a field emission element with fined emitter electrode
US6825909B2 (en) * 1999-05-17 2004-11-30 Brillian Corporation Micro liquid crystal displays
US7098085B2 (en) * 2001-02-14 2006-08-29 Sony Corporation Method and apparatus for forming a thin semiconductor film, method and apparatus for producing a semiconductor device, and electro-optical apparatus
US6809380B2 (en) * 2002-10-03 2004-10-26 Oki Electric Industry Co., Ltd. Semiconductor device formed on an SOI structure with a stress-relief layer
US7053361B2 (en) * 2003-05-09 2006-05-30 Harmonic Drive Systems Inc. Projection encoder with moving side gratings and fixed side gratings
US6987028B2 (en) * 2003-07-24 2006-01-17 Intel Corporation Method of fabricating a microelectronic die
US6991944B2 (en) * 2003-12-10 2006-01-31 S.O.I.Tec Silicon on Insulation Technologies S.A. Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
SHOJI S. ET AL.: "Low-temperature anodic bonding using lithium aluminosilicate-beta-quartz glass ceramic", SENSORS AND ACTUATORS, vol. A64, 1998, pages 95 - 100, XP004102143 *

Also Published As

Publication number Publication date
US7262466B2 (en) 2007-08-28
EP1782472A2 (en) 2007-05-09
TW200625531A (en) 2006-07-16
CN101044620A (en) 2007-09-26
WO2006023289A2 (en) 2006-03-02
US20060038227A1 (en) 2006-02-23
EP1782472A4 (en) 2009-08-12
KR101140450B1 (en) 2012-04-30
KR20070044060A (en) 2007-04-26
EP1782472B1 (en) 2011-10-05
JP2008510315A (en) 2008-04-03
TWI289904B (en) 2007-11-11
CN100527416C (en) 2009-08-12

Similar Documents

Publication Publication Date Title
WO2006023289A3 (en) Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures
WO2006023594A3 (en) High strain glass/glass-ceramic containing semiconductor-on-insulator structures
WO2008121262A3 (en) Glass-ceramic-based semiconductor-on-insulator structures and method for making the same
ATE487234T1 (en) METHOD FOR PRODUCING DUAL STRESSED SOI SUBSTRATES
SG169394A1 (en) Method for producing partial soi structures comprising zones connecting a superficial layer and a substrate
MX2011012153A (en) Method for selecting a separator for vibroacoustic damping, separator for a vibroacoustic damping, and glass panel including such a separator.
WO2009030204A3 (en) Semiconductor component and method for producing a semiconductor component
WO2008036066A3 (en) Protective composite structures and methods of making protective composite structures
WO2007024549A3 (en) Semiconductor on glass insulator with deposited barrier layer
WO2002084721A3 (en) Detachable substrate or detachable structure and method for the production thereof
WO2007103224A3 (en) Structure and method of making lidded chips
WO2008148882A3 (en) Method for producing hybrid components
WO2009003658A3 (en) Membrane having a multipart structure
WO2006094313A3 (en) Forming method for polymeric laminated wafers comprising different film materials
WO2012012338A8 (en) Embedded structures and methods of manufacture thereof
WO2008064227A3 (en) Dual stress device and method
WO2011034300A3 (en) Method for manufacturing a curved display panel
WO2009141555A3 (en) Motor-vehicle lining panel comprising a sharply back-lit pictogram
WO2005100021A3 (en) Structure comprising an electronic device particularly for the production of a security or value document
WO2007122588A3 (en) Stretch laminate, method of making, and absorbent article
WO2005050711A3 (en) A method for fabricating semiconductor devices using strained silicon bearing material
WO2004068556A3 (en) Semiconductor structures with structural homogeneity
WO2009053620A3 (en) Glazing having improved vibro-acoustic damping behaviour, method of manufacturing such glazing, and method of acoustic protection in a vehicle passenger compartment
WO2008064985A3 (en) Lightweight moulded piece and corresponding production method
WO2005043585A3 (en) Oled structures with barrier layer and strain relief

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 2005779271

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 200580028046.3

Country of ref document: CN

WWE Wipo information: entry into national phase

Ref document number: 2007527857

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 1020077006152

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 2005779271

Country of ref document: EP