WO2006019860A3 - System and method for controlling buffer memory overflow and underflow conditions in storage controllers - Google Patents

System and method for controlling buffer memory overflow and underflow conditions in storage controllers Download PDF

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Publication number
WO2006019860A3
WO2006019860A3 PCT/US2005/024920 US2005024920W WO2006019860A3 WO 2006019860 A3 WO2006019860 A3 WO 2006019860A3 US 2005024920 W US2005024920 W US 2005024920W WO 2006019860 A3 WO2006019860 A3 WO 2006019860A3
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WO
WIPO (PCT)
Prior art keywords
buffer memory
data
storage controllers
memory overflow
underflow conditions
Prior art date
Application number
PCT/US2005/024920
Other languages
French (fr)
Other versions
WO2006019860A2 (en
Inventor
Kha Nguyen
William C Wong
Mouluan Jang
Jane X Wang
Original Assignee
Qlogic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qlogic Corp filed Critical Qlogic Corp
Publication of WO2006019860A2 publication Critical patent/WO2006019860A2/en
Publication of WO2006019860A3 publication Critical patent/WO2006019860A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G06F3/0605—Improving or facilitating administration, e.g. storage management by facilitating the interaction with a user or administrator
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0676—Magnetic disk device

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Debugging And Monitoring (AREA)
  • Bus Control (AREA)

Abstract

A method for maintaining flow control in a buffer memory coupled to a storage controller is provided. The storage controller includes, first and second counters that are used to monitor when data is read from a buffer memory and when data is transferred from the buffer memory to the host. The method includes, incrementing first and second counter values when data is placed in the buffer memory; decrementing a first counter value when data is read from the buffer memory; and decrementing the second counter value when data is sent to a host. The method further includes, pausing a first channel logic between a transport module and a storage disk when there is no data in the buffer memory; and pausing a second channel logic between a disk and the buffer memory if there is no space in the buffer memory.
PCT/US2005/024920 2004-07-19 2005-07-13 System and method for controlling buffer memory overflow and underflow conditions in storage controllers WO2006019860A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/894,208 2004-07-19
US10/894,208 US8032674B2 (en) 2004-07-19 2004-07-19 System and method for controlling buffer memory overflow and underflow conditions in storage controllers

Publications (2)

Publication Number Publication Date
WO2006019860A2 WO2006019860A2 (en) 2006-02-23
WO2006019860A3 true WO2006019860A3 (en) 2006-03-30

Family

ID=35094201

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/024920 WO2006019860A2 (en) 2004-07-19 2005-07-13 System and method for controlling buffer memory overflow and underflow conditions in storage controllers

Country Status (2)

Country Link
US (1) US8032674B2 (en)
WO (1) WO2006019860A2 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7975064B2 (en) * 2004-09-16 2011-07-05 International Business Machines Corporation Envelope packet architecture for broadband engine
US7331010B2 (en) 2004-10-29 2008-02-12 International Business Machines Corporation System, method and storage medium for providing fault detection and correction in a memory subsystem
US7512762B2 (en) * 2004-10-29 2009-03-31 International Business Machines Corporation System, method and storage medium for a memory subsystem with positional read data latency
US7836230B1 (en) 2007-02-14 2010-11-16 Marvell International Ltd. Managing multiple host requests in queued commands that corresponds to receipt of stored acknowledgement commands from the host
KR101478619B1 (en) * 2008-02-27 2015-01-06 삼성전자주식회사 Method and Apparatus of Inputting/Outputting Data Using Virtualization Technique
JP5639441B2 (en) * 2010-10-29 2014-12-10 キヤノン株式会社 Information processing apparatus, printing apparatus, print data processing method, and program
EP2973571B1 (en) 2013-03-15 2020-04-22 Intel Corporation A memory system
US9292379B2 (en) * 2013-09-28 2016-03-22 Intel Corporation Apparatus and method to manage high capacity storage devices
US9432187B2 (en) 2014-04-24 2016-08-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Data scrambling initialization
CN105095126B (en) * 2014-04-30 2018-02-13 华为技术有限公司 control method and control device
US20160011812A1 (en) * 2014-07-09 2016-01-14 Kabushiki Kaisha Toshiba Memory System
US10210089B2 (en) 2015-06-18 2019-02-19 Nxp Usa, Inc. Shared buffer management for variable length encoded data
US10163508B2 (en) 2016-02-26 2018-12-25 Intel Corporation Supporting multiple memory types in a memory slot
KR102599176B1 (en) * 2018-11-14 2023-11-08 삼성전자주식회사 Storage device using host memory buffer and memory management method thereof
TWI727269B (en) * 2019-02-27 2021-05-11 瑞昱半導體股份有限公司 Usb device and data transfer method thereof
KR102635689B1 (en) * 2019-08-30 2024-02-14 에스케이하이닉스 주식회사 Memory system, memory controller, and operating method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5450546A (en) * 1992-01-31 1995-09-12 Adaptec, Inc. Intelligent hardware for automatically controlling buffer memory storage space in a disk drive
US5561823A (en) * 1994-03-14 1996-10-01 Conner Peripherals, Inc. Monitor system for determining the available capacity of a READ buffer and a WRITE buffer in a disk drive system

Family Cites Families (168)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3800281A (en) 1972-12-26 1974-03-26 Ibm Error detection and correction systems
US4001883A (en) 1974-03-07 1977-01-04 Honeywell Information Systems, Inc. High density data storage on magnetic disk
US3988716A (en) 1974-08-05 1976-10-26 Nasa Computer interface system
US4016368A (en) 1975-12-12 1977-04-05 North Electric Company Framing circuit for digital receiver
US4228496A (en) 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
US4050097A (en) 1976-09-27 1977-09-20 Honeywell Information Systems, Inc. Synchronization technique for data transfers over an asynchronous common bus network coupling data processing apparatus
US4080649A (en) 1976-12-16 1978-03-21 Honeywell Information Systems Inc. Balancing the utilization of I/O system processors
US4275457A (en) 1977-05-18 1981-06-23 Martin Marietta Corporation Apparatus and method for receiving digital data at a first rate and outputting the data at a different rate
US4156867A (en) 1977-09-06 1979-05-29 Motorola, Inc. Data communication system with random and burst error protection and correction
US4225960A (en) 1979-03-01 1980-09-30 Westinghouse Electric Corp. Automatic synchronizing system for digital asynchronous communications
US4390969A (en) 1980-04-21 1983-06-28 Burroughs Corporation Asynchronous data transmission system with state variable memory and handshaking protocol circuits
JPS57189231A (en) 1981-05-18 1982-11-20 Advantest Corp Data transferring system
JPS57207960A (en) 1981-06-17 1982-12-20 Toshiba Corp Method for adding error correcting code to variable length data
US4451898A (en) 1981-11-09 1984-05-29 Hewlett-Packard Company Asynchronous interface message transmission using source and receive devices
US4587609A (en) 1983-07-01 1986-05-06 Honeywell Information Systems Inc. Lockout operation among asynchronous accessers of a shared computer system resource
US4603382A (en) 1984-02-27 1986-07-29 International Business Machines Corporation Dynamic buffer reallocation
AT382253B (en) 1984-06-22 1987-02-10 Austria Mikrosysteme Int LOOSE COUPLED DISTRIBUTED COMPUTER SYSTEM
US4667286A (en) 1984-12-20 1987-05-19 Advanced Micro Devices, Inc. Method and apparatus for transferring data between a disk and a central processing unit
US4625321A (en) 1985-05-23 1986-11-25 Standard Microsystems Corporation Dual edge clock address mark detector
JPS62164276A (en) 1986-01-13 1987-07-20 Matsushita Electric Ind Co Ltd Information recording and reproducing device
IT1200896B (en) 1985-12-18 1989-01-27 Sgs Microelettronica Spa CIRCUIT FOR RE-SYNCHRONIZATION OF IMPULSIVE SIGNALS, ESPECIALLY FOR MICROPROCESSOR PERIPHERALS
US5133062A (en) 1986-03-06 1992-07-21 Advanced Micro Devices, Inc. RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory
EP0238841B1 (en) 1986-03-12 1991-11-06 Siemens Aktiengesellschaft Error-protected multiprocessor controller having a high availability to a switching system, and method for memory configuration operation of this centraller
DE3751744T2 (en) 1986-04-16 1997-01-02 Hitachi Ltd Disk device
US5088093A (en) 1986-04-18 1992-02-11 Cias, Inc. Self-correcting registers, error-detecting/correcting registers, and inversion coding using one bit, and other information storage media
US4812769A (en) 1986-04-30 1989-03-14 Tektronix, Inc. Programmable sampling time base circuit
US5014186A (en) 1986-08-01 1991-05-07 International Business Machines Corporation Data-processing system having a packet transfer type input/output system
US4777635A (en) 1986-08-08 1988-10-11 Data Systems Technology Corp. Reed-Solomon code encoder and syndrome generator circuit
US5109500A (en) 1986-10-31 1992-04-28 Hitachi, Ltd. Disk drive control unit having sets of operating command and operation length information and generating end signal based upon operation length information
JP2605271B2 (en) 1987-02-10 1997-04-30 ソニー株式会社 Error correction and checking device
US5276807A (en) 1987-04-13 1994-01-04 Emulex Corporation Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking
US4949342A (en) 1987-04-14 1990-08-14 Matsushita Electric Industrial Co., Ltd. Code error detecting method
JP2751201B2 (en) 1988-04-19 1998-05-18 ソニー株式会社 Data transmission device and reception device
US4989190A (en) 1987-07-20 1991-01-29 Oki Electric Industry Co., Ltd. Apparatus for seeking a track of an optical disk in which information is recorded
US5193197A (en) 1987-09-24 1993-03-09 Digital Equipment Corporation Apparatus and method for distributed dynamic priority arbitration for access to a shared resource
US4807253A (en) 1987-11-13 1989-02-21 American Telephone And Telegraph Company, At&T Bell Laboratories Time-varying trellis-coded modulation formats which are robust in channels with phase variations
JPH0622359B2 (en) 1987-12-14 1994-03-23 富士通株式会社 Frame synchronization method
JP2638091B2 (en) 1988-06-24 1997-08-06 ソニー株式会社 Data transmission method
JPH0210574A (en) 1988-06-28 1990-01-16 Matsushita Electric Ind Co Ltd Demodulating circuit
JP2695195B2 (en) 1988-09-02 1997-12-24 三菱電機株式会社 Error correction circuit
US5027357A (en) 1988-10-14 1991-06-25 Advanced Micro Devices, Inc. ECC/CRC error detection and correction system
US5157669A (en) 1988-10-14 1992-10-20 Advanced Micro Devices, Inc. Comparison of an estimated CRC syndrome to a generated CRC syndrome in an ECC/CRC system to detect uncorrectable errors
JPH0797328B2 (en) 1988-10-25 1995-10-18 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン False tolerant synchronization system
US5117442A (en) 1988-12-14 1992-05-26 National Semiconductor Corporation Methods and circuits for synchronizing signals in a modular redundant fault tolerant computer system
US5072420A (en) 1989-03-16 1991-12-10 Western Digital Corporation FIFO control architecture and method for buffer memory access arbitration
US5127098A (en) 1989-04-12 1992-06-30 Sun Microsystems, Inc. Method and apparatus for the context switching of devices
US5237593A (en) 1989-05-04 1993-08-17 Stc, Plc Sequence synchronisation
US5136592A (en) 1989-06-28 1992-08-04 Digital Equipment Corporation Error detection and correction system for long burst errors
US5023612A (en) 1989-07-13 1991-06-11 Pacific Bell Illegal sequence detection and protection circuit
US4970418A (en) 1989-09-26 1990-11-13 Apple Computer, Inc. Programmable memory state machine for providing variable clocking to a multimode memory
US5050013A (en) 1989-12-04 1991-09-17 Seagate Technology, Inc. Hard sectoring circuit and method for a rotating disk data storage device
US5210660A (en) 1990-01-17 1993-05-11 International Business Machines Corporation Sectored servo independent of data architecture
US5506989A (en) 1990-01-31 1996-04-09 Ibm Corporation Arbitration system limiting high priority successive grants
GB9004188D0 (en) 1990-02-23 1990-04-18 Plessey Telecomm Method and apparatus for detecting a frame alignment word in a data stream
US5315708A (en) 1990-02-28 1994-05-24 Micro Technology, Inc. Method and apparatus for transferring data through a staging memory
US5134619A (en) 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
US5271018A (en) 1990-04-27 1993-12-14 Next, Inc. Method and apparatus for media defect management and media addressing
US5068755A (en) 1990-06-01 1991-11-26 Micropolis Corporation Sector pulse generator for hard disk drive assembly
US5249271A (en) 1990-06-04 1993-09-28 Emulex Corporation Buffer memory data flow controller
US5301333A (en) 1990-06-14 1994-04-05 Bell Communications Research, Inc. Tree structured variable priority arbitration implementing a round-robin scheduling policy
US5220569A (en) 1990-07-09 1993-06-15 Seagate Technology, Inc. Disk array with error type indication and selection of error correction method
US5261081A (en) 1990-07-26 1993-11-09 Ncr Corporation Sequence control apparatus for producing output signals in synchronous with a consistent delay from rising or falling edge of clock input signal
US5162954A (en) 1990-07-31 1992-11-10 Seagate Technology Inc. Apparatus for generating an index pulse in a data storage system
US5280488A (en) 1990-11-08 1994-01-18 Neal Glover Reed-Solomon code system employing k-bit serial techniques for encoding and burst error trapping
US5243471A (en) 1991-01-10 1993-09-07 Hewlett-Packard Company Method and apparatus for detecting a start of data position in differing tracks
US5257143A (en) 1991-01-15 1993-10-26 Zenith Data Systems Corporation Method and apparatus for positioning head of disk drive using zone-bit-recording
WO1992013344A1 (en) 1991-01-22 1992-08-06 Fujitsu Limited Error correction processing device and error correction method
JP2703668B2 (en) 1991-03-18 1998-01-26 株式会社日立製作所 Data transfer control device and magnetic disk control device
US5218564A (en) 1991-06-07 1993-06-08 National Semiconductor Corporation Layout efficient 32-bit shifter/register with 16-bit interface
US5440751A (en) 1991-06-21 1995-08-08 Compaq Computer Corp. Burst data transfer to single cycle data transfer conversion and strobe signal conversion
JP2625609B2 (en) 1991-07-10 1997-07-02 インターナショナル・ビジネス・マシーンズ・コーポレイション Disk storage device
EP0528273B1 (en) 1991-08-16 1999-10-27 Fujitsu Limited Buffer memory and method of managing the same
US5307216A (en) 1991-09-04 1994-04-26 International Business Machines Corporation Sector identification method and apparatus for a direct access storage device
EP0543560B1 (en) 1991-11-19 1999-12-22 Sun Microsystems, Inc. Arbitrating multiprocessor accesses to shared resources
CA2080608A1 (en) 1992-01-02 1993-07-03 Nader Amini Bus control logic for computer system having dual bus architecture
US5386405A (en) * 1992-02-27 1995-01-31 Fujitsu Limited Disk apparatus having a read error retry function
US5444853A (en) 1992-03-31 1995-08-22 Seiko Epson Corporation System and method for transferring data between a plurality of virtual FIFO's and a peripheral via a hardware FIFO and selectively updating control information associated with the virtual FIFO's
US5276564A (en) 1992-04-16 1994-01-04 Hewlett-Packard Company Programmable start-of-sector pulse generator for a disk drive using embedded servo bursts and split data fields
US5361267A (en) 1992-04-24 1994-11-01 Digital Equipment Corporation Scheme for error handling in a computer system
US5408644A (en) 1992-06-05 1995-04-18 Compaq Computer Corporation Method and apparatus for improving the performance of partial stripe operations in a disk array subsystem
US5544180A (en) 1992-06-08 1996-08-06 Qlogic Corporation Error-tolerant byte synchronization recovery scheme
US5524268A (en) 1992-06-26 1996-06-04 Cirrus Logic, Inc. Flexible processor-driven control of SCSI buses utilizing tags appended to data bytes to determine SCSI-protocol phases
US5420984A (en) 1992-06-30 1995-05-30 Genroco, Inc. Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications
US5274509A (en) 1992-09-10 1993-12-28 Digital Equipment Corporation On-the-fly splitting of disk data blocks using timed sampling of a data position indicator
US5276662A (en) 1992-10-01 1994-01-04 Seagate Technology, Inc. Disc drive with improved data transfer management apparatus
JP2821324B2 (en) 1992-11-04 1998-11-05 三菱電機株式会社 Error correction circuit
US5428627A (en) 1992-11-10 1995-06-27 Qlogic Corporation Method and apparatus for initializing an ECC circuit
US5546548A (en) 1993-03-31 1996-08-13 Intel Corporation Arbiter and arbitration process for a dynamic and flexible prioritization
US5465343A (en) 1993-04-30 1995-11-07 Quantum Corporation Shared memory array for data block and control program storage in disk drive
US5602857A (en) 1993-09-21 1997-02-11 Cirrus Logic, Inc. Error correction method and apparatus
US5629949A (en) 1993-09-21 1997-05-13 Cirrus Logic, Inc. Error correction verification method and apparatus using CRC check remainders
GB9320052D0 (en) 1993-09-29 1993-11-17 Philips Electronics Uk Ltd Testing and monitoring of programmed devices
SG50471A1 (en) 1993-11-04 1998-07-20 Cirrus Logic Inc Burst error corrector
US5592404A (en) 1993-11-04 1997-01-07 Cirrus Logic, Inc. Versatile error correction system
US5729718A (en) 1993-11-10 1998-03-17 Quantum Corporation System for determining lead time latency as function of head switch, seek, and rotational latencies and utilizing embedded disk drive controller for command queue reordering
US5487170A (en) 1993-12-16 1996-01-23 International Business Machines Corporation Data processing system having dynamic priority task scheduling capabilities
JPH07175698A (en) 1993-12-17 1995-07-14 Fujitsu Ltd File system
US5523903A (en) 1993-12-23 1996-06-04 International Business Machines Corporation Sector architecture for fixed block disk drive
MY112118A (en) 1993-12-23 2001-04-30 Hitachi Global Storage Tech Netherlands B V System and method for skip-sector mapping in a data recording disk drive.
JPH07244635A (en) 1994-01-14 1995-09-19 Fujitsu Ltd Circuit and method for bus use right arbitration
US5488688A (en) 1994-03-30 1996-01-30 Motorola, Inc. Data processor with real-time diagnostic capability
US5626949A (en) * 1994-04-04 1997-05-06 Blauer Manufacturing Company Breathable shell for outerwear
JP3529429B2 (en) 1994-06-10 2004-05-24 富士通株式会社 Data transmission device, data reception device, data transmission device, and data transmission method
US5581715A (en) 1994-06-22 1996-12-03 Oak Technologies, Inc. IDE/ATA CD drive controller having a digital signal processor interface, dynamic random access memory, data error detection and correction, and a host interface
US5574867A (en) 1994-07-08 1996-11-12 Intel Corporation Fast first-come first served arbitration method
US5519837A (en) 1994-07-29 1996-05-21 International Business Machines Corporation Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput
US5881313A (en) 1994-11-07 1999-03-09 Digital Equipment Corporation Arbitration system based on requester class and relative priority including transmit descriptor valid bit for a shared resource having multiple requesters
US5546545A (en) 1994-12-09 1996-08-13 International Business Machines Corporation Rotating priority selection logic circuit
EP0718827A2 (en) 1994-12-22 1996-06-26 International Business Machines Corporation System and method for target track determination in a data storage disk drive
US5623672A (en) 1994-12-23 1997-04-22 Cirrus Logic, Inc. Arrangement and method of arbitration for a resource with shared user request signals and dynamic priority assignment
US5627695A (en) 1995-01-12 1997-05-06 Qlogic Corporation System and method for generating unique sector identifiers for an identificationless disk format
US5572148A (en) 1995-03-22 1996-11-05 Altera Corporation Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory
WO1996035173A1 (en) 1995-05-03 1996-11-07 Apple Computer, Inc. Arbitration of computer resource access requests
US5691994A (en) 1995-05-08 1997-11-25 Western Digital Corporation Disk drive with fast error correction validation
US5745793A (en) 1995-06-07 1998-04-28 Seagate Technology, Inc. Apparatus having a circular buffer that maintains a one entry gap between elements written to the microprocessor and elements operated on by the clock
US5850422A (en) 1995-07-21 1998-12-15 Symbios, Inc. Apparatus and method for recovering a clock signal which is embedded in an incoming data stream
KR100224918B1 (en) 1995-09-06 1999-10-15 윤종용 Apparatus method compensating offset of between hadds in the disk drive
US5692165A (en) 1995-09-12 1997-11-25 Micron Electronics Inc. Memory controller with low skew control signal
KR0170905B1 (en) 1995-11-06 1999-03-30 김주용 Dram
US5664121A (en) 1995-11-07 1997-09-02 Sun Microsystems, Inc. Dual mode arbitration apparatus and method for reducing latency by allowing the possibility of simultaneous request and access for a shared bus
US5758188A (en) 1995-11-21 1998-05-26 Quantum Corporation Synchronous DMA burst transfer protocol having the peripheral device toggle the strobe signal such that data is latched using both edges of the strobe signal
US6181497B1 (en) 1995-12-12 2001-01-30 International Business Machines Corporation System and method for providing nonadjacent redundancy synchronization bytes
US5692135A (en) 1995-12-14 1997-11-25 International Business Machines Corporation Method and system for performing an asymmetric bus arbitration protocol within a data processing system
US5719516A (en) 1995-12-20 1998-02-17 Advanced Micro Devices, Inc. Lock generator circuit for use with a dual edge register that provides a separate enable for each use of an input clock signal
US5854918A (en) 1996-01-24 1998-12-29 Ricoh Company Ltd. Apparatus and method for self-timed algorithmic execution
IL117134A (en) 1996-02-14 2000-01-31 Galileo Technology Ltd First-in first-out (fifo) buffer
US5907717A (en) 1996-02-23 1999-05-25 Lsi Logic Corporation Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof
US5835930A (en) 1996-04-09 1998-11-10 International Business Machines Corporation One or more logical tracks per physical track in a headerless disk drive
JPH1021012A (en) 1996-06-28 1998-01-23 Toshiba Corp Magnetic disk device and command processing method for the same
US5822142A (en) 1996-07-26 1998-10-13 Western Digital Corporation Method of mapping logical sectors to physical sectors in a disk drive sparing partition
US5818886A (en) 1996-08-22 1998-10-06 Unisys Corporation Pulse synchronizing module
US5784569A (en) 1996-09-23 1998-07-21 Silicon Graphics, Inc. Guaranteed bandwidth allocation method in a computer system for input/output data transfers
US5925135A (en) 1996-09-26 1999-07-20 Intel Corporation Clock rate compensation for a low frequency slave device
US6029226A (en) 1996-09-30 2000-02-22 Lsi Logic Corporation Method and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command
US6081849A (en) 1996-10-01 2000-06-27 Lsi Logic Corporation Method and structure for switching multiple contexts in storage subsystem target device
KR100241751B1 (en) 1996-10-17 2000-02-01 윤종용 Staggered servo writing method in hard disc drive
KR100225951B1 (en) 1996-10-22 1999-10-15 김영환 Noise reduced memory device
US5890207A (en) 1996-11-27 1999-03-30 Emc Corporation High performance integrated cached storage device
US6157984A (en) 1997-05-15 2000-12-05 Seagate Technology, Llc Integrated controller/processor for disc drive having direct memory access
US5950223A (en) 1997-06-19 1999-09-07 Silicon Magic Corporation Dual-edge extended data out memory
US5912906A (en) 1997-06-23 1999-06-15 Sun Microsystems, Inc. Method and apparatus for recovering from correctable ECC errors
US5844844A (en) 1997-07-09 1998-12-01 Xilinx, Inc. FPGA memory element programmably triggered on both clock edges
JPH1196686A (en) 1997-09-19 1999-04-09 Hitachi Ltd Rotary storage device
US5968180A (en) 1997-09-30 1999-10-19 Intel Corporation Data capture circuit for asynchronous data transfer
US6065053A (en) 1997-10-01 2000-05-16 Micron Electronics, Inc. System for resetting a server
US5991911A (en) 1997-11-14 1999-11-23 Cirrus Logic, Inc. Concurrent generation of ECC error syndromes and CRC validation syndromes in a DVD storage device
US6067206A (en) 1997-11-18 2000-05-23 Western Digital Corporation Method and apparatus to compensate for servo wedge rotational offset after a head switch
US6134063A (en) 1997-12-30 2000-10-17 Lsi Logic Corporation Automated multi-track transfers
US6178486B1 (en) 1998-02-19 2001-01-23 Quantum Corporation Time allocation shared memory arbitration for disk drive controller
US6192499B1 (en) 1998-05-29 2001-02-20 Adaptec, Inc. Device and method for extending error correction beyond one sector time
US6070200A (en) 1998-06-02 2000-05-30 Adaptec, Inc. Host adapter having paged data buffers for continuously transferring data between a system bus and a peripheral bus
US6041417A (en) 1998-06-04 2000-03-21 Hewlett-Packard Company Method and apparatus for synchronizing data received in an accelerated graphics port of a graphics memory system
US6092231A (en) 1998-06-12 2000-07-18 Qlogic Corporation Circuit and method for rapid checking of error correction codes using cyclic redundancy check
US6185640B1 (en) * 1998-06-19 2001-02-06 Philips Electronics North America Corporation Minimal frame buffer manager allowing simultaneous read/write access by alternately filling and emptying a first and second buffer one packet at a time
US6223303B1 (en) 1998-06-29 2001-04-24 Western Digital Corporation Disk drive having two tiered defect list comprising marginal and reserved data sectors
US6029250A (en) 1998-09-09 2000-02-22 Micron Technology, Inc. Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same
US6381659B2 (en) 1999-01-19 2002-04-30 Maxtor Corporation Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses
US6487631B2 (en) 1999-02-02 2002-11-26 Qlogic Corporation Circuit and method for monitoring sector transfers to and from storage medium
US6662334B1 (en) 1999-02-25 2003-12-09 Adaptec, Inc. Method and device for performing error correction on ECC data sectors
US6530000B1 (en) 1999-03-24 2003-03-04 Qlogic Corporation Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units
US6279089B1 (en) 1999-04-12 2001-08-21 Western Digital Technologies, Inc. Defective data site management through a shared defect management table
US6330626B1 (en) 1999-05-05 2001-12-11 Qlogic Corporation Systems and methods for a disk controller memory architecture
US6401149B1 (en) 1999-05-05 2002-06-04 Qlogic Corporation Methods for context switching within a disk controller
US6470461B1 (en) 1999-06-07 2002-10-22 Qlogic Corporation Disk drive controller circuit and method for skipping defective and/or undesired sectors
US6574676B1 (en) 2000-01-11 2003-06-03 International Business Machines Corporation System and method for scheduling disk drive commands by expected total access time
US6490635B1 (en) 2000-04-28 2002-12-03 Western Digital Technologies, Inc. Conflict detection for queued command handling in disk drive controller
US6826650B1 (en) 2000-08-22 2004-11-30 Qlogic Corporation Disk controller configured to perform out of order execution of write operations
US6915416B2 (en) * 2000-12-28 2005-07-05 Texas Instruments Incorporated Apparatus and method for microcontroller debugging

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5450546A (en) * 1992-01-31 1995-09-12 Adaptec, Inc. Intelligent hardware for automatically controlling buffer memory storage space in a disk drive
US5561823A (en) * 1994-03-14 1996-10-01 Conner Peripherals, Inc. Monitor system for determining the available capacity of a READ buffer and a WRITE buffer in a disk drive system

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