WO2005029855A1 - Video signal processor - Google Patents

Video signal processor Download PDF

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Publication number
WO2005029855A1
WO2005029855A1 PCT/GB2004/003976 GB2004003976W WO2005029855A1 WO 2005029855 A1 WO2005029855 A1 WO 2005029855A1 GB 2004003976 W GB2004003976 W GB 2004003976W WO 2005029855 A1 WO2005029855 A1 WO 2005029855A1
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WO
WIPO (PCT)
Prior art keywords
video
output
outputs
input
spatial
Prior art date
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PCT/GB2004/003976
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French (fr)
Inventor
Richard Schiller
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Snell And Wilcox Limited
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Publication of WO2005029855A1 publication Critical patent/WO2005029855A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0125Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards being a high definition standard
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
    • H04N21/4402Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H04N21/440218Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display by transcoding between formats or standards, e.g. from MPEG-2 to MPEG-4
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals

Definitions

  • This invention concerns television standards conversion.
  • this term will be used generally to mean any process in which the horizontal, vertical and/or temporal sampling of a television signal is changed; change of sample structure may be combined with aspect ratio conversion, which may involve re-framing the picture with loss of picture information or the creation of blank areas in the frame.
  • aspect ratio conversion may involve re-framing the picture with loss of picture information or the creation of blank areas in the frame.
  • the invention seeks to overcome these difficulties in a novel manner and consists in one aspect of a video processor with two, simultaneously available, processed video outputs in two different spatial and/or temporal sampling formats where the two said outputs are derived from a common video source and one of the said processed outputs has the same spatial and/or temporal sampling format as the said common video source and the other said processed output has a different spatial and/or temporal sampling format, wherein a single sampling format conversion process can be switched to drive either of the two said processed video outputs.
  • the video processor has two video source inputs having different spatial and/or temporal sampling formats either of which may be selected as the said common video source.
  • one or more audio signals are associated with each video input and means are provided to associate one or more of the said audio signals with both of the said processed video outputs.
  • the said video source selection can be changed substantially without transient discontinuity of output video spatial or temporal sampling phase.
  • the invention provides video signal processing apparatus comprising first and second inputs having first and second spatial and/or temporal sampling formats, and first and second outputs having corresponding spatial and/or temporal sampling formats, a signal path including a compensating delay extending between each input and the corresponding output, and signal paths extending from each input to a common sampling format converter and from the common sampling format converter to each output; the apparatus adapted to provide at its outputs video derived from a selected one of the inputs simultaneously available in both first and second spatial and/or temporal sampling formats.
  • Figures 1a and 1 b show prior art, dual output-standard conversion systems
  • Figure 2 shows a novel, dual output-standard conversion system
  • Figure 2a shows a variation of the system of Figure 2
  • Figure 3 shows a modification of the system of Figure 2
  • Figure 4 shows a single-input version of the system of Figure 2
  • Figure 5 shows dual output-standard conversion system with audio routing
  • Figure 6 illustrates an exemplary switch timing sequence.
  • Figure 1a shows a known method of providing parallel high-definition
  • the high-definition output (1 ) is derived from a standards converter (6)
  • the standard-definition output (2) is derived from a second standards converter (7).
  • These converters are respectively set always to output the appropriate definition standard. However, as can be seen from the Figure, only one of them needs to carry out conversion at any one time.
  • a high-definition source (101) is permanently connected to a downconverter (102), and a standard-definition source (103) is permanently connected to an upconverter (104).
  • the high-definition output (105) is taken from a switch (106) which selects either the output of the upconverter (104) or a direct connection to the high-definition source (101).
  • the standard-definition output (107) is taken from a switch (108) which selects either the output of the downconverter (102) or a direct connection to the standard-definition source (103).
  • a standards converter system (200) has two inputs: a high definition input (201), and a standard definition input (202).
  • a format converter (205) is able to convert, in known manner, between high- and standard-definition formats - upconverting a standard definition input, or downconverting a high- definition input.
  • the input to the converter (205) is switched (206) between the system inputs (201) and (202).
  • the high-definition output (203) of the conversion system (200) is switched (207) between the output of the format converter (205) and the high- definition signal (201), which may, optionally, be processed in a delay/synchroniser block (208).
  • the standard-definition output (204) of the conversion system (200) is switched (209) between the output of the format converter (205) and the standard-definition signal (202), which may, optionally, be processed in a second delay/synchroniser block (210).
  • the switches (206) (207) and (209) are controlled by a control block (211) which receives a control input (212) to indicate whether the standard- definition signal (202), or the high-definition signal (201) is required to be provided, simultaneously in high- and standard-definition versions respectively, at the outputs (203) and (204).
  • control block (211 ) all three switches are ganged together under the control of the selection input (212) so that the selected input is delivered to the output corresponding to its own definition standard, and the format converter is inserted in the feed to whichever output requires format conversion.
  • the selection input (212) changes state, the output which was being converted immediately changes to the new source; if necessary the appropriate delay/ synchronisation block (208) or (210) can be used to time and/or phase the signals on the two sides of the switch, thus making the transition "clean".
  • the change at the output which was not being format converted will not usually be instantaneous because the format converter (205) may take many lines to change its direction of conversion, and during this time a corrupt output may be presented.
  • control block (211) provides for the control block (211) to delay the switch to the converter (205)'s output until its output is uncorrupted.
  • the switch from the converter needs to be rapid so as to avoid outputting corrupt video.
  • the appropriate delay/synchronisation block (208) or (210) can be used to make the changeover co-timed and/or phased.
  • the blocks (208) (210) could be provided in known manner with respective reference inputs to define the required synchronisation phase at their outputs.
  • An exemplary switch timing sequence is illustrated in Figure 6.
  • a high definition input 602 and a low definition input 604 are provided.
  • the desired output(s) is controlled by Input select signal 606, which changes from HD source 602 to SD source 604 at time instant A, and changes back again at time instant B.
  • the converter output therefore provides downconverted video 610 from input 602 up until time A, at which point it changes its mode of operation and starts to produce u peon verted video 612 from input 604.
  • a corrupt output 614, 615 is produced for a short period after each switch.
  • the HD output illustrated by signal 620
  • there is no appropriate signal to output for the period 622 (the desired output being high definition video of source material 604), corresponding to the length of corrupt output
  • the HD output switch 624 is delayed by the appropriate time 622 after an input select switch from HD to SD.
  • the HD output is kept substantially 'clean'. No such delay is required at the SD output
  • the SD output switch 632 is performed substantially at time A, the required output material (standard definition material from source 604), being immediately available to enable a 'clean' switch.
  • the input select is switched back to HD source.
  • the HD output 620 can now be switched substantially immediately at time B, while the SD output switch 634 is now delayed by time 632, corresponding to the length of corrupt output 615, which may or may not be the same as time period 622.
  • the converter (205) can be arranged to output either a "frozen” or black output after a change in its direction of conversion until the first uncorrupted video is ready for output.
  • the output switches (207) and (209) can change simultaneously but one of the outputs from the system (200) will show a period of black or "frozen" video after a change of source.
  • the delay/synchronisation blocks (208) and (210) may have some functional elements which are common to the converter (205); for example, both may require a video store. It may be possible to economise by sharing such elements, and an example of shared storage is shown in Figure 2a.
  • This Figure 2a is a modification of the system of Figure 2, and common elements have the same reference numerals.
  • the high-definition input (201) is input to a store (220), which serves the delay/synchronisation block (221) but can also be accessed by the standards converter (222).
  • the standard- definition input (202) is input to a store (223), which serves the delay/synchronisation block (224) and can also be accessed by the standards converter (222).
  • the blocks (221), (222) and (224) of Figure 2a are simpler than the respective blocks (208), (205) and (210) of Figure 2 because the storage function is not included.
  • the stores (220) and (223) each require two, independently addressable outputs. In practice each of these outputs may well consist of a number of related outputs, for example the taps of a filter.
  • the switch (206) now serves to select either the high-definition store or the low-definition store as the source for the conversion process (222).
  • a simplification is possible if one of the inputs (201) or (202) can be used as the output timing reference.
  • one of the blocks (208) or (210) can be replaced by a direct connection (the one connected to the input which is the timing reference is replaced), and the appropriate input (201) or (202) is also connected to the reference inputs of the converter (205) and the remaining delay/synchronisation block (208) or (210). If both inputs (201) and (202) are continuous, do not suffer from excessive phase disturbances, and it is not required that the outputs (203) and (204) are synchronous with each other or locked to a specific timing reference, then a further simplification is possible as shown in Figure 3.
  • the Figure shows a standards conversion system (300), which is similar to that shown in Figure 2.
  • the switch (309) can immediately and cleanly switch the standard-definition output (304) to the output of the converter (305).
  • the switches (306) and (314) can change so that the converter (305) starts up-converting the standard-definition input (312) with the converted output to be synchronous with the high-definition input (301).
  • the switch (307) can change the high-definition output (303) over to the up-converted signal.
  • the selection but not the standards conversion
  • the result is presented to the converter as a single input which changes its format from time to time (as the source selection changes).
  • a suitable processor is shown in Figure 4. Referring to Figure 4, a standards conversion process (400) has a single input (401 ) which may either be in a high-definition or a standard- definition format and may change without warning from one to the other of these formats.
  • the input (401) drives an optional delay/synchronisation block (402) and a standards converter (403).
  • There is a high-definition output (404) which can be either the output of the delay/synchronisation block (402) or the output of the standards converter (403) depending on the setting of a switch (405).
  • There is a standard-definition output (406) which can be selected to either of the same pair of signals by the switch (407).
  • a standards detection device (408) monitors the standard of the input (401) and controls the switches (405) and (407) in dependence on the result and the operating state of the converter (403).
  • the output switches (405) and (407) change state.
  • the output of the converter (403) is changed to a black signal having the definition standard opposite to the one it was providing before the change of input standard, and it changes its conversion mode to provide converted output pictures on that standard.
  • This converted output replaces the black output as soon as it is ready.
  • one of the outputs (404) or (406) changes quickly to the new source, and the other does so after a short delay.
  • the principles of the invention may be applied to video processes in which standards conversion is combined with another process. Aspect ratio conversion has already been mentioned; this is a special case as the standard- and high-definition signals may have different aspect ratios. Other examples are logo insertion or colour gamut legalisation.
  • these additional processes may be included both in the conversion path (e.g. (205) in Figure 2) and the unconverted signal paths (e.g. the blocks (208) and (210) of Figure 2), and the detail of the process may differ accordingly.
  • the additional process may precede the division of the relevant signal path (as shown for the storage process in Figure 2a).
  • video signals which include the associated audio signal (or signals) as "embedded" data which is multiplexed into the video signal.
  • Known standards converters and synchronisers can remove the audio from their input and re- embed the audio into the converted video output. However, when switching between different video sources, it is sometimes necessary to switch the audio at a different time from the video.
  • Figure 5 shows a variation of the system of Figure 2 with provision for switching the audio source independently of the video source.
  • the video inputs (501) and (502) have respective associated audio channels embedded in them. Normally the embedded audio signals follow the same routes as the associated video signals, with reformatting or retiming to accommodate video standards conversion and/or synchronisation being carried out as part of the relevant video process. In this situation the audio de-embedders (505) and (506) are disabled, and the original embedded audio content passes through them without modification. Suppose it is required to output the audio associated with the standard- definition video input (502) while the high-definition input (501) is providing the video outputs.
  • the required audio is de-embedded (504) from the associated input video and routed by a switch (507) to the output audio embedders (505) and (506), which are activated to embed the audio into their respective video outputs.
  • the output audio can always be taken from the switch (507) and the video synchronisation and conversion paths do not need to be transparent to embedded audio.
  • Other variations will be apparent to the skilled person, including the inclusion of fixed or variable delays in the audio path and the replacement of the switch (507) by a cross- fader. It will be appreciated by those skilled in the art that the invention has been described by way of example only, and that a wide variety of alternative approaches may be adopted.

Abstract

A method and apparatus for providing two simultaneously available video outputs in two different spatial and/or temporal sampling formats derived from a common video source. A single sampling format conversion process is employed, which can be switched to drive either of two processed video outputs, such that one of the outputs has the same spatial and/or temporal sampling format as the common video source and the other output has a different spatial and/or temporal sampling format. Preferably there are provided two video source inputs having different spatial and/or temporal sampling formats either of which may be selected as the common video source. The video source selection can advantageously be changed without material discontinuity of output video spatial or temporal sampling phase.

Description

VIDEO SIGNAL PROCESSOR
This invention concerns television standards conversion. In this specification this term will be used generally to mean any process in which the horizontal, vertical and/or temporal sampling of a television signal is changed; change of sample structure may be combined with aspect ratio conversion, which may involve re-framing the picture with loss of picture information or the creation of blank areas in the frame. When a new high-definition television service has to be established in an established standard-definition playout centre it is useful to be able to put together a stream of programmes from source material in both high- and standard-definition formats. Also, it may be necessary to "simulcast" the high- definition service on a standard-definition channel. These requirements may be satisfied by known uses of standards converters, which convert between high- and standard-definition formats. However it is difficult to provide simultaneous high and standard-definition versions of a service where cuts are required between sources having different scanning formats; this is especially so if the cuts between different source formats are required to be "clean" - i.e. without preceding or succeeding corrupted fields or frames. The invention seeks to overcome these difficulties in a novel manner and consists in one aspect of a video processor with two, simultaneously available, processed video outputs in two different spatial and/or temporal sampling formats where the two said outputs are derived from a common video source and one of the said processed outputs has the same spatial and/or temporal sampling format as the said common video source and the other said processed output has a different spatial and/or temporal sampling format, wherein a single sampling format conversion process can be switched to drive either of the two said processed video outputs. Suitably, the video processor has two video source inputs having different spatial and/or temporal sampling formats either of which may be selected as the said common video source. Advantageously, one or more audio signals are associated with each video input and means are provided to associate one or more of the said audio signals with both of the said processed video outputs. Suitably, the said video source selection can be changed substantially without transient discontinuity of output video spatial or temporal sampling phase. In a further aspect the invention provides video signal processing apparatus comprising first and second inputs having first and second spatial and/or temporal sampling formats, and first and second outputs having corresponding spatial and/or temporal sampling formats, a signal path including a compensating delay extending between each input and the corresponding output, and signal paths extending from each input to a common sampling format converter and from the common sampling format converter to each output; the apparatus adapted to provide at its outputs video derived from a selected one of the inputs simultaneously available in both first and second spatial and/or temporal sampling formats. An example of the invention will now be described and contrasted with prior art solutions to these problems with reference to the drawings in which: Figures 1a and 1 b show prior art, dual output-standard conversion systems; Figure 2 shows a novel, dual output-standard conversion system; Figure 2a shows a variation of the system of Figure 2; Figure 3 shows a modification of the system of Figure 2; Figure 4 shows a single-input version of the system of Figure 2; Figure 5 shows dual output-standard conversion system with audio routing; Figure 6 illustrates an exemplary switch timing sequence. Figure 1a shows a known method of providing parallel high-definition
(1 ) and standard-definition (2) versions of the same material and where the source of the material can be switched (3) between a high-definition source (4) and a standard-definition source (5). The high-definition output (1 ) is derived from a standards converter (6), and the standard-definition output (2) is derived from a second standards converter (7). These converters are respectively set always to output the appropriate definition standard. However, as can be seen from the Figure, only one of them needs to carry out conversion at any one time. When the high-definition source (4) is selected by the switch (3), the converter (7) converts from high- to standard-definition, and the converter (6) passes its input without conversion. If the position of the switch (3) is changed to select the standard- definition source (5) the converter (7) changes to a mode where the signal is passed through without conversion, and the converter (6) changes to an upconversion mode. Converters which automatically change their mode of operation in response to a change in the input line standard are well known; however, they usually do not change "cleanly", that is to say there may be several corrupted lines or fields before the mode change is successfully accomplished. This problem is compounded if there is no fixed phase relationship between the frame rates of the high and standard-definition sources. Another known solution to this problem is shown in Figure 1 b. In this Figure a high-definition source (101) is permanently connected to a downconverter (102), and a standard-definition source (103) is permanently connected to an upconverter (104). The high-definition output (105) is taken from a switch (106) which selects either the output of the upconverter (104) or a direct connection to the high-definition source (101). In a similar way the standard-definition output (107) is taken from a switch (108) which selects either the output of the downconverter (102) or a direct connection to the standard-definition source (103). When it is desired to change the programme source, the switches (106) and (108) are changed simultaneously. As neither converter (102) nor (104) needs to change its operating mode, no corrupted frames are output; however, the respective pairs of input signals at the selector switches (106), (108) may not be synchronous and so the change may not be "clean". This problem may be eliminated by synchronising the respective signals in known manner, possibly by providing reference inputs (109), (110) to the converters (104), (102) as shown in the Figure. ln both the systems shown in Figure 1 two sets of conversion apparatus are required, and the system of Figure 1a cannot easily provide an instantaneous and uncorrupted cut from one source to the other. Referring now to Figure 2, an example of the invention will be described. A standards converter system (200) has two inputs: a high definition input (201), and a standard definition input (202). There are two outputs (203), (204) providing high- and standard-definition outputs respectively. A format converter (205) is able to convert, in known manner, between high- and standard-definition formats - upconverting a standard definition input, or downconverting a high- definition input. The input to the converter (205) is switched (206) between the system inputs (201) and (202). The high-definition output (203) of the conversion system (200) is switched (207) between the output of the format converter (205) and the high- definition signal (201), which may, optionally, be processed in a delay/synchroniser block (208). Similarly the standard-definition output (204) of the conversion system (200) is switched (209) between the output of the format converter (205) and the standard-definition signal (202), which may, optionally, be processed in a second delay/synchroniser block (210). The switches (206) (207) and (209) are controlled by a control block (211) which receives a control input (212) to indicate whether the standard- definition signal (202), or the high-definition signal (201) is required to be provided, simultaneously in high- and standard-definition versions respectively, at the outputs (203) and (204). In the simplest implementation of the control block (211 ) all three switches are ganged together under the control of the selection input (212) so that the selected input is delivered to the output corresponding to its own definition standard, and the format converter is inserted in the feed to whichever output requires format conversion. When the selection input (212) changes state, the output which was being converted immediately changes to the new source; if necessary the appropriate delay/ synchronisation block (208) or (210) can be used to time and/or phase the signals on the two sides of the switch, thus making the transition "clean". However, the change at the output which was not being format converted will not usually be instantaneous because the format converter (205) may take many lines to change its direction of conversion, and during this time a corrupt output may be presented. This can be avoided by providing for the control block (211) to delay the switch to the converter (205)'s output until its output is uncorrupted. (The switch from the converter needs to be rapid so as to avoid outputting corrupt video.) In the same way as described above the appropriate delay/synchronisation block (208) or (210) can be used to make the changeover co-timed and/or phased. (For example the blocks (208) (210) could be provided in known manner with respective reference inputs to define the required synchronisation phase at their outputs.) An exemplary switch timing sequence is illustrated in Figure 6. A high definition input 602 and a low definition input 604 are provided. The desired output(s) is controlled by Input select signal 606, which changes from HD source 602 to SD source 604 at time instant A, and changes back again at time instant B. The converter output therefore provides downconverted video 610 from input 602 up until time A, at which point it changes its mode of operation and starts to produce u peon verted video 612 from input 604. As explained, a corrupt output 614, 615 is produced for a short period after each switch. At the HD output (illustrated by signal 620) there is no appropriate signal to output for the period 622 (the desired output being high definition video of source material 604), corresponding to the length of corrupt output
614. In this case therefore the HD output switch 624 is delayed by the appropriate time 622 after an input select switch from HD to SD. Thus the HD output is kept substantially 'clean'. No such delay is required at the SD output
630, and the SD output switch 632 is performed substantially at time A, the required output material (standard definition material from source 604), being immediately available to enable a 'clean' switch. At time instant B the input select is switched back to HD source. In this case the HD output 620 can now be switched substantially immediately at time B, while the SD output switch 634 is now delayed by time 632, corresponding to the length of corrupt output 615, which may or may not be the same as time period 622. In an alternative embodiment the converter (205) can be arranged to output either a "frozen" or black output after a change in its direction of conversion until the first uncorrupted video is ready for output. In this case the output switches (207) and (209) can change simultaneously but one of the outputs from the system (200) will show a period of black or "frozen" video after a change of source. It will be appreciated that the delay/synchronisation blocks (208) and (210) may have some functional elements which are common to the converter (205); for example, both may require a video store. It may be possible to economise by sharing such elements, and an example of shared storage is shown in Figure 2a. This Figure is a modification of the system of Figure 2, and common elements have the same reference numerals. Referring to Figure 2a, the high-definition input (201) is input to a store (220), which serves the delay/synchronisation block (221) but can also be accessed by the standards converter (222). In a similar way the standard- definition input (202) is input to a store (223), which serves the delay/synchronisation block (224) and can also be accessed by the standards converter (222). The blocks (221), (222) and (224) of Figure 2a are simpler than the respective blocks (208), (205) and (210) of Figure 2 because the storage function is not included. However, the stores (220) and (223) each require two, independently addressable outputs. In practice each of these outputs may well consist of a number of related outputs, for example the taps of a filter. The switch (206) now serves to select either the high-definition store or the low-definition store as the source for the conversion process (222). The fact that the "unused" input to the conversion system is already in an accessible store may mean that the converter (222) can change its direction of conversion (when the switch (206) changes state) more quickly than if the storage was placed at the switch output. The skilled person will appreciate that functions other than storage which are common to one of the input signal paths can advantageously be placed on the input side of the appropriate input to the switch (206). Returning to Figure 2, there are several options for ensuring that the signals on opposite sides of the output switches (207) and (209) are synchronous (so as to ensure that the change of source appears "clean" to the viewer). The simplest is to feed a common timing reference to the blocks (208), (210) and (205), all of which are arranged to synchronise their respective outputs in known manner to this reference. A simplification is possible if one of the inputs (201) or (202) can be used as the output timing reference. In this case one of the blocks (208) or (210) can be replaced by a direct connection (the one connected to the input which is the timing reference is replaced), and the appropriate input (201) or (202) is also connected to the reference inputs of the converter (205) and the remaining delay/synchronisation block (208) or (210). If both inputs (201) and (202) are continuous, do not suffer from excessive phase disturbances, and it is not required that the outputs (203) and (204) are synchronous with each other or locked to a specific timing reference, then a further simplification is possible as shown in Figure 3. The Figure shows a standards conversion system (300), which is similar to that shown in Figure 2. (Equivalent parts are identified by reference numerals in which the initial "2" of Figure 2 is replaced by a "3".) However, the reference input (313) of the converter (305) is connected to a changeover switch (314). This switch operates in opposite sense to the switch (306) so that the timing reference for the output from the converter (305) is the input, (301) or (302), which is not being selected for conversion. The output of the converter (305) is thus always in phase with the signal which passes through the system (300) without conversion. In Figure 3 the switches are drawn in the positions which deliver the high-definition input (301) to the outputs (303) and (304). If a change to the standard-definition signal (302) is required then the switch (309) can immediately and cleanly switch the standard-definition output (304) to the output of the converter (305). At the same time the switches (306) and (314) can change so that the converter (305) starts up-converting the standard-definition input (312) with the converted output to be synchronous with the high-definition input (301).
Once this output appears, the switch (307) can change the high-definition output (303) over to the up-converted signal. Up till now it has been assumed that selection of the required video source is made in the standards conversion system. However, some of the benefits of the invention can be obtained if the selection (but not the standards conversion) has been carried out earlier and the result is presented to the converter as a single input which changes its format from time to time (as the source selection changes). A suitable processor is shown in Figure 4. Referring to Figure 4, a standards conversion process (400) has a single input (401 ) which may either be in a high-definition or a standard- definition format and may change without warning from one to the other of these formats. This single input may be considered analogous to the dual inputs of previously described embodiments at a single physical terminal, the changing format being the result of an earlier source selection process for example. The input (401) drives an optional delay/synchronisation block (402) and a standards converter (403). There is a high-definition output (404) which can be either the output of the delay/synchronisation block (402) or the output of the standards converter (403) depending on the setting of a switch (405). Similarly there is a standard-definition output (406) which can be selected to either of the same pair of signals by the switch (407). A standards detection device (408) monitors the standard of the input (401) and controls the switches (405) and (407) in dependence on the result and the operating state of the converter (403). When a change of input standard is detected, the output, switches (405) and (407) change state. At the same time the output of the converter (403) is changed to a black signal having the definition standard opposite to the one it was providing before the change of input standard, and it changes its conversion mode to provide converted output pictures on that standard. This converted output replaces the black output as soon as it is ready. In this way one of the outputs (404) or (406) changes quickly to the new source, and the other does so after a short delay. The principles of the invention may be applied to video processes in which standards conversion is combined with another process. Aspect ratio conversion has already been mentioned; this is a special case as the standard- and high-definition signals may have different aspect ratios. Other examples are logo insertion or colour gamut legalisation. Depending on the application, these additional processes may be included both in the conversion path (e.g. (205) in Figure 2) and the unconverted signal paths (e.g. the blocks (208) and (210) of Figure 2), and the detail of the process may differ accordingly. Alternatively the additional process may precede the division of the relevant signal path (as shown for the storage process in Figure 2a). It is possible for the embodiments of the invention described above to handle video signals which include the associated audio signal (or signals) as "embedded" data which is multiplexed into the video signal. Known standards converters and synchronisers can remove the audio from their input and re- embed the audio into the converted video output. However, when switching between different video sources, it is sometimes necessary to switch the audio at a different time from the video. This is clearly not possible with the systems described so far. Figure 5 shows a variation of the system of Figure 2 with provision for switching the audio source independently of the video source. The video inputs (501) and (502) have respective associated audio channels embedded in them. Normally the embedded audio signals follow the same routes as the associated video signals, with reformatting or retiming to accommodate video standards conversion and/or synchronisation being carried out as part of the relevant video process. In this situation the audio de-embedders (505) and (506) are disabled, and the original embedded audio content passes through them without modification. Suppose it is required to output the audio associated with the standard- definition video input (502) while the high-definition input (501) is providing the video outputs. The required audio is de-embedded (504) from the associated input video and routed by a switch (507) to the output audio embedders (505) and (506), which are activated to embed the audio into their respective video outputs. In an alternative embodiment the output audio can always be taken from the switch (507) and the video synchronisation and conversion paths do not need to be transparent to embedded audio. Other variations will be apparent to the skilled person, including the inclusion of fixed or variable delays in the audio path and the replacement of the switch (507) by a cross- fader. It will be appreciated by those skilled in the art that the invention has been described by way of example only, and that a wide variety of alternative approaches may be adopted.

Claims

1. A video processor with two, simultaneously available, video outputs in two different spatial and/or temporal sampling formats where the two said outputs are derived from a common video source and one of the said processed outputs has the same spatial and/or temporal sampling format as the said common video source and the other said processed output has a different spatial and/or temporal sampling format, wherein a single sampling format conversion process can be switched to drive either of the two said processed video outputs.
2. A video processor according to Claim 1 , with two video source inputs having different spatial and/or temporal sampling formats either of which may be selected as the said common video source.
3. A video processor according to Claims 1 or 2, wherein at a format conversion process switch, one ouput is switched from being driven by the format conversion process before the other output is switched to being driven by the format conversion process.
4. A video processor according to any one of Claims 1 to 3, wherein the signal path to the output having the same spatial and/or temporal sampling format as the source includes a compensating delay.
5. A video processor according to any one of Claims 2 to 4, wherein one or more audio signals are associated with each video input and means are provided to associate one or more of the said audio signals with both of the said processed video outputs.
6. A video processor according to any one of Claims 2 to 5, wherein the said video source selection can be changed without material discontinuity of output video spatial or temporal sampling phase.
7. Video signal processing apparatus comprising first and second inputs having first and second spatial and/or temporal sampling formats, and first and second outputs having corresponding spatial and/or temporal sampling formats, a signal path including a compensating delay extending between each input and the corresponding output, and signal paths extending from each input to a common sampling format converter and from the common sampling format converter to each output; the apparatus adapted to provide at its outputs video derived from a selected one of the inputs simultaneously available in both first and second spatial and/or temporal sampling formats.
8. Apparatus according to Claim 8, wherein in the selected input can be switched without material discontinuity of output video spatial or temporal sampling phase.
PCT/GB2004/003976 2003-09-19 2004-09-16 Video signal processor WO2005029855A1 (en)

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GB0322006A GB2406239A (en) 2003-09-19 2003-09-19 Video format converter
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