WO2005018187A3 - Adaptive bit loading with low density parity check forward error correction - Google Patents

Adaptive bit loading with low density parity check forward error correction Download PDF

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Publication number
WO2005018187A3
WO2005018187A3 PCT/US2004/025215 US2004025215W WO2005018187A3 WO 2005018187 A3 WO2005018187 A3 WO 2005018187A3 US 2004025215 W US2004025215 W US 2004025215W WO 2005018187 A3 WO2005018187 A3 WO 2005018187A3
Authority
WO
WIPO (PCT)
Prior art keywords
low density
bit loading
error correction
parity check
forward error
Prior art date
Application number
PCT/US2004/025215
Other languages
French (fr)
Other versions
WO2005018187A2 (en
Inventor
Eric Jacobsen
Valentine Rhodes
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to CN2004800277076A priority Critical patent/CN1856976B/en
Priority to EP04786457A priority patent/EP1652362B1/en
Priority to AT04786457T priority patent/ATE542345T1/en
Publication of WO2005018187A2 publication Critical patent/WO2005018187A2/en
Publication of WO2005018187A3 publication Critical patent/WO2005018187A3/en
Priority to HK06106054.4A priority patent/HK1089307A1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H04L1/0003—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate by switching between different modulation schemes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/261—Details of reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0044—Arrangements for allocating sub-channels of the transmission path allocation of payload
    • H04L5/0046—Determination of how many bits are transmitted on different sub-channels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0058—Allocation criteria
    • H04L5/006—Quality of the received signal, e.g. BER, SNR, water filling
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/0001—Arrangements for dividing the transmission path
    • H04L5/0003—Two-dimensional division
    • H04L5/0005—Time-frequency
    • H04L5/0007—Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W48/00—Access restriction; Network selection; Access point selection
    • H04W48/18—Selecting a network or a communication service
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W84/00—Network topologies
    • H04W84/02—Hierarchically pre-organised networks, e.g. paging networks, cellular networks, WLAN [Wireless Local Area Network] or WLL [Wireless Local Loop]
    • H04W84/10—Small scale networks; Flat hierarchical networks
    • H04W84/12—WLAN [Wireless Local Area Networks]

Abstract

An apparatus may include an orthogonal frequency division multiplexing (OFDM) physical layer interface. An adaptive subcarrier demodulator or an adaptive subcarrier modulator may be coupled to the OFDM physical layer interface to implement adaptive bit loading (ABL). A decoder or an encoder may be coupled to the adaptive subcarrier demodulator or to the adaptive subcarrier modulator to implement low density, parity checking.
PCT/US2004/025215 2003-08-08 2004-08-04 Adaptive bit loading with low density parity check forward error correction WO2005018187A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN2004800277076A CN1856976B (en) 2003-08-08 2004-08-04 Varying lengths of low density parity check codewords
EP04786457A EP1652362B1 (en) 2003-08-08 2004-08-04 Adaptive bit loading with low density parity check forward error correction
AT04786457T ATE542345T1 (en) 2003-08-08 2004-08-04 ADAPTIVE PARITY CONTROL BIT ALLOCATION WITH LIGHT DENSITY FORWARD ERROR CORRECTION CODING
HK06106054.4A HK1089307A1 (en) 2003-08-08 2006-05-25 Adaptive bit loading with low density parity check forward error correction

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US49393703P 2003-08-08 2003-08-08
US60/493,937 2003-08-08
US10/749,624 US7213197B2 (en) 2003-08-08 2003-12-30 Adaptive bit loading with low density parity check forward error correction
US10/749,624 2003-12-30

Publications (2)

Publication Number Publication Date
WO2005018187A2 WO2005018187A2 (en) 2005-02-24
WO2005018187A3 true WO2005018187A3 (en) 2005-06-09

Family

ID=34119162

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/025215 WO2005018187A2 (en) 2003-08-08 2004-08-04 Adaptive bit loading with low density parity check forward error correction

Country Status (7)

Country Link
US (1) US7213197B2 (en)
EP (1) EP1652362B1 (en)
CN (1) CN1856976B (en)
AT (1) ATE542345T1 (en)
HK (1) HK1089307A1 (en)
TW (1) TWI250728B (en)
WO (1) WO2005018187A2 (en)

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KR20050046471A (en) * 2003-11-14 2005-05-18 삼성전자주식회사 Apparatus for encoding/decoding using parallel concatenation low density parity check code and the method thereof
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US7707479B2 (en) * 2005-12-13 2010-04-27 Samsung Electronics Co., Ltd. Method of generating structured irregular low density parity checkcodes for wireless systems
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US7620880B2 (en) * 2005-12-20 2009-11-17 Samsung Electronics Co., Ltd. LDPC concatenation rules for IEEE 802.11n system with packets length specified in OFDM symbols
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KR20090085633A (en) * 2006-10-26 2009-08-07 콸콤 인코포레이티드 Coding schemes for wireless communication transmissions
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US7958429B2 (en) * 2007-07-02 2011-06-07 Broadcom Corporation Distributed processing LDPC (low density parity check) decoder
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Also Published As

Publication number Publication date
CN1856976B (en) 2011-12-14
US7213197B2 (en) 2007-05-01
TW200511740A (en) 2005-03-16
EP1652362B1 (en) 2012-01-18
ATE542345T1 (en) 2012-02-15
US20050034053A1 (en) 2005-02-10
WO2005018187A2 (en) 2005-02-24
HK1089307A1 (en) 2006-11-24
EP1652362A2 (en) 2006-05-03
CN1856976A (en) 2006-11-01
TWI250728B (en) 2006-03-01

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