WO2004079489A3 - Data processing system with prefetching means - Google Patents

Data processing system with prefetching means Download PDF

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Publication number
WO2004079489A3
WO2004079489A3 PCT/IB2004/050151 IB2004050151W WO2004079489A3 WO 2004079489 A3 WO2004079489 A3 WO 2004079489A3 IB 2004050151 W IB2004050151 W IB 2004050151W WO 2004079489 A3 WO2004079489 A3 WO 2004079489A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
cache
location
cache memory
memory
Prior art date
Application number
PCT/IB2004/050151
Other languages
French (fr)
Other versions
WO2004079489A2 (en
Inventor
Eijndhoven Josephus T J Van
Martijn J Rutten
Evert-Jan D Pol
Original Assignee
Koninkl Philips Electronics Nv
Eijndhoven Josephus T J Van
Martijn J Rutten
Evert-Jan D Pol
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Eijndhoven Josephus T J Van, Martijn J Rutten, Evert-Jan D Pol filed Critical Koninkl Philips Electronics Nv
Priority to EP04714401A priority Critical patent/EP1604285A2/en
Priority to CN2004800058948A priority patent/CN1757018B/en
Priority to JP2006506644A priority patent/JP2006520045A/en
Priority to US10/547,594 priority patent/US7526613B2/en
Publication of WO2004079489A2 publication Critical patent/WO2004079489A2/en
Publication of WO2004079489A3 publication Critical patent/WO2004079489A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control

Abstract

The dismissing of cached data that is not expected to be further used is predicted instead of predicting future I/O operations and then data is fetched from the main memory to replace the dismissed data in the cache. Thus, firstly a location in a cache memory containing data, which is expected not to be further used, is identified, followed by performing a prefetch operation in order to request new data to refill the above location in the cache memory. Therefore, a data processing system comprises at least one processor (12) for processing streaming data, at least one cache memory (200) having a plurality of cache blocks (210), wherein one of said cache memories (200) is associated to each of said processors (12), and at least one cache controller (300) for prefetching data into said cache memory (200), wherein one of said cache controllers (300) is associated to each of said cache memories (200). Said cache controller (300) comprises determining means (350) for identifying at least one location in said cache memory (200) containing first data, which is predicted to be dismissible without penalty and prefetch means (320) for issuing a prefetch operation replacing said first data at said location with second data, which fit said location.
PCT/IB2004/050151 2003-03-06 2004-02-25 Data processing system with prefetching means WO2004079489A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP04714401A EP1604285A2 (en) 2003-03-06 2004-02-25 Data processing system with prefetching means
CN2004800058948A CN1757018B (en) 2003-03-06 2004-02-25 Data processing system with prefetching means and data prefetching method
JP2006506644A JP2006520045A (en) 2003-03-06 2004-02-25 Data processing system having prefetch means
US10/547,594 US7526613B2 (en) 2003-03-06 2004-02-25 Data processing system with prefetching means

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03100554 2003-03-06
EP03100554.9 2003-03-06

Publications (2)

Publication Number Publication Date
WO2004079489A2 WO2004079489A2 (en) 2004-09-16
WO2004079489A3 true WO2004079489A3 (en) 2005-07-28

Family

ID=32946917

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2004/050151 WO2004079489A2 (en) 2003-03-06 2004-02-25 Data processing system with prefetching means

Country Status (6)

Country Link
US (1) US7526613B2 (en)
EP (1) EP1604285A2 (en)
JP (1) JP2006520045A (en)
KR (1) KR20050116810A (en)
CN (1) CN1757018B (en)
WO (1) WO2004079489A2 (en)

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CN103077129A (en) * 2012-12-31 2013-05-01 上海算芯微电子有限公司 Information processing method and device

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JP2006190389A (en) 2005-01-06 2006-07-20 Sanyo Electric Co Ltd Integrated circuit for data processing
US7283418B2 (en) * 2005-07-26 2007-10-16 Micron Technology, Inc. Memory device and method having multiple address, data and command buses
JP4846306B2 (en) * 2005-09-09 2011-12-28 富士通セミコンダクター株式会社 Semiconductor memory device, semiconductor integrated circuit system using the same, and method for controlling semiconductor memory device
JP4983160B2 (en) * 2006-09-04 2012-07-25 富士通株式会社 Moving image processing device
US7934058B2 (en) * 2006-12-14 2011-04-26 Microsoft Corporation Predictive caching of assets to improve level load time on a game console
US8433854B2 (en) * 2008-06-25 2013-04-30 Intel Corporation Apparatus and method for cache utilization
US8943273B1 (en) * 2008-08-14 2015-01-27 Marvell International Ltd. Method and apparatus for improving cache efficiency
US8918588B2 (en) * 2009-04-07 2014-12-23 International Business Machines Corporation Maintaining a cache of blocks from a plurality of data streams
US9444737B2 (en) * 2009-04-27 2016-09-13 Intel Corporation Packet data processor in a communications processor architecture
US9076239B2 (en) * 2009-04-30 2015-07-07 Stmicroelectronics S.R.L. Method and systems for thumbnail generation, and corresponding computer program product
US9280474B2 (en) 2013-01-03 2016-03-08 Intel Corporation Adaptive data prefetching
US10042773B2 (en) 2015-07-28 2018-08-07 Futurewei Technologies, Inc. Advance cache allocator
CN107168660A (en) * 2016-03-08 2017-09-15 成都锐成芯微科技股份有限公司 Image procossing caching system and method
US10073775B2 (en) * 2016-04-01 2018-09-11 Intel Corporation Apparatus and method for triggered prefetching to improve I/O and producer-consumer workload efficiency
CN106484334A (en) * 2016-10-20 2017-03-08 郑州云海信息技术有限公司 A kind of release pre-reads the method and device of resource
US11294812B2 (en) 2020-08-04 2022-04-05 International Business Machines Corporation Obtaining cache resources for expected writes to tracks in a write set after the cache resources were released for the tracks in the write set

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Non-Patent Citations (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103077129A (en) * 2012-12-31 2013-05-01 上海算芯微电子有限公司 Information processing method and device
CN103077129B (en) * 2012-12-31 2016-07-13 上海算芯微电子有限公司 Information processing method and device

Also Published As

Publication number Publication date
CN1757018B (en) 2010-09-08
US7526613B2 (en) 2009-04-28
WO2004079489A2 (en) 2004-09-16
KR20050116810A (en) 2005-12-13
EP1604285A2 (en) 2005-12-14
CN1757018A (en) 2006-04-05
US20060190688A1 (en) 2006-08-24
JP2006520045A (en) 2006-08-31

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