WO2004053784A1 - An electronic label system on a shelf and an electronic label thereof - Google Patents

An electronic label system on a shelf and an electronic label thereof Download PDF

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Publication number
WO2004053784A1
WO2004053784A1 PCT/CN2003/001008 CN0301008W WO2004053784A1 WO 2004053784 A1 WO2004053784 A1 WO 2004053784A1 CN 0301008 W CN0301008 W CN 0301008W WO 2004053784 A1 WO2004053784 A1 WO 2004053784A1
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WO
WIPO (PCT)
Prior art keywords
microprocessor
signal
circuit
terminal
signal input
Prior art date
Application number
PCT/CN2003/001008
Other languages
French (fr)
Chinese (zh)
Inventor
Wei Chen
Xue Fang Wu
Original Assignee
Wei Chen
Xue Fang Wu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wei Chen, Xue Fang Wu filed Critical Wei Chen
Priority to AU2003289597A priority Critical patent/AU2003289597A1/en
Publication of WO2004053784A1 publication Critical patent/WO2004053784A1/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K17/00Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations
    • G06K17/0022Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations arrangements or provisious for transferring data to distant stations, e.g. from a sensing device

Definitions

  • the invention relates to a shelf label system and a label thereof. Background technique
  • paper labels are usually used to display product prices, specifications, inventory, and / or promotional signs.
  • the electronic shelf label system includes multiple electronic labels with display devices. Usually it is installed on the shelf to replace the original paper label. It can solve the problem of product price. It can be remotely controlled by the computer to change the price without any need. Manual operation.
  • system hosts, cash registers, and electronic labels can always maintain price consistency, and dynamic pricing and promotion information can be conveniently displayed, bringing a whole new world to price management.
  • An object of the present invention is to provide an electronic shelf label system with simple structure, low cost, reliable operation, convenient use, and low power consumption, and an electronic label thereof.
  • the general technical idea of the present invention is: use low-frequency radio waves as the carrier of digital signals, remove the hardware demodulation circuit with large power consumption in the electronic tag, and use software to pass program instructions in the microprocessor in accordance with the timing
  • the method uses the signal to demodulate and extract digital information directly from the radio waves, and then performs processing such as decoding to realize the functions of saving and displaying data.
  • the technical solution for providing an electronic tag with simple structure, low cost, reliable operation, convenient use, and low power consumption in achieving the purpose of the present invention is:
  • the electronic tag has a casing, a circuit device, and a display screen, and the circuit device is disposed in the casing.
  • the display screen is arranged on the casing and is located at the display window of the casing;
  • the circuit device has an antenna device, a microprocessor, a main crystal circuit and a DC power terminal;
  • the microprocessor is provided with a power terminal, a main crystal terminal, a display output terminal and a signal Input port;
  • the power terminal of the microprocessor is in line with the DC power terminal of the circuit device;
  • the main crystal terminal of the microprocessor is connected to the main crystal circuit;
  • the display output terminal of the microprocessor is connected to the display screen or the driving circuit and the display screen It is characterized in that: the output end of the antenna device is connected to the signal input port of the microprocessor;
  • the microprocessor is a microprocessor having a function of processing digitally modulated low-frequency radio wave signals through a software program, and can process low-frequency signals Frequency in
  • the signal input port of the microprocessor is a port with a signal amplification function, or the circuit device also has a preamplifier circuit or a bias circuit; the preamplifier circuit or the bias circuit is provided at the output end of the antenna device and the signal of the microprocessor Between input ports.
  • the microprocessor also has a sampling signal output port; the sampling signal output port is connected to the enable terminal of the pre-amplification circuit or the bias circuit.
  • the above circuit device also has a secondary crystal oscillator circuit
  • the microprocessor also has a secondary crystal oscillator terminal
  • the secondary crystal oscillator circuit is connected to the secondary crystal oscillator terminal of the microprocessor.
  • the oscillation frequency of the secondary crystal circuit is between 20 kHz and 100 kHz
  • the oscillation frequency of the main crystal circuit 25 is between 400 kHz and 40 MHz.
  • This label also has a DC power supply.
  • the output end of the DC power supply is connected to the power supply end of the circuit device.
  • the process for the microprocessor of the above circuit device to process the digitally modulated low frequency radio wave signal through a software program is: 1 judging whether there is a signal input according to the level change of the signal input port; 2 comparing the change of the time parameter of the signal waveform to Determine whether there is a signal node; 3 Measure the symbol length between adjacent signal nodes and store it in the data memory. The collection of this series of symbol lengths forms a data column representing the baseband signal, thereby achieving software solution. Tuning function; 4 Decode the baseband signal into actual data frames, and complete the software decoding process; 5 Analyze and process the received data, then control the working state of the microprocessor, and display relevant information through the display screen.
  • the technical solution of providing an electronic shelf label system with simple structure, low cost, reliable work, convenient use, and low power consumption for achieving the purpose of the present invention is:
  • the system has a main controller and multiple electronic labels;
  • the main controller has Computer, exciter and loop antenna;
  • the exciter is connected to the computer through its communication interface;
  • the exciter is connected to the loop antenna by its driver and resonant capacitor;
  • the exciter has the information transmitted by the computer driven by encoding and modulation
  • the function that the loop antenna sends to the space
  • the electronic label is placed in the range surrounded by the loop antenna, and can receive the information sent by the main controller and display specific information;
  • the electronic label has a housing, a circuit device and a display screen.
  • the circuit device is disposed in the casing, and the display screen is disposed on the casing and located at the display window of the casing; the circuit device has an antenna device, a microprocessor, a main crystal circuit and a DC power terminal; the microprocessor is provided with a power terminal and a main crystal terminal Display output terminal and signal input port; the power supply terminal of the microprocessor is in line with the DC power supply terminal of the circuit device; the main crystal terminal of the microprocessor is connected to the main crystal circuit; the display output terminal of the microprocessor is connected to the display or The driving circuit is connected to the display screen; It is characterized in that: the output end of the antenna device is connected to the signal input port of the microprocessor; the microprocessor is a microprocessor with a function of processing digitally modulated low-frequency radio wave signals through a software program, It can process low-frequency signals between 4kHz and 200kHz.
  • the process of the microprocessor processing low-frequency radio wave signals through a software program is: 1 judging whether there is a signal input according to the level change of the signal input port; 2 judging whether there is a signal node by comparing changes in the time parameter of the signal waveform; 3 measurement The symbol length between adjacent signal nodes is obtained, and each symbol length is stored in a corresponding unit of the data memory. This set of symbol lengths forms a data column representing the characteristics of the baseband signal parameter, thereby achieving Software demodulation function; 4 decode the baseband signal into the actual received data frame, and complete the software decoding process; 5 analyze and process the received data, then control the working state of the microprocessor, and display relevant information through the display screen come out.
  • the present invention has positive effects: (1)
  • the electronic shelf label system of the present invention uses a low-frequency radio wave as a signal carrier, because its frequency range is far from the existing commercial communication frequency band, and its emission range is basically limited to a specific space. Therefore, the mutual interference between this system and the existing communication system is small, so the reliability is relatively high and the security is good.
  • the electronic tag of the present invention uses a software program to demodulate the received digitally modulated low-frequency radio wave signal, thus eliminating the hardware demodulation circuit with large power consumption in the prior art. Low and simple structure, low cost.
  • the three commonly used digital modulation methods can be applied to the electronic shelf label system of the present invention, so the application of the present invention is wide.
  • the corresponding modulation mode needs to be selected from the bit error rate, transmission efficiency, implementation cost, and characteristics of the specific microprocessor 24 used.
  • the electronic tag of the present invention is provided with a pre-amplification circuit or a bias circuit in the circuit device, the receiving sensitivity can be improved; if a timing sampling function is set on this basis, this can effectively suppress the receiving sensitivity while suppressing it. Increased power consumption.
  • the microprocessor in the electronic tag of the present invention operates with a dual crystal oscillator, the standby power consumption of the tag in a no-signal state can be greatly reduced.
  • the electronic shelf label system of the present invention is widely used in retail stores and warehouse management systems, and can improve the modern scientific management level. BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic diagram of an electronic tag according to the present invention.
  • FIG. 2 is a schematic top view of FIG. 1.
  • FIG. 3A to 3J are schematic block diagrams of the electrical principle of the electronic tag of the present invention.
  • FIG. 3A is an electrical schematic diagram with a relatively simple structure.
  • FIG. 3B is an electrical schematic diagram after a bias circuit is provided on the basis of FIG. 3A.
  • FIG. 3C is an electrical schematic diagram after the sampling signal output port is set on the microprocessor based on FIG. 3B.
  • FIG. 3D is an electrical schematic diagram after a pre-amplification circuit is provided on the basis of FIG. 3A.
  • FIG. 3E is an electrical schematic diagram after the sampling signal output port is set on the microprocessor based on FIG. 3D.
  • FIG. 3F is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3A.
  • FIG. 3G is an electrical schematic diagram of a sub-crystal oscillator circuit based on FIG. 3B.
  • FIG. 3H is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3C.
  • FIG. 31 is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3D.
  • FIG. 3J is an electrical schematic diagram of a sub-crystal oscillator circuit based on FIG. 3E.
  • FIG. 4 is a schematic block diagram of the internal structure of the microprocessor in FIGS. 3H and 3J.
  • FIG. 5 is a schematic structural diagram of an electronic shelf label system according to the present invention.
  • FIG. 6 is a circuit block diagram of the main controller in FIG. 5.
  • FIG. 7 is a schematic diagram of a signal flow when the electronic shelf label system of the present invention performs data transmission and reception.
  • FIG. 7A shows the transmission data frame sent by the main controller
  • FIG. 7B shows the baseband signal encoded by the encoder
  • FIG. 7C shows the modulated signal modulated by the modulator, and also shows that the receiving antenna group is input to the microprocessor signal input port
  • Figure 7D shows the pulse signal that the microprocessor converts the modulation signal from the microprocessor signal input port and reads it into the internal bus
  • Figure 7E shows the virtual baseband obtained after processing by the microprocessor demodulation program
  • the signal is a data column representing the characteristics of the baseband signal parameter
  • FIG. 7F shows the received data frame obtained after processing by the microprocessor decoding program.
  • FIG. 8 is a waveform diagram of signal nodes in FIG. 7C and FIG. 7D in the PSK mode.
  • Fig. 8A shows the modulation signal corresponding to Fig. 7C
  • Fig. 8B shows the pulse signal corresponding to Fig. 7D entering the internal bus of the microprocessor.
  • FIG. 9 is a waveform diagram of signal nodes in FIG. 7C and FIG. 7D in the FSK mode. Among them, FIG. 9A shows a modulation signal corresponding to FIG. 7C; FIG. 9B shows a pulse signal corresponding to FIG. 7D entering the internal bus of the microprocessor.
  • FIG. 10 is a waveform diagram of signal nodes in FIGS. 7C and 7D in the ASK mode.
  • FIG. 10A1 and FIG. 10B1 respectively show modulation signals and pulse signals generated when the signal amplitude suddenly decreases for a short period of time at the signal node, and then the amplitude recovers rapidly
  • FIG. 10A2 and FIG. 10B2 respectively show the signal node Where the signal amplitude suddenly becomes large for a short period of time, and then the amplitude is rapidly restored.
  • Figure 10A3 and Figure 10B3 show that the signal amplitude suddenly decreases at the signal node and continues to the next signal. Modulation signal and pulse signal generated when the node recovers.
  • FIG. 11 is a program block diagram of a microprocessor in an electronic tag according to the present invention. detailed description
  • the electronic tag 100 of this embodiment has a casing 1, a circuit device 2, a display screen 3, and a power source 4.
  • the circuit device 2 is disposed in the casing 1
  • the display screen 3 is disposed on the casing 1 and located at a display window of the casing 1.
  • the circuit device 2 has an antenna device 21, a microprocessor 24, a main crystal circuit 25, and a DC power supply terminal; micro-processing The device 24 is provided with a power terminal, a main crystal terminal 24-13, a display output terminal 24-15, and a signal input port 24-1; the power terminal of the microprocessor 24 and the DC power terminal of the circuit device 2 are co-linear; the microprocessor 24 The main crystal terminal 24-13 is connected to the main crystal circuit 25; the display output terminal 24-15 of the microprocessor 24 is connected to the display ⁇ 3; the output terminal of the antenna device 21 is connected to the signal input port 24-1 of the microprocessor 24
  • the microprocessor 24 is a microprocessor having a function of processing a digitally modulated low frequency radio wave signal by a software program, and can process a low frequency signal frequency of 40 kHz and a main crystal frequency of 4 MHz.
  • the casing 1 is made of plastic pellets, and may be a paper casing in other embodiments.
  • the dotted frame in FIG. 2 indicates the circuit device 2 in which the electronic tag 100 is provided.
  • the antenna device 21 of the circuit device 2 comprises an antenna L and a resonance capacitor C1 in parallel to form a resonance circuit to obtain a higher resonance voltage.
  • the receiving antenna L is a multi-turn coil.
  • the coil is usually wound with enameled wire. In order to improve the reception effect, the coil is usually wound on a ferrite magnet.
  • the frequency of the main crystal in the main crystal circuit 25 is selected to be 4 MHz.
  • the display screen 3 is an LCD liquid crystal display screen (in other embodiments, a light emitting diode LED display or another type of display can also be used).
  • the power source is a 3 V lithium-manganese dioxide battery (in other embodiments, solar cells or other DC power supply devices can be used).
  • the microprocessor 24 of the circuit device 2 is a general-purpose digital chip (also referred to as a single-chip microcomputer).
  • the display driving circuit 24-5 is built in by the microprocessor 24 (in other embodiments, it may be externally installed).
  • the signal input port 24-1 may be a port having a signal amplification function.
  • the microprocessor 24 may be EM73461A, EM73P461A, EM73461B, EM73469A, EM73866, EM73880, EM73983, EM73P968, or EM73C63 in the EM series of single-chip microcomputers from ELAN, Taiwan, or Winbond of Taiwan.
  • the structure of the electronic tag 100 of this embodiment is very simple.
  • the receiving antenna L receives a low-frequency radio digital modulation signal of a corresponding frequency, and the modulation signal is directly input into the microprocessor 24 through the signal input port 24-1 by the output end of the antenna device 21; the microprocessor 24 through the signal input port 24-1
  • the modulation signal is converted into a pulse signal and input to the internal bus 24-11, and then the received signal is demodulated and decoded by the program processing function of the microprocessor 24 itself, and the LCD display 3 is driven to display.
  • a bias circuit 23 is further provided between the output end of the antenna device 21 and the signal input port 24-1 of the microprocessor 24.
  • the bias circuit 23 is composed of voltage-dividing resistors R1, R2 and a DC blocking capacitor C2.
  • the function of the bias circuit 23 is to set the center point of the input signal near the threshold of the signal input port 24-1, thereby improving the circuit device 2. Receive sensitivity.
  • the bias circuit 23 may be integrated inside the microprocessor 24.
  • the microprocessor 24 is further provided with a sampling signal output port 24-2, and one end of the resistor R2 of the bias circuit 23 is provided by the second embodiment. It is connected to the low level to be connected to the sampling signal output port 24-2 of the microprocessor 24, and becomes an enable terminal of the bias circuit.
  • This setting causes the bias circuit 23 to change from being always in the working state to being in the gap working state (the gap time can be set to 5-10 seconds) in the second embodiment, thereby reducing the power consumption of the electronic tag 100.
  • the bias circuit 23 may change from a non-working state to a working state when the high-level signal sent to the enable terminal thereof by the usual receiving microprocessor 24 is changed to the receiving low-level signal.
  • the rest is the same as that of Embodiment 2, except that the preamplifier circuit 22 is used instead of the bias circuit 23, which also improves the receiving sensitivity.
  • the preamplifier circuit 22 is an amplifier circuit composed of an integrated operational amplifier or discrete components. In other embodiments, the pre-amplification circuit 22 may be integrated inside the microprocessor 24.
  • sampling signal output port 24-2 is connected to the enable terminal of the pre-amplification circuit 22.
  • the role of the sample signal output port 24-2 is to sample signals (which can be low, high or The edge trigger signal determines the type of the sampling signal according to the characteristics of the specific amplifier circuit) and outputs it to the enable end of the preamplifier circuit 22 to control whether the preamplifier circuit 22 is in a working state, thereby reducing the power consumption of the electronic tag 100. (Examples 6 to 10, electronic tags)
  • the embodiment 6 shown in FIG. 3F corresponds to the embodiment 1.
  • the embodiment 7 shown in FIG. 3G corresponds to the embodiment 2.
  • the embodiment 8 shown in FIG. 3H corresponds to the embodiment 3.
  • the embodiment 9 shown in FIG. 31 corresponds to the embodiment 4, and the embodiment 10 shown in FIG. 3J corresponds to the embodiment 5.
  • the rest of the embodiments from the embodiment 6 to the embodiment 10 correspond to The embodiments are the same, except that the electronic tag 100 further includes a secondary crystal oscillator circuit 26, the microprocessor 24 also has a secondary crystal oscillator terminal 24-14, and the secondary crystal circuit 26 is connected to the secondary crystal oscillator terminals 24-14 of the microprocessor 24.
  • the sub crystal in the sub crystal circuit 26 is usually 32.768 kHz.
  • the microprocessor 24 in the eighth embodiment and the tenth embodiment adopts a microprocessor having the structure shown in FIG.
  • the internal clock generator 24-10 of the microprocessor 24 can be driven by the sub crystal (usually 32.768 kHz) in the sub crystal circuit 26 at the same time, so that the power saving performance is improved.
  • the microprocessor 24 can work at two clock frequencies, where the secondary crystal is always in the working state, and the main crystal is only in the working state when receiving and processing valid signals.
  • the microprocessor 24 has a higher processing speed because the main crystal oscillator generates a high-frequency clock signal, which can be used for complex data processing, but the power consumption is also large.
  • the microprocessor 24 When not receiving a signal, often only the secondary crystal provides a low-frequency clock signal, and the main crystal does not work. At this time, the microprocessor 24 has a low processing speed, and usually only performs the driving and signal sampling of the LCD liquid crystal display 3. Such a situation occupies most of the entire use process of the electronic tag 100, so that low power consumption can be realized.
  • the electronic shelf label system of this embodiment includes a main controller 5 and a plurality of electronic labels 100.
  • the main controller 5 includes a computer 51, an exciter 52, and a loop antenna 53.
  • the exciter 52 has a communication interface 52-1, an encoder 52-2, a modulator 52-3, a driver 52-4, a resonance capacitor 52-5, a signal generator 52-6, and a power supply 52-7.
  • the exciter 52 is connected to the computer 51 through its communication interface 52-1.
  • the exciter 52 is connected to the loop antenna 53 by its driver 52-4 and a resonance capacitor 52-5; the exciter 52 has a function of encoding and modulating the information transmitted by the computer 51 to drive the loop antenna 53 and send it to space.
  • the loop antenna 53 is constituted by a wire that can be surrounded on the ceiling or wall of a shopping mall using the system of the present invention. Most of the radio signals sent from the main controller 5 will be concentrated in the range of the shopping mall surrounded by the loop antenna 53.
  • the electronic tag 100 obtained in the foregoing Embodiment 8 or Embodiment 10 (the electronic tags obtained in Embodiments 1 to 7 and Embodiment 9 may also be used in other embodiments) are placed in the range surrounded by the loop antenna 53.
  • the electronic tag 100 within the range can receive the information sent by the main controller 5, and display specific information-commodity prices, etc.-.
  • the level value of the center point of the modulation signal is at a micro level.
  • the signal input of the processor 24 is near the threshold of the port 24-1.
  • the computer 51 is usually used by shopping malls to manage cash registers, scanners and other equipment. It will represent the number of product information
  • the frame signal is transmitted to the exciter 52.
  • the communication interface 52-1 uses a wired serial interface RS232C interface in this embodiment (in other embodiments, an Ethernet interface or a wireless transceiver port can be used).
  • the frequency f (hereinafter referred to as the system operating frequency f) of the low-frequency electromagnetic wave carrier signal emitted by the signal generator 52-6 in the exciter 52 is 40 kHz in this embodiment, and the system operating frequency f may be between 4 kHz and Select within a 200kHz range.
  • the data frame shown in FIG. 7A received by the computer 51 and received via the communication interface 52-1 usually includes the address code ID of the electronic tag 100, the commodity price, the display mode instruction, the work status instruction, and the check code. Wait.
  • the encoder 52-2 encodes the baseband signal as shown in FIG. 7B according to a certain rule.
  • the baseband signal usually has two parts, a start bit and a data bit.
  • the baseband signal is composed of high-level H and low-level L alternately.
  • the duration of a high-level H or low-level L is referred to herein as the symbol length 62.
  • each symbol length 62 cannot be too small, usually greater than 30 / f (f refers to Is the operating frequency of the system).
  • the modulator 52-3 modulates the baseband signal on the sine wave signal sent from the signal generator 52-6 to form a modulation signal as shown in FIG. 7C, and then amplifies the power of the signal through the driver 52-4.
  • the driver 52-4 drives the loop antenna 53 which is resonant in series with the resonance capacitor 52-5 to transmit the electromagnetic wave of the modulated signal to the shopping mall space.
  • the resonance capacitor 52-5 is in series resonance with the loop antenna 53 having an inductive characteristic, so that the current on the loop antenna 53 is strengthened, and the electromagnetic wave energy of the modulated signal can be fully transmitted.
  • the loop antenna 53 and the antenna L of the antenna device 21 of the electronic tag 100 are coupled in space.
  • the modulation method of the modulator 52-3 in the exciter 52 is digital modulation.
  • a conventional phase shift keying PSK modulation method is used (in other embodiments, the three conventional digital modulation methods can also be used.
  • the baseband signal For a baseband signal, at the signal node 61, the baseband signal level is changed.
  • the modulator 52-3 modulates the waveform parameters of the sine wave (carrier signal) are changed at the signal node 61. To reverse its phase.
  • the ⁇ processor 24 of the electronic tag 100 (also referred to as a single-chip microcomputer in some places, see FIG. 4) converts the modulation signal shown in FIG. 8A into a pulse signal shown in FIG. 8B through the signal input port 24-1, and then inputs it to the internal bus 24 -11 on. Because the microprocessor 24 can analyze the pulse signal with a program, it can only make a decision on the time-related parameters of the pulse signal, so the time parameter of the pulse signal at the signal node 61 shown in FIG. 8B has a significant change, which makes the demodulation Made it happen.
  • Step 71 Apply working power 4 to each relevant part of the electronic tag 100, including the microprocessor 24 in The internal components are powered on and the microprocessor 24 is reset.
  • Step 72 The main crystal oscillator circuit 25 and the sub crystal oscillator circuit 26 are started by the microprocessor 24, and then program initialization is performed.
  • Step 73 Stop the main crystal oscillator circuit 25, and the microprocessor 24 enters a power saving state.
  • Step 74 The sampling signal output port 24-2 of the microprocessor 24 outputs a high level, and the first timer 24-6 is started.
  • the timing length can be set to about 5 seconds, and the timing of the first timer 24-6 is reached.
  • the sampling signal output port 24-2 outputs a low level to the enable terminal of the bias circuit 23, so that the level of the output terminal of the bias circuit 23 is at the signal input port 24-1 of the microprocessor 24 when there is no signal input. Near the threshold, when a signal is input, the center point of the signal is near the threshold of the signal input port 24-1 of the microprocessor 24.
  • Step 75 Detect whether there is a signal input that may be related to the modulation signal at the signal input port 24-1.
  • the method is: start the second timer 24-7, the timing length must be greater than the maximum value of the symbol length 62, a more appropriate timing length is about three times the maximum value of the symbol length 62; within this timing length, repeatedly Read the value (0 or 1) of the signal input port 24-1 and determine whether there is a change. If there is a change, it is regarded as a signal input on the signal input port 24-1. If there is no change, it is regarded as a signal input port 24-1. signal input. If there is no signal input at signal input port 24-1, go to step 74; if there is signal input at signal input port 24-1, go to step 76.
  • Step 76 At this time, the sampling phase has ended and the signal processing phase is entered.
  • the microprocessor 24 starts the main crystal circuit 25, and the microprocessor 24 enters a high-speed operation state.
  • Step 77 Detect whether the signal input from the signal input port 24-1 has a signal node 61. Because the microprocessor 24 can only discern significant time-related parameter changes, these parameters include frequency, period, and pulse width. A more suitable measurement parameter is the period. For convenience, the periods of any two adjacent pulse waveforms in FIG. 8B are defined as T1 and T2. Comparing the periods T1 and T2 of two adjacent pulses, when I T1-T2
  • the ⁇ selection in this embodiment is 1 / 4f.
  • the modulation signal at signal node 61 is in a transition process, the waveform is irregularly distorted, and the parameters of the pulse signal are also complicated. Such a change process will last for several cycles, so a simple judgment is actually made A relatively high bit error rate will be generated.
  • the above two conditions for judging whether a signal node appears are used at the same time. As long as one of the conditions is satisfied, the signal node 61 is considered to be present, and the process proceeds to the next step 78-2, otherwise, the process proceeds to step 78-1. It can be known from FIG. 8B that the pulse signal has a signal node 61 at the second T2 shown in the figure.
  • the first timer 24-6 can be restarted on the rising or falling edge of the pulse signal, and at the same time, the previously obtained timing data T1 or T2 is stored in the corresponding address unit of the data memory 24-9, so that Compare the timing data.
  • Step 78-1 In the same way as in step 75, detect whether there is a signal input that may be related to the modulation signal at the signal input port 24-1. If yes, the program proceeds to step 77; if not, the program proceeds to step 73.
  • Step 78-2 If step 78-2 is performed for the first time, start the second timer 24-7. If step 78-2 is not performed for the first time, store the length of the second timer 24-7 in sequence.
  • the second timer 24-9 restarts.
  • Step 79 After performing step 77 and step 78-2 in a loop multiple times, the RAMI, RAM2, RAM3, and ⁇ RAMn groups of RAM in the data memory RAM have already stored data representing the symbol length 62 shown in FIG. 7E to form A series of data, which can be called a virtual baseband signal, can be decoded after a complete frame of data is obtained.
  • the decoding process is a reverse process that follows the same rules as the encoder 52-2.
  • the received data frame shown in FIG. 7F is exactly the same as the transmitted data frame shown in FIG. 7A and stored in the data memory. 24-9 corresponding units.
  • Step 80 If a complete received data frame has been received, the address code ID, commodity price, display mode instruction, working status instruction, and check code included in the received data frame can be analyzed and processed to control the LCD liquid crystal. The display state and content of the display screen 3 and the operating state of the control microprocessor 24. Immediately return to step 77 to run the program cyclically.
  • step 77 it is necessary to process step 77 as an interrupt handler, that is, in the process of steps 78-2, 79, and 80, it is also determined whether the signal node 61 exists or not. It should be noted that it may be detected as multiple signal nodes 61 at one signal node 61. In this case, it is necessary to reset and start the first timer 24-6 every time the signal node 61 is detected. The length can be set to about half of the minimum symbol length 62. It is only after the timing of the first timer 24-6 that the next signal node 61 is detected.
  • step 73 and step 76 in the above procedure are omitted. If the microprocessor 24 of the electronic tag 100 is not provided with the sample signal output port 24-2, step 74 in the above procedure is omitted. If neither the secondary crystal circuit 26 nor the microprocessor 24 is provided with the sampling signal output port 24-2, steps 73, 74, 76 and 78-1 in the above-mentioned program are omitted; when the program runs to step 77, The non-signal contact 61 runs step 75.
  • step 74 in the above procedure is omitted, and the signal center point is lower than the threshold of the signal input port 24-1, so that the amplitude of the received modulation signal is required to be large.
  • FIG. 9 shows the electronic tag 100 receiving modulation in the FSK mode.
  • the signal time corresponds to the waveform diagram at the signal node in the modulated signal of FIG. 7C and the pulse signal of FIG. 7D.
  • Fig. 9A shows the modulation signal entering the microprocessor's 24 signal input port 24-1;
  • Fig. 9B shows the pulse signal entering the microprocessor's internal bus 24-11. It can be known from FIG. 9B that the pulse signal has a signal node 61 at the second T1 shown in the figure.
  • FIG. 10 shows the electronic tag 100 receiving the modulation signal in the ASK mode. This time corresponds to the waveform diagram at the signal node in the modulation signal of FIG. 7C and the pulse signal of FIG. 7D.
  • FIG. 10A1 and FIG. 10B1 respectively show a modulation signal and a pulse signal generated when the signal amplitude suddenly decreases for a short period of time at the signal node 61, and then the amplitude recovers rapidly. It can be seen from FIG. 10B1 that the pulse signal has a signal node 61 at the second T2 shown in the figure.
  • FIG. 10A2 and FIG. 10B2 respectively show the modulation signal and the pulse signal generated when the signal amplitude suddenly increases for a short period of time at the signal node, and then the amplitude recovers rapidly. It can be seen from FIG. 10B2 that the pulse signal has a signal node 61 at the first T2 shown in the figure.
  • FIG. 10A3 and FIG. 10B3 respectively show the modulation signal and pulse signal generated when the signal amplitude suddenly decreases at the signal node and continues to be recovered at the next signal node. It can be known from FIG. 10B3 that the pulse signal has a signal node 61 at the beginning of the second T2 shown in the figure.
  • the method for selecting the resistance values of the resistors R1 and R2 of the bias circuit 23 in the electronic tag 100 is to enable the modulation signal when the enable terminal of the bias circuit 23 is connected to a low level.
  • the level value of the center point is deviated from the threshold of the signal input port 24-1 of the microprocessor 24 by about 1/3 (both up and down shifts are possible).

Abstract

This invention refers to an electronic label system on a shelf and an electronic label thereof. The main controller in the system of this invention, transmits a low-frequency radio wave, which is used as a carrier wave for digital signals, to the corresponding electronic label. What is the most significant in this invention is that there is a software instead of a demodulator circuit, which brings large power consumption and high cost. What is more, the software could make use of the program instructions in the microprocessor to sample signals at a scheduled time and to demodulate digital signals directly from radio wave, and further to store and display the data after decoding and other process. It is advantageous in the system that it is reliable and easy to use, and moreover, it brings low cost and low power consumption with a simple structure.

Description

电子货架标签系统及其电子标签 技术领域  Electronic shelf label system and electronic label
本发明涉及一种货架标签系统及其标签。 背景技术  The invention relates to a shelf label system and a label thereof. Background technique
在商场、仓库等场合, 通常采用纸质标签来显示商品价格、 规格、库存量和 /或促销 标志等。但是要进行数据更新时, 工作量较大, 且容易出错, 不适合进行现代化的科学 管理。 作为其改进, 出现了用电子标签代替纸质标签的电子货架标签系统。 电子货架标 签系统包含了多个带显示装置的电子标签, 通常是安装在货架上替代原有的纸质标签, 它可以很好地解决商品标价问题, 可以通过计算机远程控制来改变标价, 无需任何手工 操作。在同一数据库平台上,可使系统主机、收款机和电子标签始终保持价格的一致性, 并且可以方便地进行动态定价和显示促销信息, 为价格管理带来了一个全新的世界。  In shopping malls, warehouses, etc., paper labels are usually used to display product prices, specifications, inventory, and / or promotional signs. However, when data is to be updated, the workload is large and error-prone, which is not suitable for modern scientific management. As an improvement, an electronic shelf label system using an electronic label instead of a paper label has appeared. The electronic shelf label system includes multiple electronic labels with display devices. Usually it is installed on the shelf to replace the original paper label. It can solve the problem of product price. It can be remotely controlled by the computer to change the price without any need. Manual operation. On the same database platform, system hosts, cash registers, and electronic labels can always maintain price consistency, and dynamic pricing and promotion information can be conveniently displayed, bringing a whole new world to price management.
电子货架标签系统发展初期最先采用的是有线型式的产品, 每个电子标签是通过电 缆提供电能和传递信息的, 这样的产品使用时很不方便, 现在已逐步被淘汰, 只有少量 的用在仓库货架上。 后来出现的利用无线电微波 (频率通常为 2.4GHz)传递信息的电 子货架标签系统, 如美国专利 US6108367等在性能和使用方便等方面获得了较大的提 高。这类产品往往采用双向传输方式, 即每个电子标签在接收到信息之后能够给系统回 送一个确认信号, 这种方式提高了可靠性。 目前存在的问题是: 系统在每个货架附近都 要安装天线, 2.4GHz的频率容易与现有的通讯系统互相千扰, 同时其结构也较为复杂, 成本较高。 也有采用低频无线电波传递信息的电子货架标签系统, 如美国专利 US5504475所公开的电子货架标签系统即釆用了低频无线电波,虽然从理论上说低频无 线电波在很大程度上避免了干扰问题, 可靠性和安全性也得到了提高, 但是根据专利权 人在发明中的描述,该发明的特点在于采用了一种可用外部指令调整采样时间间隔的方 法, 使得接收电路经常处于非工作状态来减少功耗。但存在的问题是由于系统中的每个 电子标签内部都需要一个具有解调功能的接收电路才能将无线波中的数字基带信号提 取出来(称为解调), 接收电路的存在使得电子标签的成本和功耗都比较大。 发明内容  In the early stage of the development of electronic shelf labeling systems, wired products were used first. Each electronic label provided power and transmitted information through cables. Such products are very inconvenient to use. They have been gradually phased out, and only a few are used in Warehouse shelves. Later, electronic shelf label systems that used radio and microwave (usually 2.4GHz) to transmit information, such as the US patent US6108367, etc., have greatly improved performance and ease of use. This type of product often uses a two-way transmission method, that is, each electronic tag can send a confirmation signal to the system after receiving the information, which improves reliability. The current problems are: the system needs to install antennas near each shelf, the 2.4GHz frequency is easy to interfere with the existing communication system, and its structure is also more complicated and the cost is higher. There are also electronic shelf label systems that use low-frequency radio waves to transmit information. For example, the electronic shelf label system disclosed in US Patent No. 5,504,475 uses low-frequency radio waves, although in theory, low-frequency radio waves largely avoid interference problems. Reliability and security have also been improved, but according to the patentee's description in the invention, the invention is characterized by a method that uses external instructions to adjust the sampling time interval, so that the receiving circuit is often in a non-working state to reduce Power consumption. However, there is a problem because each electronic tag in the system needs a receiving circuit with a demodulation function to extract the digital baseband signal in the radio wave (called demodulation). The existence of the receiving circuit makes the electronic tag's Both cost and power consumption are relatively large. Summary of the Invention
本发明的目的是, 提供一种结构简单、 成本较低、 工作可靠、 使用方便、 低功耗的 电子货架标签系统及其电子标签。 本发明的总的技术构思是: 采用低频无线电波作为数字信号的载波, 在电子标签中 去掉功耗较大的硬件解调电路, 采用软件的方式通过微处理器中的程序指令, 按定时的 方式釆样信号而直接从无线电波中解调并提取数字信息,进而再进行解码等处理后而实 现保存和显示数据的功能。 An object of the present invention is to provide an electronic shelf label system with simple structure, low cost, reliable operation, convenient use, and low power consumption, and an electronic label thereof. The general technical idea of the present invention is: use low-frequency radio waves as the carrier of digital signals, remove the hardware demodulation circuit with large power consumption in the electronic tag, and use software to pass program instructions in the microprocessor in accordance with the timing The method uses the signal to demodulate and extract digital information directly from the radio waves, and then performs processing such as decoding to realize the functions of saving and displaying data.
实现本发明目的中提供一种结构简单、 成本较低、 工作可靠、 使用方便、 低功耗的 电子标签的技术方案是: 该电子标签具有外壳、 电路装置和显示屏, 电路装置设置在外 壳中, 显示屏设置在外壳上且位于外壳的显示窗口处; 电路装置具有天线装置、 微处理 器、 主晶振电路和直流电源端; 微处理器设有电源端、 主晶振端、 显示输出端和信号输 入端口; 微处理器的电源端与电路装置的直流电源端共线; 微处理器的主晶振端与主晶 振电路相连; 微处理器的显示输出端与显示屏相连或通过驱动电路与显示屏相连; 其特 征在于: 天线装置的输出端与微处理器的信号输入端口相连; 微处理器是具有通过软件 程序处理经数字调制的低频无线电波信号功能的微处理器,其可处理的低频信号频率在 The technical solution for providing an electronic tag with simple structure, low cost, reliable operation, convenient use, and low power consumption in achieving the purpose of the present invention is: The electronic tag has a casing, a circuit device, and a display screen, and the circuit device is disposed in the casing. The display screen is arranged on the casing and is located at the display window of the casing; the circuit device has an antenna device, a microprocessor, a main crystal circuit and a DC power terminal; the microprocessor is provided with a power terminal, a main crystal terminal, a display output terminal and a signal Input port; The power terminal of the microprocessor is in line with the DC power terminal of the circuit device; the main crystal terminal of the microprocessor is connected to the main crystal circuit; the display output terminal of the microprocessor is connected to the display screen or the driving circuit and the display screen It is characterized in that: the output end of the antenna device is connected to the signal input port of the microprocessor; the microprocessor is a microprocessor having a function of processing digitally modulated low-frequency radio wave signals through a software program, and can process low-frequency signals Frequency in
4kHz至 200kHz之间。 4kHz to 200kHz.
上述微处理器的信号输入端口是具有信号放大功能的端口,或者是电路装置还具有 预放大电路或偏置电路;预放大电路或偏置电路设置在天线装置的输出端与微处理器的 信号输入端口之间。微处理器还设有采样信号输出端口; 采样信号输出端口与预放大电 路或偏置电路的使能端相连。  The signal input port of the microprocessor is a port with a signal amplification function, or the circuit device also has a preamplifier circuit or a bias circuit; the preamplifier circuit or the bias circuit is provided at the output end of the antenna device and the signal of the microprocessor Between input ports. The microprocessor also has a sampling signal output port; the sampling signal output port is connected to the enable terminal of the pre-amplification circuit or the bias circuit.
上述电路装置还具有副晶振电路, 微处理器还具有副晶振端, 副晶振电路与微处理 器的副晶振端相连。 副晶振电路的振荡频率在 20kHz至 100kHz之间, 主晶振电路 25 的振荡频率在 400kHz至 40MHz之间。  The above circuit device also has a secondary crystal oscillator circuit, and the microprocessor also has a secondary crystal oscillator terminal, and the secondary crystal oscillator circuit is connected to the secondary crystal oscillator terminal of the microprocessor. The oscillation frequency of the secondary crystal circuit is between 20 kHz and 100 kHz, and the oscillation frequency of the main crystal circuit 25 is between 400 kHz and 40 MHz.
本标签还具有直流电源, 直流电源的输出端与电路装置的电源端相连。  This label also has a DC power supply. The output end of the DC power supply is connected to the power supply end of the circuit device.
上述电路装置的微处理器通过软件程序处理经数字调制的低频无线电波信号的过 程是: ①根据信号输入端口的电平变化来判断有无信号输入; ②通过比较信号波形的时 间参数的变化来判断有无信号节点; ③测算出相邻的信号节点之间的码元长度, 并存入 数据存储器中, 这一系列码元长度的集合形成了代表基带信号的数据列, 从而实现了软 件解调功能; ④将基带信号解码成实际的数据帧, 完成了软件解码过程; ⑤将接收到的 数据分析处理, 然后控制微处理器的工作状态, 并将有关信息通过显示屏显示出来。  The process for the microprocessor of the above circuit device to process the digitally modulated low frequency radio wave signal through a software program is: ① judging whether there is a signal input according to the level change of the signal input port; ② comparing the change of the time parameter of the signal waveform to Determine whether there is a signal node; ③ Measure the symbol length between adjacent signal nodes and store it in the data memory. The collection of this series of symbol lengths forms a data column representing the baseband signal, thereby achieving software solution. Tuning function; ④ Decode the baseband signal into actual data frames, and complete the software decoding process; ⑤ Analyze and process the received data, then control the working state of the microprocessor, and display relevant information through the display screen.
实现本发明目的中提供一种结构简单、 成本较低、 工作可靠、 使用方便、 低功耗的 电子货架标签系统的技术方案是: 本系统具有主控制器和多个电子标签; 主控制器具有 计算机、激发器和环形天线; 激发器通过其通讯接口与计算机相连; 激发器由其驱动器 和谐振电容与环形天线相连; 激发器具有将计算机传送过来的信息经编码、调制后驱动 环形天线发送到空间的功能; 电子标签放置在环形天线所围绕的范围内, 可以接收到主 控制器发送出来的信息, 并将特定的信息显示出来; 电子标签具有外壳、 电路装置和显 示屏, 电路装置设置在外壳中, 显示屏设置在外壳上且位于外壳的显示窗口处; 电路装 置具有天线装置、 微处理器、 主晶振电路和直流电源端; 微处理器设有电源端、 主晶振 端、显示输出端和信号输入端口; 微处理器的电源端与电路装置的直流电源端共线; 微 处理器的主晶振端与主晶振电路相连;微处理器的显示输出端与显示屏相连或通过驱动 电路与显示屏相连; 其特征在于: 天线装置的输出端与微处理器的信号输入端口相连; 微处理器是具有通过软件程序处理经数字调制的低频无线电波信号功能的微处理器,其 可处理的低频信号频率在 4kHz至 200kHz之间。 微处理器通过软件程序处理低频无线 电波信号的过程是: ①根据信号输入端口的电平变化来判断有无信号输入; ②通过比较 信号波形的时间参数的变化来判断有无信号节点;③测算出相邻的信号节点之间的码元 长度, 并将各码元长度存入数据存储器的相应单元中, 这一系列码元长度的集合形成了 代表基带信号参数特征的数据列, 从而实现了软件解调功能; ④将基带信号解码成实际 的接收数据帧, 而完成了软件解码过程; ⑤将接收到的数据分析处理, 然后控制微处理 器的工作状态, 并将有关信息通过显示屏显示出来。 The technical solution of providing an electronic shelf label system with simple structure, low cost, reliable work, convenient use, and low power consumption for achieving the purpose of the present invention is: The system has a main controller and multiple electronic labels; the main controller has Computer, exciter and loop antenna; the exciter is connected to the computer through its communication interface; the exciter is connected to the loop antenna by its driver and resonant capacitor; the exciter has the information transmitted by the computer driven by encoding and modulation The function that the loop antenna sends to the space; The electronic label is placed in the range surrounded by the loop antenna, and can receive the information sent by the main controller and display specific information; the electronic label has a housing, a circuit device and a display screen. The circuit device is disposed in the casing, and the display screen is disposed on the casing and located at the display window of the casing; the circuit device has an antenna device, a microprocessor, a main crystal circuit and a DC power terminal; the microprocessor is provided with a power terminal and a main crystal terminal Display output terminal and signal input port; the power supply terminal of the microprocessor is in line with the DC power supply terminal of the circuit device; the main crystal terminal of the microprocessor is connected to the main crystal circuit; the display output terminal of the microprocessor is connected to the display or The driving circuit is connected to the display screen; It is characterized in that: the output end of the antenna device is connected to the signal input port of the microprocessor; the microprocessor is a microprocessor with a function of processing digitally modulated low-frequency radio wave signals through a software program, It can process low-frequency signals between 4kHz and 200kHz. The process of the microprocessor processing low-frequency radio wave signals through a software program is: ① judging whether there is a signal input according to the level change of the signal input port; ② judging whether there is a signal node by comparing changes in the time parameter of the signal waveform; ③ measurement The symbol length between adjacent signal nodes is obtained, and each symbol length is stored in a corresponding unit of the data memory. This set of symbol lengths forms a data column representing the characteristics of the baseband signal parameter, thereby achieving Software demodulation function; ④ decode the baseband signal into the actual received data frame, and complete the software decoding process; ⑤ analyze and process the received data, then control the working state of the microprocessor, and display relevant information through the display screen come out.
本发明具有积极的效果: (1 )本发明的电子货架标签系统采用低频无线电波作为信 号载波, 因为其频率范围远离现有的商用通讯频段, 而且其发射范围也基本上局限在特 定的空间, 所以本系统与现有通讯系统之间的相互干扰小, 因而可靠性较髙、 安全性较 好。(2)本发明的电子标签通过对所接收到的经数字调制的低频无线电波信号采用软件 程序进行解调, 因而摈弃了已有技术中功耗较大的硬件解调电路, 不仅功耗较低而且结 构简单、 成本较低。 (3 ) 常用的三种数字调制方式 (ASK、 PSK、 FSK)均可应用于本 发明的电子货架标签系统,因而本发明的应用面较广。在具体实施过程中需要从误码率、 传输效率、 实施成本和具体采用的微处理器 24的特点来选择相应的调制方式。 (4) 当 本发明的电子标签在电路装置中设置预放大电路或偏置电路时, 可提高接受灵敏度; 在 此基础上若设置定时采样功能,这可在提高接受灵敏度的同时,有效地抑制功耗的增加。 (5 ) 当本发明的电子标签中的微处理器采用双晶振工作时, 可以大大降低标签在无信 号状态下的待机功耗。 (6)本发明的电子货架标签系统广泛应用于零售商场和仓储管理 系统, 可以提高现代化科学管理水平。 附图说明 The present invention has positive effects: (1) The electronic shelf label system of the present invention uses a low-frequency radio wave as a signal carrier, because its frequency range is far from the existing commercial communication frequency band, and its emission range is basically limited to a specific space. Therefore, the mutual interference between this system and the existing communication system is small, so the reliability is relatively high and the security is good. ( 2 ) The electronic tag of the present invention uses a software program to demodulate the received digitally modulated low-frequency radio wave signal, thus eliminating the hardware demodulation circuit with large power consumption in the prior art. Low and simple structure, low cost. (3) The three commonly used digital modulation methods (ASK, PSK, FSK) can be applied to the electronic shelf label system of the present invention, so the application of the present invention is wide. In the specific implementation process, the corresponding modulation mode needs to be selected from the bit error rate, transmission efficiency, implementation cost, and characteristics of the specific microprocessor 24 used. (4) When the electronic tag of the present invention is provided with a pre-amplification circuit or a bias circuit in the circuit device, the receiving sensitivity can be improved; if a timing sampling function is set on this basis, this can effectively suppress the receiving sensitivity while suppressing it. Increased power consumption. (5) When the microprocessor in the electronic tag of the present invention operates with a dual crystal oscillator, the standby power consumption of the tag in a no-signal state can be greatly reduced. (6) The electronic shelf label system of the present invention is widely used in retail stores and warehouse management systems, and can improve the modern scientific management level. BRIEF DESCRIPTION OF THE DRAWINGS
图 1为本发明电子标签外形示意图。 图 2为图 1的俯视示意图。 FIG. 1 is a schematic diagram of an electronic tag according to the present invention. FIG. 2 is a schematic top view of FIG. 1.
图 3A至图 3J为本发明电子标签的电原理示意框图。 其中: 图 3A为结构较为简单 的一种电原理图。 图 3B为在图 3A的基础上设置偏置电路后的电原理图。 图 3C为在图 3B的基础上在微处理器上设置采样信号输出端口后的电原理图。 图 3D为在图 3A的基 础上设置预放大电路后的电原理图。 图 3E为在图 3D的基础上在微处理器上设置采样 信号输出端口后的电原理图。图 3F为在图 3A的基础上设置副晶振电路的电原理图。图 3G为在图 3B的基础上设置副晶振电路的电原理图。 图 3H为在图 3C的基础上设置副 晶振电路的电原理图。 图 31为在图 3D的基础上设置副晶振电路的电原理图。 图 3J为 在图 3E的基础上设置副晶振电路的电原理图。  3A to 3J are schematic block diagrams of the electrical principle of the electronic tag of the present invention. Among them: Fig. 3A is an electrical schematic diagram with a relatively simple structure. FIG. 3B is an electrical schematic diagram after a bias circuit is provided on the basis of FIG. 3A. FIG. 3C is an electrical schematic diagram after the sampling signal output port is set on the microprocessor based on FIG. 3B. FIG. 3D is an electrical schematic diagram after a pre-amplification circuit is provided on the basis of FIG. 3A. FIG. 3E is an electrical schematic diagram after the sampling signal output port is set on the microprocessor based on FIG. 3D. FIG. 3F is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3A. FIG. 3G is an electrical schematic diagram of a sub-crystal oscillator circuit based on FIG. 3B. FIG. 3H is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3C. FIG. 31 is an electrical schematic diagram of a secondary crystal circuit provided on the basis of FIG. 3D. FIG. 3J is an electrical schematic diagram of a sub-crystal oscillator circuit based on FIG. 3E.
图 4为图 3H和图 3 J中的微处理器的内部结构示意框图。  FIG. 4 is a schematic block diagram of the internal structure of the microprocessor in FIGS. 3H and 3J.
图 5为本发明电子货架标签系统的结构示意图。  FIG. 5 is a schematic structural diagram of an electronic shelf label system according to the present invention.
图 6为图 5中主控制器的电路框图。  FIG. 6 is a circuit block diagram of the main controller in FIG. 5.
图 7为本发明的电子货架标签系统在进行数据发送与接收时信号流的示意图。 其中 图 7A表示主控制器发送的发送数据帧; 图 7B表示经编码器编码后的基带信号; 图 7C 表示经调制器调制后的调制信号,也表示接收天线组输入到微处理器信号输入端口的信 号; 图 7D表示微处理器将调制信号从微处理器信号输入端口转换并读入到内部总线上 的脉冲信号; 图 7E表示经微处理器解调程序处理后得到的可称为虚拟基带信号的代表 基带信号参数特征的数据列;图 7F表示经微处理器解码程序处理后得到的接收数据帧。  FIG. 7 is a schematic diagram of a signal flow when the electronic shelf label system of the present invention performs data transmission and reception. Among them, FIG. 7A shows the transmission data frame sent by the main controller; FIG. 7B shows the baseband signal encoded by the encoder; FIG. 7C shows the modulated signal modulated by the modulator, and also shows that the receiving antenna group is input to the microprocessor signal input port Figure 7D shows the pulse signal that the microprocessor converts the modulation signal from the microprocessor signal input port and reads it into the internal bus; Figure 7E shows the virtual baseband obtained after processing by the microprocessor demodulation program The signal is a data column representing the characteristics of the baseband signal parameter; FIG. 7F shows the received data frame obtained after processing by the microprocessor decoding program.
图 8为在 PSK方式下图 7C和图 7D中信号节点处的波形示意图。其中, 图 8A表示 与图 7C相对应的调制信号;图 8B表示进入微处理器内部总线上的与图 7D相对应的脉 冲信号。  FIG. 8 is a waveform diagram of signal nodes in FIG. 7C and FIG. 7D in the PSK mode. Among them, Fig. 8A shows the modulation signal corresponding to Fig. 7C; Fig. 8B shows the pulse signal corresponding to Fig. 7D entering the internal bus of the microprocessor.
图 9为在 FSK方式下图 7C和图 7D中信号节点处的波形示意图。其中, 图 9A表示 与图 7C相对应的调制信号;图 9B表示进入微处理器内部总线上的与图 7D相对应的脉 冲信号。  FIG. 9 is a waveform diagram of signal nodes in FIG. 7C and FIG. 7D in the FSK mode. Among them, FIG. 9A shows a modulation signal corresponding to FIG. 7C; FIG. 9B shows a pulse signal corresponding to FIG. 7D entering the internal bus of the microprocessor.
图 10为在 ASK方式下图 7C和图 7D中信号节点处的波形示意图。其中, 图 10A1、 图 10B1分别表示在信号节点处信号振幅突然变小很短一段时间, 然后振幅又迅速恢复 的情形下所产生的调制信号和脉冲信号; 图 10A2、图 10B2分别表示在信号节点处信号 振幅突然变大很短一段时间,然后振幅又迅速恢复的情形下所产生的调制信号和脉冲信 号; 图 10A3、图 10B3分别表示在信号节点处信号振幅突然变小并持续到下一个信号节 点处才恢复的情形下所产生的调制信号和脉冲信号。  FIG. 10 is a waveform diagram of signal nodes in FIGS. 7C and 7D in the ASK mode. Among them, FIG. 10A1 and FIG. 10B1 respectively show modulation signals and pulse signals generated when the signal amplitude suddenly decreases for a short period of time at the signal node, and then the amplitude recovers rapidly; FIG. 10A2 and FIG. 10B2 respectively show the signal node Where the signal amplitude suddenly becomes large for a short period of time, and then the amplitude is rapidly restored. Figure 10A3 and Figure 10B3 show that the signal amplitude suddenly decreases at the signal node and continues to the next signal. Modulation signal and pulse signal generated when the node recovers.
图 11为本发明的电子标签中微处理器的程序框图。 具体实施方式 FIG. 11 is a program block diagram of a microprocessor in an electronic tag according to the present invention. detailed description
(实施例 1、 电子标签)  (Example 1, electronic tag)
见图 1至图 3A, 本实施例的电子标签 100具有外壳 1、 电路装置 2、 显示屏 3和电 源 4。 电路装置 2设置在外壳 1中, 显示屏 3设置在外壳 1上且位于外壳 1的显示窗口 处; 电路装置 2具有天线装置 21、 微处理器 24、 主晶振电路 25和直流电源端; 微处理 器 24设有电源端、 主晶振端 24-13、 显示输出端 24-15和信号输入端口 24-1 ; 微处理器 24的电源端与电路装置 2的直流电源端共线; 微处理器 24的主晶振端 24-13与主晶振 电路 25相连; 微处理器 24的显示输出端 24-15与显示屛 3相连; 天线装置 21的输出 端与微处理器 24的信号输入端口 24-1相连; 微处理器 24是具有通过软件程序处理经 数字调制的低频无线电波信号功能的微处理器, 其可处理的低频信号频率 40kHz, 主晶 振频率为 4MHz。  As shown in Figs. 1 to 3A, the electronic tag 100 of this embodiment has a casing 1, a circuit device 2, a display screen 3, and a power source 4. The circuit device 2 is disposed in the casing 1, and the display screen 3 is disposed on the casing 1 and located at a display window of the casing 1. The circuit device 2 has an antenna device 21, a microprocessor 24, a main crystal circuit 25, and a DC power supply terminal; micro-processing The device 24 is provided with a power terminal, a main crystal terminal 24-13, a display output terminal 24-15, and a signal input port 24-1; the power terminal of the microprocessor 24 and the DC power terminal of the circuit device 2 are co-linear; the microprocessor 24 The main crystal terminal 24-13 is connected to the main crystal circuit 25; the display output terminal 24-15 of the microprocessor 24 is connected to the display 屛 3; the output terminal of the antenna device 21 is connected to the signal input port 24-1 of the microprocessor 24 The microprocessor 24 is a microprocessor having a function of processing a digitally modulated low frequency radio wave signal by a software program, and can process a low frequency signal frequency of 40 kHz and a main crystal frequency of 4 MHz.
外壳 1由塑料粒料注塑制成, 在其它实施例中也可为纸质外壳。 图 2中的虚线框表 示其中所设置的是电子标签 100的电路装置 2。  The casing 1 is made of plastic pellets, and may be a paper casing in other embodiments. The dotted frame in FIG. 2 indicates the circuit device 2 in which the electronic tag 100 is provided.
电路装置 2的天线装置 21由天线 L和谐振电容 C1并联组成一个谐振回路, 以获得 较高的谐振电压。接收天线 L是一个多匝线圈, 线圈通常是用漆包线绕制而成, 为了提 高接收效果, 线圈通常绕制在一个铁氧体磁体上。 主晶振电路 25中的主晶振的频率选 择为 4MHz。 显示屏 3为 LCD液晶显示屏 (在其他实施例中也可采用发光二极管 LED 显示器或其它类型的显示器)。 电源 4釆用 3 V锂-二氧化锰电池 (在其他实施例中可采 用太阳能电池或者其它直流电源装置)。  The antenna device 21 of the circuit device 2 comprises an antenna L and a resonance capacitor C1 in parallel to form a resonance circuit to obtain a higher resonance voltage. The receiving antenna L is a multi-turn coil. The coil is usually wound with enameled wire. In order to improve the reception effect, the coil is usually wound on a ferrite magnet. The frequency of the main crystal in the main crystal circuit 25 is selected to be 4 MHz. The display screen 3 is an LCD liquid crystal display screen (in other embodiments, a light emitting diode LED display or another type of display can also be used). The power source is a 3 V lithium-manganese dioxide battery (in other embodiments, solar cells or other DC power supply devices can be used).
参见图 4, 电路装置 2的微处理器 24是一种通用数字芯片 (也称作单片机)。 内部 设有至少一个外部数据输入口 24-1 (也即上述信号输入端口 24-1 )、 带中断处理功能的 中央处理单元 24-3、 ALU运算逻辑部件 24-4、显示驱动电路 24-5、至少两个定时器(第 一定时器 24-6和第二定时器 24-7)、 程序存储器 24-8、 数据存储器 24-9、 时钟发生器 24-10 (由主晶振电路 25驱动)等。 显示驱动电路 24-5由微处理器 24内置 (在其它实 施例中也可以外置)。 在其他实施例中信号输入端口 24-1可以是具有信号放大功能的端 口。 本实施例中, 微处理器 24可以是台湾义隆 (ELAN) 公司的 EM系列单片机中的 EM73461A、 EM73P461A、 EM73461B、 EM73469A、 EM73866, EM73880、 EM73983、 EM73P968或 EM73C63 , 或者是台湾华邦 (Winbond) 公司的 W741或 W541系列单片 机中的 W741E260、 W541E260, W741C260或 W741C260, 或者是日本东芝 (Toshiba) 公司的 TMP系列单片机中的 TMP47C620/820,或者是円本 NEC公司的 75XL系列单片 机中的 753012A、 753016A、 753017A、 75P3018A、 75P3116、 753104、 753106或 753108, 或者是韩国三星 (SAMSUNG) 公司的 S3C7(KS57)系列单片机中的 S3C7238/C7235、 S3C72C8、 S3C72H8或 S3C72K8/P72K8。 Referring to FIG. 4, the microprocessor 24 of the circuit device 2 is a general-purpose digital chip (also referred to as a single-chip microcomputer). There are at least one external data input port 24-1 (that is, the above-mentioned signal input port 24-1), a central processing unit 24-3 with an interrupt processing function, an ALU arithmetic logic unit 24-4, and a display driving circuit 24-5 , At least two timers (first timer 24-6 and second timer 24-7), program memory 24-8, data memory 24-9, clock generator 24-10 (driven by main crystal oscillator circuit 25) Wait. The display driving circuit 24-5 is built in by the microprocessor 24 (in other embodiments, it may be externally installed). In other embodiments, the signal input port 24-1 may be a port having a signal amplification function. In this embodiment, the microprocessor 24 may be EM73461A, EM73P461A, EM73461B, EM73469A, EM73866, EM73880, EM73983, EM73P968, or EM73C63 in the EM series of single-chip microcomputers from ELAN, Taiwan, or Winbond of Taiwan. The W741E260, W541E260, W741C260 or W741C260 of the company's W741 or W541 series microcontrollers, or the TMP47C620 / 820 of the TMP series microcontrollers of Toshiba Japan, or the 753012A, 753016A of the 75XL series microcontrollers of Eimoto NEC Company , 753017A, 75P3018A, 75P3116, 753104, 753106 or 753108, Or S3C7238 / C7235, S3C72C8, S3C72H8 or S3C72K8 / P72K8 in the S3C7 (KS57) series of single-chip microcomputers from Samsung (SAMSUNG).
本实施例的电子标签 100结构非常简单。接收天线 L接收相应频率的低频无线电数 字调制信号, 由天线装置 21的输出端将调制信号通过信号输入端口 24-1直接输入到微 处理器 24中; 微处理器 24通过信号输入端口 24-1将调制信号转换成脉冲信号输入到 内部总线 24-11,然后利用微处理器 24本身的程序处理功能将所接收到的信号进行解调、 解码, 并驱动 LCD显示屏 3显示。  The structure of the electronic tag 100 of this embodiment is very simple. The receiving antenna L receives a low-frequency radio digital modulation signal of a corresponding frequency, and the modulation signal is directly input into the microprocessor 24 through the signal input port 24-1 by the output end of the antenna device 21; the microprocessor 24 through the signal input port 24-1 The modulation signal is converted into a pulse signal and input to the internal bus 24-11, and then the received signal is demodulated and decoded by the program processing function of the microprocessor 24 itself, and the LCD display 3 is driven to display.
(实施例 2、 电子标签)  (Example 2, electronic tag)
见图 3B, 其余与实施例 1相同, 不同之处在于: 在天线装置 21的输出端与微处理 器 24的信号输入端口 24-1之间还设有偏置电路 23。 偏置电路 23由分压电阻 Rl、 R2 和隔直电容 C2组成, 偏置电路 23的作用是将输入信号的中心点设置在信号输入端口 24-1 的阈值附近, 从而提高了电路装置 2 的接收灵敏度。 在其他实施例中, 偏置电路 23可以集成在微处理器 24内部。  As shown in FIG. 3B, the rest is the same as that of Embodiment 1, except that a bias circuit 23 is further provided between the output end of the antenna device 21 and the signal input port 24-1 of the microprocessor 24. The bias circuit 23 is composed of voltage-dividing resistors R1, R2 and a DC blocking capacitor C2. The function of the bias circuit 23 is to set the center point of the input signal near the threshold of the signal input port 24-1, thereby improving the circuit device 2. Receive sensitivity. In other embodiments, the bias circuit 23 may be integrated inside the microprocessor 24.
(实施例 3、 电子标签)  (Example 3, electronic tag)
见图 3C、 参见图 4, 其余与实施例 2相同, 不同之处在于: 微处理器 24还设有采 样信号输出端口 24-2,偏置电路 23的电阻 R2的一端由实施例 2中的接低电平改变为与 微处理器 24的采样信号输出端口 24-2相连、 而成为偏置电路的使能端。 这种设置使偏 置电路 23由实施例 2中的一直处于工作状态变为处于间隙工作(间隙时间可设置为 5-10 秒) 的状态, 从而降低了电子标签 100的功耗。 偏置电路 23可在由平时的接收微处理 器 24发送至其使能端的高电平信号变为接收低电平信号时, 由非工作状态变为工作状 态。  See FIG. 3C and FIG. 4, the rest are the same as those in the second embodiment, except that the microprocessor 24 is further provided with a sampling signal output port 24-2, and one end of the resistor R2 of the bias circuit 23 is provided by the second embodiment. It is connected to the low level to be connected to the sampling signal output port 24-2 of the microprocessor 24, and becomes an enable terminal of the bias circuit. This setting causes the bias circuit 23 to change from being always in the working state to being in the gap working state (the gap time can be set to 5-10 seconds) in the second embodiment, thereby reducing the power consumption of the electronic tag 100. The bias circuit 23 may change from a non-working state to a working state when the high-level signal sent to the enable terminal thereof by the usual receiving microprocessor 24 is changed to the receiving low-level signal.
(实施例 4、 电子标签)  (Example 4, electronic tag)
见图 3D, 其余与实施例 2相同, 不同之处在于: 用预放大电路 22代替了偏置电路 23, 其作用也是提高了接受灵敏度。 预放大电路 22为集成运算放大器或分立元件组成 的放大电路。 在其他实施例中, 预放大电路 22可以集成在微处理器 24内部。  As shown in FIG. 3D, the rest is the same as that of Embodiment 2, except that the preamplifier circuit 22 is used instead of the bias circuit 23, which also improves the receiving sensitivity. The preamplifier circuit 22 is an amplifier circuit composed of an integrated operational amplifier or discrete components. In other embodiments, the pre-amplification circuit 22 may be integrated inside the microprocessor 24.
(实施例 5、 电子标签)  (Example 5, electronic tag)
见图 3E并参见图 4, 其余与实施例 4相同, 不同之处在于: 微处理器 24还设有采 样信号输出端口 24-2。 该采样信号输出端口 24-2与预放大电路 22的使能端相连, 釆样 信号输出端口 24-2的作用是将微处理器 24发出的采样信号(可以是低电平、 高电平或 边沿触发信号,根据具体的放大电路的特性确定采样信号的类型)输出至预放大电路 22 的使能端而控制预放大电路 22是否处于工作状态, 从而降低了电子标签 100功耗。 (实施例 6至实施例 10、 电子标签) See FIG. 3E and FIG. 4, the rest is the same as the embodiment 4, except that the microprocessor 24 is further provided with a sampling signal output port 24-2. The sampling signal output port 24-2 is connected to the enable terminal of the pre-amplification circuit 22. The role of the sample signal output port 24-2 is to sample signals (which can be low, high or The edge trigger signal determines the type of the sampling signal according to the characteristics of the specific amplifier circuit) and outputs it to the enable end of the preamplifier circuit 22 to control whether the preamplifier circuit 22 is in a working state, thereby reducing the power consumption of the electronic tag 100. (Examples 6 to 10, electronic tags)
见图 3F至图 3L 图 3F所示的实施例 6的与实施例 1相对应, 图 3G所示的实施例 7与实施例 2相对应, 图 3H所示的实施例 8与实施例 3相对应, 图 31所示的实施例 9 与实施例 4相对应, 图 3J所示的实施例 10与实施例 5相对应; 实施例 6至实施例 10 的各实施例中的其余部分与对应的实施例相同, 不同之处在于: 电子标签 100还具有副 晶振电路 26, 微处理器 24还具有副晶振端 24-14, 副晶振电路 26与微处理器 24的副 晶振端 24-14相连。 副晶振电路 26中的副晶振通常为 32.768kHz。  3F to FIG. 3L to FIG. 3F. The embodiment 6 shown in FIG. 3F corresponds to the embodiment 1. The embodiment 7 shown in FIG. 3G corresponds to the embodiment 2. The embodiment 8 shown in FIG. 3H corresponds to the embodiment 3. Correspondingly, the embodiment 9 shown in FIG. 31 corresponds to the embodiment 4, and the embodiment 10 shown in FIG. 3J corresponds to the embodiment 5. The rest of the embodiments from the embodiment 6 to the embodiment 10 correspond to The embodiments are the same, except that the electronic tag 100 further includes a secondary crystal oscillator circuit 26, the microprocessor 24 also has a secondary crystal oscillator terminal 24-14, and the secondary crystal circuit 26 is connected to the secondary crystal oscillator terminals 24-14 of the microprocessor 24. The sub crystal in the sub crystal circuit 26 is usually 32.768 kHz.
见图 4, 实施例 8及实施例 10中微处理器 24采用图 4所示结构的微处理器。 微处 理器 24的内部时钟发生器 24-10同时可由副晶振电路 26中的副晶振 (通常为 32.768kHz) 驱动, 这样, 节电性能得到了提高。 原因是: 微处理器 24可以工作在两种时钟频率下, 其中的副晶振一直处于工作状态, 主晶振只有在接收和处理有效信号时才处于工作状 态。 当主晶振工作时, 因主晶振产生高频时钟信号而使微处理器 24具有较高的处理速 度, 可用于复杂的数据处理, 但功耗也较大。 而在不接收信号时, 常常只有副晶振单独 提供低频时钟信号,主晶振不工作,此时的微处理器 24处理速度较低,通常只进行 LCD 液晶显示屏 3的驱动、信号采样等工作, 这样的情况占有电子标签 100整个使用过程的 绝大多数时间, 使得低功耗得以实现。  As shown in FIG. 4, the microprocessor 24 in the eighth embodiment and the tenth embodiment adopts a microprocessor having the structure shown in FIG. The internal clock generator 24-10 of the microprocessor 24 can be driven by the sub crystal (usually 32.768 kHz) in the sub crystal circuit 26 at the same time, so that the power saving performance is improved. The reason is: the microprocessor 24 can work at two clock frequencies, where the secondary crystal is always in the working state, and the main crystal is only in the working state when receiving and processing valid signals. When the main crystal oscillator operates, the microprocessor 24 has a higher processing speed because the main crystal oscillator generates a high-frequency clock signal, which can be used for complex data processing, but the power consumption is also large. When not receiving a signal, often only the secondary crystal provides a low-frequency clock signal, and the main crystal does not work. At this time, the microprocessor 24 has a low processing speed, and usually only performs the driving and signal sampling of the LCD liquid crystal display 3. Such a situation occupies most of the entire use process of the electronic tag 100, so that low power consumption can be realized.
(实施例 11、 电子货架标签系统)  (Example 11, electronic shelf label system)
见图 5及图 6, 本实施例的电子货架标签系统具有主控制器 5和多个电子标签 100。 主控制器 5具有计算机 51、 激发器 52和环形天线 53。 激发器 52具有通讯接口 52— 1、 编码器 52— 2、调制器 52-3、驱动器 52-4、谐振电容 52-5、信号发生器 52-6和电源 52-7。 激发器 52通过其通讯接口 52-1与计算机 51相连。激发器 52由其驱动器 52-4和谐振电 容 52-5与环形天线 53相连; 激发器 52具有将计算机 51传送过来的信息经编码、 调制 后驱动环形天线 53发送到空间的功能。环形天线 53是由导线可以在釆用本发明的系统 的商场天花板上或墙壁上围绕而构成。主控制器 5发送出来的无线电信号绝大部分将集 中在环形天线 53所围绕的商场范围内。将上述实施例 8或实施例 10所得的电子标签 100 (在其他实施例中也可以是实施例 1至 7以及实施例 9所得的电子标签)放置在环形天 线 53所围绕的范围内, 在此范围内的电子标签 100就可以接收到主控制器 5发送出来 的信息, 并将特定的信息——商品价格等——显示出来。对于电子标签 100中的偏置电 路 23的电阻 R1和电阻 R2的阻值的选取方法是, 当偏置电路 23的使能端接低电平时, 使调制信号的中心点的电平值处于微处理器 24的信号输入端口 24-1的阈值附近。  As shown in FIGS. 5 and 6, the electronic shelf label system of this embodiment includes a main controller 5 and a plurality of electronic labels 100. The main controller 5 includes a computer 51, an exciter 52, and a loop antenna 53. The exciter 52 has a communication interface 52-1, an encoder 52-2, a modulator 52-3, a driver 52-4, a resonance capacitor 52-5, a signal generator 52-6, and a power supply 52-7. The exciter 52 is connected to the computer 51 through its communication interface 52-1. The exciter 52 is connected to the loop antenna 53 by its driver 52-4 and a resonance capacitor 52-5; the exciter 52 has a function of encoding and modulating the information transmitted by the computer 51 to drive the loop antenna 53 and send it to space. The loop antenna 53 is constituted by a wire that can be surrounded on the ceiling or wall of a shopping mall using the system of the present invention. Most of the radio signals sent from the main controller 5 will be concentrated in the range of the shopping mall surrounded by the loop antenna 53. The electronic tag 100 obtained in the foregoing Embodiment 8 or Embodiment 10 (the electronic tags obtained in Embodiments 1 to 7 and Embodiment 9 may also be used in other embodiments) are placed in the range surrounded by the loop antenna 53. Here, The electronic tag 100 within the range can receive the information sent by the main controller 5, and display specific information-commodity prices, etc.-. For selecting the resistance values of the resistors R1 and R2 of the bias circuit 23 in the electronic tag 100, when the enable terminal of the bias circuit 23 is connected to a low level, the level value of the center point of the modulation signal is at a micro level. The signal input of the processor 24 is near the threshold of the port 24-1.
计算机 51通常是商场用来管理收款机、 扫描仪等设备的, 它将代表商品信息的数 据帧信号传送给激发器 52。 通讯接口 52-1在本实施例中釆用有线的串行接口 RS232C 接口 (在其他实施例中可以采用以太网接口或无线收发端口等)。 The computer 51 is usually used by shopping malls to manage cash registers, scanners and other equipment. It will represent the number of product information The frame signal is transmitted to the exciter 52. The communication interface 52-1 uses a wired serial interface RS232C interface in this embodiment (in other embodiments, an Ethernet interface or a wireless transceiver port can be used).
激发器 52中的信号发生器 52-6发出低频电磁波载波信号的频率 f(以下称之为系统 工作频率 f)在本实施例中为 40kHz, 在其他实施例中系统工作频率 f可以在 4kHz到 200kHz的范围内选择。 见图 7, 经通讯接口 52-1接收到的由计算机 51发出的由图 7A 示意的数据帧通常包含了电子标签 100的地址码 ID、 商品价格、 显示模式指令、 工作 状态指令和校验码等。经编码器 52-2按照一定的规则编码成图 7B示意的基带信号, 基 带信号通常有起始位和数据位两部分; 基带信号是由高电平 H和低电平 L交替组成的, 每一段高电平 H或低电平 L持续的时间在这里称为码元长度 62,为了可靠调制和解调, 每一个码元长度 62都不能太小, 通常要大于 30/f (f指的是系统的工作频率)。 调制器 52-3将基带信号调制在信号发生器 52-6发出的正弦波信号上,形成图 7C示意的调制信 号, 然后经驱动器 52-4将信号的功率放大。驱动器 52-4驱动由与谐振电容 52-5串联谐 振的环形天线 53将调制信号的电磁波发送到商场空间。 这里的谐振电容 52-5与具有电 感特性的环形天线 53串联谐振, 使得环形天线 53上的电流得到加强, 而可将调制信号 的电磁波能量充分发送出去。环形天线 53与电子标签 100的天线装置 21的天线 L在空 间相耦合。  The frequency f (hereinafter referred to as the system operating frequency f) of the low-frequency electromagnetic wave carrier signal emitted by the signal generator 52-6 in the exciter 52 is 40 kHz in this embodiment, and the system operating frequency f may be between 4 kHz and Select within a 200kHz range. As shown in FIG. 7, the data frame shown in FIG. 7A received by the computer 51 and received via the communication interface 52-1 usually includes the address code ID of the electronic tag 100, the commodity price, the display mode instruction, the work status instruction, and the check code. Wait. The encoder 52-2 encodes the baseband signal as shown in FIG. 7B according to a certain rule. The baseband signal usually has two parts, a start bit and a data bit. The baseband signal is composed of high-level H and low-level L alternately. The duration of a high-level H or low-level L is referred to herein as the symbol length 62. In order to reliably modulate and demodulate, each symbol length 62 cannot be too small, usually greater than 30 / f (f refers to Is the operating frequency of the system). The modulator 52-3 modulates the baseband signal on the sine wave signal sent from the signal generator 52-6 to form a modulation signal as shown in FIG. 7C, and then amplifies the power of the signal through the driver 52-4. The driver 52-4 drives the loop antenna 53 which is resonant in series with the resonance capacitor 52-5 to transmit the electromagnetic wave of the modulated signal to the shopping mall space. Here, the resonance capacitor 52-5 is in series resonance with the loop antenna 53 having an inductive characteristic, so that the current on the loop antenna 53 is strengthened, and the electromagnetic wave energy of the modulated signal can be fully transmitted. The loop antenna 53 and the antenna L of the antenna device 21 of the electronic tag 100 are coupled in space.
激发器 52中的调制器 52-3的调制方式是数字调制, 本实施例中采用常规的相移键 控 PSK的调制方式 (在其他实施例中也可釆用常规的三种数字调制方式中的频移键控 FSK或振幅键控 AS 调制方式, 或者是采用三种常规数字调制方式的组合或任意两种 的组合)。 见图 7B和图 7C, 对于基带信号来说, 在信号节点 61处, 基带信号电平发生 了改变, 调制器 52-3调制时就在信号节点 61处改变正弦波 (载波信号) 的波形参数, 使其相位发生翻转。而电子标签 100的徼处理器 24 (有些地方也叫做单片机,参见图 4) 通过信号输入端口 24-1将图 8A示意的调制信号转换成了图 8B示意的脉冲信号后, 输 入到内部总线 24-11上。 因为微处理器 24用程序分析脉冲信号时, 只能对脉冲信号的 与时间有关的参数做出判决,所以图 8B示意的脉冲信号在信号节点 61处的时间参数有 明显的变化, 使得解调得以实现。  The modulation method of the modulator 52-3 in the exciter 52 is digital modulation. In this embodiment, a conventional phase shift keying PSK modulation method is used (in other embodiments, the three conventional digital modulation methods can also be used. Frequency-shift-keyed FSK or amplitude-keyed AS modulation, or a combination of three conventional digital modulation methods or a combination of any two). See FIG. 7B and FIG. 7C. For a baseband signal, at the signal node 61, the baseband signal level is changed. When the modulator 52-3 modulates, the waveform parameters of the sine wave (carrier signal) are changed at the signal node 61. To reverse its phase. The 电子 processor 24 of the electronic tag 100 (also referred to as a single-chip microcomputer in some places, see FIG. 4) converts the modulation signal shown in FIG. 8A into a pulse signal shown in FIG. 8B through the signal input port 24-1, and then inputs it to the internal bus 24 -11 on. Because the microprocessor 24 can analyze the pulse signal with a program, it can only make a decision on the time-related parameters of the pulse signal, so the time parameter of the pulse signal at the signal node 61 shown in FIG. 8B has a significant change, which makes the demodulation Made it happen.
见图 11及图 4, 本实施例中的电子标签 100的工作过程由图 11的程序框图给出: 歩骤 71 :给电子标签 100的各有关部分施加工作电源 4,包括微处理器 24在内的器 件上电, 微处理器 24被复位。  See FIG. 11 and FIG. 4. The working process of the electronic tag 100 in this embodiment is given by the flowchart of FIG. 11: Step 71: Apply working power 4 to each relevant part of the electronic tag 100, including the microprocessor 24 in The internal components are powered on and the microprocessor 24 is reset.
歩骤 72: 由微处理器 24启动主晶振电路 25和副晶振电路 26,然后进行程序初始化 设置。 步骤 73 : 停止主晶振电路 25, 微处理器 24进入节电状态。 Step 72: The main crystal oscillator circuit 25 and the sub crystal oscillator circuit 26 are started by the microprocessor 24, and then program initialization is performed. Step 73: Stop the main crystal oscillator circuit 25, and the microprocessor 24 enters a power saving state.
步骤 74:微处理器 24的采样信号输出端口 24-2输出高电平,启动第一定时器 24-6, 定时长度可设定为 5秒左右, 第一定时器 24-6定时时间到则采样信号输出端口 24-2输 出低电平到偏置电路 23的使能端,使得偏置电路 23的输出端的电平在无信号输入时处 在微处理器 24的信号输入端口 24-1的阈值附近, 有信号输入时信号的中心点处在微处 理器 24的信号输入端口 24-1的阈值附近。  Step 74: The sampling signal output port 24-2 of the microprocessor 24 outputs a high level, and the first timer 24-6 is started. The timing length can be set to about 5 seconds, and the timing of the first timer 24-6 is reached. The sampling signal output port 24-2 outputs a low level to the enable terminal of the bias circuit 23, so that the level of the output terminal of the bias circuit 23 is at the signal input port 24-1 of the microprocessor 24 when there is no signal input. Near the threshold, when a signal is input, the center point of the signal is near the threshold of the signal input port 24-1 of the microprocessor 24.
步骤 75: 侦测在信号输入端口 24-1是否有可能与调制信号有关的信号输入。 其方 法是: 启动第二定时器 24-7, 定时长度须大于码元长度 62的最大值, 比较合适的定时 长度是码元长度 62的最大值的 3倍左右;在此定时长度内,反复读取信号输入端口 24-1 的值(0或 1 ) 并判断有无变化, 若有变化则视为信号输入端口 24-1有信号输入, 若无 变化则视为信号输入端口 24-1无信号输入。 信号输入端口 24-1无信号输入则跳转到步 骤 74; 信号输入端口 24-1有信号输入则进入步骤 76。  Step 75: Detect whether there is a signal input that may be related to the modulation signal at the signal input port 24-1. The method is: start the second timer 24-7, the timing length must be greater than the maximum value of the symbol length 62, a more appropriate timing length is about three times the maximum value of the symbol length 62; within this timing length, repeatedly Read the value (0 or 1) of the signal input port 24-1 and determine whether there is a change. If there is a change, it is regarded as a signal input on the signal input port 24-1. If there is no change, it is regarded as a signal input port 24-1. signal input. If there is no signal input at signal input port 24-1, go to step 74; if there is signal input at signal input port 24-1, go to step 76.
步骤 76: 此时采样阶段已经结束, 进入到了信号处理阶段, 微处理器 24启动主晶 振电路 25, 微处理器 24进入高速运行状态。  Step 76: At this time, the sampling phase has ended and the signal processing phase is entered. The microprocessor 24 starts the main crystal circuit 25, and the microprocessor 24 enters a high-speed operation state.
歩骤 77: 侦测由信号输入端口 24-1输入的信号是否有信号节点 61。 因为微处理器 24只能分辨出明显的与时间相关的参数变化, 这些参数包括频率、周期和脉冲宽度。 比 较合适的测量参数是周期。 这里为了方便说明, 将图 8B中任意两个相邻脉冲波形的周 期定义为 T1和 T2。 将相邻两个脉冲的周期 Tl、 Τ2作比较, 当 I T1-T2 |大于某个值 △Τ时, 则认为出现了信号节点 61, 否则认为无信号节点 61。 ΔΤ的选择与调制方式、 系统频率 f、 信号强度、 使用环境、 电子标签 100各部分元器件参数等有关, 本实施例 的 ΔΤ选择为 l/4f。实际情况下的信号节点 61处的调制信号处在一个过渡过程,波形发 生不规则畸变, 脉冲信号的参数变化也很复杂, 这样的变化过程会持续若干个周期, 所 以做一次简单的判断实际上会产生比较高的误码率,这时需要若干次比较 T1与 T2之间 的变化量, 并将其绝对值累加后得到的和与 ΔΤ进行比较, 若累加值大于 ΔΤ则判断出 现了信号节点 61 , 否则认为无信号节点 61, 以确保系统较低的误码率。 本实施例同时 采用上述两种是否出现信号节点的判断条件, 只要有一种条件得到满足, 则认为出现了 信号节点 61, 从而转入下一步骤 78-2, 否则转入歩骤 78-1。 由图 8B可知, 脉冲信号在 图中所示的第二个 T2处出现了信号节点 61。  Step 77: Detect whether the signal input from the signal input port 24-1 has a signal node 61. Because the microprocessor 24 can only discern significant time-related parameter changes, these parameters include frequency, period, and pulse width. A more suitable measurement parameter is the period. For convenience, the periods of any two adjacent pulse waveforms in FIG. 8B are defined as T1 and T2. Comparing the periods T1 and T2 of two adjacent pulses, when I T1-T2 | is greater than a certain value △ T, it is considered that a signal node 61 has occurred, otherwise it is considered that there is no signal node 61. The selection of ΔΤ is related to the modulation method, system frequency f, signal strength, use environment, and component parameters of each part of the electronic tag 100. The ΔΤ selection in this embodiment is 1 / 4f. In the actual situation, the modulation signal at signal node 61 is in a transition process, the waveform is irregularly distorted, and the parameters of the pulse signal are also complicated. Such a change process will last for several cycles, so a simple judgment is actually made A relatively high bit error rate will be generated. At this time, it is necessary to compare the change between T1 and T2 several times, and compare the sum of the absolute values with ΔΤ. If the accumulated value is greater than ΔΤ, it is judged that a signal node appears. 61, otherwise it is considered that there is no signal node 61 to ensure a lower bit error rate of the system. In this embodiment, the above two conditions for judging whether a signal node appears are used at the same time. As long as one of the conditions is satisfied, the signal node 61 is considered to be present, and the process proceeds to the next step 78-2, otherwise, the process proceeds to step 78-1. It can be known from FIG. 8B that the pulse signal has a signal node 61 at the second T2 shown in the figure.
第一定时器 24-6可在脉冲信号的上升沿或下降沿重新启动,同时把前一次获得的计 时数据 T1或 T2存入数据存储器 24-9的相应地址的单元中, 以便与下一次获得的计时 数据相比较。 将信号输入端口 24-1 设定为一个边沿触发的外部信号中断源, 则脉冲信 号的上升沿或下降沿可通过中断处理捕获。 The first timer 24-6 can be restarted on the rising or falling edge of the pulse signal, and at the same time, the previously obtained timing data T1 or T2 is stored in the corresponding address unit of the data memory 24-9, so that Compare the timing data. Set the signal input port 24-1 as an edge-triggered external signal interrupt source. The rising or falling edge of the number can be captured by interrupt processing.
步骤 78-1 : 按与步骤 75中相同的方法侦测在信号输入端口 24-1是否有可能与调制 信号有关的信号输入。 若有则程序转入步骤 77, 若无则程序转入步骤 73。  Step 78-1: In the same way as in step 75, detect whether there is a signal input that may be related to the modulation signal at the signal input port 24-1. If yes, the program proceeds to step 77; if not, the program proceeds to step 73.
步骤 78-2: 如果步骤 78-2是第一次执行则启动第二定时器 24-7, 如果歩骤 78-2不 是第一次执行则将第二定时器 24-7的计时长度依次存入数据存储器 24-9中的相应单元 组 RAMn (n为正整数), 这个计时长度约等于相应的码元长度 62。 第二定时器 24-9重 新启动。  Step 78-2: If step 78-2 is performed for the first time, start the second timer 24-7. If step 78-2 is not performed for the first time, store the length of the second timer 24-7 in sequence. The corresponding cell group RAMn (n is a positive integer) in the data memory 24-9, and this timing length is approximately equal to the corresponding symbol length 62. The second timer 24-9 restarts.
步骤 79: 循环多次执行步骤 77和步骤 78— 2后, 数据存储器 RAM中的 RAMI、 RAM2、 RAM3、 〜RAMn多组 RAM单元已经存放了图 7E示意的代表码元长度 62的 数据, 而形成可称为虚拟基带信号的一系列数据, 在得到完整的一帧数据后, 即可进行 解码。 解码过程是一个遵循与编码器 52-2 同样规则的逆过程, 执行解码程序即可获得 与图 7A所示的发送数据帧完全一样的图 7F所示的接收数据帧并将其存入数据存储器 24-9的相应单元内。  Step 79: After performing step 77 and step 78-2 in a loop multiple times, the RAMI, RAM2, RAM3, and ~ RAMn groups of RAM in the data memory RAM have already stored data representing the symbol length 62 shown in FIG. 7E to form A series of data, which can be called a virtual baseband signal, can be decoded after a complete frame of data is obtained. The decoding process is a reverse process that follows the same rules as the encoder 52-2. After executing the decoding program, the received data frame shown in FIG. 7F is exactly the same as the transmitted data frame shown in FIG. 7A and stored in the data memory. 24-9 corresponding units.
歩骤 80: 如果已经接收到了一个完整的接收数据帧, 就可以将接收数据帧中包含的 地址码 ID、商品价格、显示模式指令、工作状态指令和校验码等作分析处理,控制 LCD 液晶显示屏 3的显示状态和显示内容以及控制微处理器 24的工作状态。 紧接着返回到 步骤 77, 循环运行程序。  Step 80: If a complete received data frame has been received, the address code ID, commodity price, display mode instruction, working status instruction, and check code included in the received data frame can be analyzed and processed to control the LCD liquid crystal. The display state and content of the display screen 3 and the operating state of the control microprocessor 24. Immediately return to step 77 to run the program cyclically.
对于步骤 78-2、 79、 80的执行时间有一定的要求, 要求步骤 80执行完以后不能耽 误步骤 77对下一个信号节点 61的侦测; 否则, 如果考虑到成本和功耗, 那么微处理器 24的运行速度确实不能够很快, 就需要将步骤 77作为中断处理程序来处理, 即在歩骤 78-2、 79、 80的过程中也在判决信号节点 61的存在与否, 这时需要注意的是, 有可能 在一个信号节点 61处被误侦测为多个信号节点 61, 这时需要在每一次侦测到信号节点 61时重新设置并启动第一定时器 24-6, 定时长度可设定为最小码元长度 62的一半左右 较为合适, 只有第一定时器 24-6定时时间到了以后, 才继续侦测下一个信号节点 61。  There are certain requirements for the execution time of steps 78-2, 79, and 80. It is required that after the execution of step 80, the detection of the next signal node 61 in step 77 cannot be delayed; otherwise, if cost and power consumption are considered, micro processing The operating speed of the router 24 is indeed not fast. Therefore, it is necessary to process step 77 as an interrupt handler, that is, in the process of steps 78-2, 79, and 80, it is also determined whether the signal node 61 exists or not. It should be noted that it may be detected as multiple signal nodes 61 at one signal node 61. In this case, it is necessary to reset and start the first timer 24-6 every time the signal node 61 is detected. The length can be set to about half of the minimum symbol length 62. It is only after the timing of the first timer 24-6 that the next signal node 61 is detected.
在其他实施例中, 若电子标签 100不具有副晶振电路 26, 则省略上述程序中的步骤 73和步骤 76。若电子标签 100的微处理器 24不设置釆样信号输出端口 24-2, 则省略上 述程序中的步骤 74。 若既无副晶振电路 26, 微处理器 24也不设置采样信号输出端口 24-2, 则省略上述程序中的步骤 73、 74、 76和步骤 78-1 ; 当程序运行到步骤 77时, 若 无信号接点 61则运行歩骤 75。 若电子标签 100不设置偏置电路 23, 则省略上述程序中 的步骤 74, 且信号中心点低于信号输入端口 24-1的阈值, 从而要求接收的调制信号的 幅度较大。 (实施例 12、 电子货架标签系统) In other embodiments, if the electronic tag 100 does not have the sub crystal oscillator circuit 26, step 73 and step 76 in the above procedure are omitted. If the microprocessor 24 of the electronic tag 100 is not provided with the sample signal output port 24-2, step 74 in the above procedure is omitted. If neither the secondary crystal circuit 26 nor the microprocessor 24 is provided with the sampling signal output port 24-2, steps 73, 74, 76 and 78-1 in the above-mentioned program are omitted; when the program runs to step 77, The non-signal contact 61 runs step 75. If the electronic tag 100 is not provided with the bias circuit 23, step 74 in the above procedure is omitted, and the signal center point is lower than the threshold of the signal input port 24-1, so that the amplitude of the received modulation signal is required to be large. (Example 12, electronic shelf label system)
其余与实施例 11相同,不同之处在于: 激发器 52中的调制器 52-3的调制方式是采 用常规的频移键控 FS 的调制方式, 图 9为在 FSK方式下电子标签 100接收调制信号 时相应于图 7C的调制信号和图 7D的脉冲信号中信号节点处的波形示意图。 其中, 图 9A表示进入微处理器 24信号输入端口 24-1的调制信号; 图 9B表示进入微处理器内部 总线 24-11上的脉冲信号。由图 9B可知, 脉冲信号在图中所示的第二个 T1处出现了信 号节点 61。 FSK调制信号有两个频率量 fl=f-Af和 G=f+Af; Af/f太大则天线不容易 调谐, 太小则解调难度大, 比较适合的是约为 8%左右。 '  The rest is the same as the embodiment 11, except that the modulation method of the modulator 52-3 in the exciter 52 is a conventional frequency shift keying FS modulation method. FIG. 9 shows the electronic tag 100 receiving modulation in the FSK mode. The signal time corresponds to the waveform diagram at the signal node in the modulated signal of FIG. 7C and the pulse signal of FIG. 7D. Among them, Fig. 9A shows the modulation signal entering the microprocessor's 24 signal input port 24-1; Fig. 9B shows the pulse signal entering the microprocessor's internal bus 24-11. It can be known from FIG. 9B that the pulse signal has a signal node 61 at the second T1 shown in the figure. The FSK modulation signal has two frequency quantities fl = f-Af and G = f + Af; if Af / f is too large, the antenna is not easy to tune, and if it is too small, it is difficult to demodulate. It is more suitable for about 8%. '
(实施例 13、 电子货架标签系统)  (Example 13: Electronic shelf label system)
其余与实施例 11相同, 不同之处在于: 激发器 52中的调制器 52-3的调制方式是采 用常规的振幅键控 ASK的调制方式, 图 10为在 ASK方式下电子标签 100接收调制信 号时相应于图 7C的调制信号和图 7D的脉冲信号中信号节点处的波形示意图。 其中, 图 10A1和图 10B1分别表示在信号节点 61处信号振幅突然变小很短一段时间, 然后振 幅又迅速恢复的情形下所产生的调制信号和脉冲信号。 由图 10B1可知, 脉冲信号在图 中所示的第二个 T2处出现了信号节点 61。  The rest is the same as the embodiment 11, except that the modulation method of the modulator 52-3 in the exciter 52 is a conventional amplitude-keyed ASK modulation method. FIG. 10 shows the electronic tag 100 receiving the modulation signal in the ASK mode. This time corresponds to the waveform diagram at the signal node in the modulation signal of FIG. 7C and the pulse signal of FIG. 7D. Among them, FIG. 10A1 and FIG. 10B1 respectively show a modulation signal and a pulse signal generated when the signal amplitude suddenly decreases for a short period of time at the signal node 61, and then the amplitude recovers rapidly. It can be seen from FIG. 10B1 that the pulse signal has a signal node 61 at the second T2 shown in the figure.
(实施例 14、 电子货架标签系统)  (Example 14: Electronic shelf label system)
其余与实施例 13相同, 不同之处在于: 图 10A2和图 10B2分别表示在信号节点处 信号振幅突然变大很短一段时间,然后振幅又迅速恢复的情形下所产生的调制信号和脉 冲信号。 由图 10B2可知, 脉冲信号在图中所示的第一个 T2处出现了信号节点 61。  The rest is the same as Embodiment 13, except that FIG. 10A2 and FIG. 10B2 respectively show the modulation signal and the pulse signal generated when the signal amplitude suddenly increases for a short period of time at the signal node, and then the amplitude recovers rapidly. It can be seen from FIG. 10B2 that the pulse signal has a signal node 61 at the first T2 shown in the figure.
(实施例 15、 电子货架标签系统)  (Example 15: Electronic shelf label system)
其余与实施例 13相同, 不同之处在于: 图 10A3和图 10B3分别表示在信号节点处 信号振幅突然变小并持续到下一个信号节点处才恢复的情形下所产生的调制信号和脉 冲信号。 由图 10B3可知, 脉冲信号在图中所示的第二个 T2起始处出现了信号节点 61。  The rest is the same as Embodiment 13, except that FIG. 10A3 and FIG. 10B3 respectively show the modulation signal and pulse signal generated when the signal amplitude suddenly decreases at the signal node and continues to be recovered at the next signal node. It can be known from FIG. 10B3 that the pulse signal has a signal node 61 at the beginning of the second T2 shown in the figure.
实施例 13至实施例 15中, 对于电子标签 100中的偏置电路 23的电阻 R1和电阻 R2的阻值的选取方法是, 当偏置电路 23的使能端接低电平时, 使调制信号的中心点的 电平值偏离微处理器 24的信号输入端口 24-1的阈值约 1/3 (上下偏移均可)。  In the thirteenth embodiment to the fifteenth embodiment, the method for selecting the resistance values of the resistors R1 and R2 of the bias circuit 23 in the electronic tag 100 is to enable the modulation signal when the enable terminal of the bias circuit 23 is connected to a low level. The level value of the center point is deviated from the threshold of the signal input port 24-1 of the microprocessor 24 by about 1/3 (both up and down shifts are possible).

Claims

权利要求  Rights request
I 一种电子标签, 具有外壳 (1)、 电路装置 (2)和显示屏 (3), 电路装置 (2) 设置在外壳(1) 中, 显示屏 (3)设置在外壳 (1)上且位于外壳 (1) 的显示窗口处; 电路装置(2)具有天线装置(21)、微处理器(24)、 主晶振电路(25)和直流电源端; 微处理器 (24) 设有电源端、 主晶振端 (24-13)、 显示输出端 (24-15) 和信号输入端 口(24-1);微处理器(24)的电源端与电路装置(2)的直流电源端共线;微处理器(24) 的主晶振端(24-13)与主晶振电路(25)相连; 微处理器(24) 的显示输出端(24-15) 与显示屏 (3) 相连或通过驱动电路与显示屏 (3)相连; 其特征在于: 天线装置 (21) 的输出端与微处理器(24)的信号输入端口 (24-1)相连; 微处理器(24)是具有通过 软件程序处理经数字调制的低频无线电波信号功能的微处理器, 其可处理的低频信号 频率在 4kHz至 200kHz之间。 I An electronic label having a casing (1), a circuit device (2), and a display screen (3), the circuit device (2) is disposed in the casing (1), and the display screen (3) is disposed on the casing (1) and It is located at the display window of the casing (1); the circuit device (2) has an antenna device (21), a microprocessor (24), a main crystal circuit (25) and a DC power supply terminal; the microprocessor (24) is provided with a power supply terminal The main crystal terminal (24-13), the display output terminal (24-15) and the signal input port (24-1); the power supply terminal of the microprocessor (24) and the DC power supply terminal of the circuit device (2) are in line; The main crystal terminal (24-13) of the microprocessor (24) is connected to the main crystal circuit (25); the display output terminal (24-15) of the microprocessor (24) is connected to the display screen (3) or through the driving circuit It is connected to the display screen (3); It is characterized in that: the output end of the antenna device (21) is connected to the signal input port (24-1) of the microprocessor (24); the microprocessor (24) is processed by a software program Microprocessor with digitally modulated low-frequency radio wave signal function, which can process low-frequency signals from 4kHz to 2 00kHz.
2、 根据权利要求 1所述的电子标签, 其特征在于: 微处理器 (24) 的信号输入端 口 (24-1) 是具有信号放大功能的端口。  2. The electronic label according to claim 1, characterized in that: the signal input port (24-1) of the microprocessor (24) is a port having a signal amplification function.
3、 根据权利要求 1所述的电子标签, 其特征在于: 电路装置(2)还具有预放大电 路 (22); 预放大电路(22) 设置在天线装置 (21) 的输出端与微处理器 (24) 的信号 输入端口 (24-1) 之间。  3. The electronic label according to claim 1, characterized in that: the circuit device (2) further comprises a pre-amplification circuit (22); the pre-amplification circuit (22) is provided at the output end of the antenna device (21) and the microprocessor (24) between the signal input ports (24-1).
4、根据权利要求 3所述的电子标签, 其特征在于: 电路装置(2)的微处理器(24) 还设有采样信号输出端口 (24-2); 釆样信号输出端口 (24-2) 与预放大电路 (22) 的 使能端相连。  4. The electronic label according to claim 3, characterized in that: the microprocessor (24) of the circuit device (2) is further provided with a sampling signal output port (24-2); a sample signal output port (24-2) ) Connect to the enable terminal of the preamplifier circuit (22).
5、 根据权利要求 1所述的电子标签, 其特征在于: 电路装置(3)还具有偏置电路 (23), 偏置电路 (23)设置在天线装置 (21) 的输出端与微处理器 (24) 的信号输入 端口 (24-1) 之间。  5. The electronic tag according to claim 1, characterized in that: the circuit device (3) further comprises a bias circuit (23), the bias circuit (23) is provided at an output end of the antenna device (21) and a microprocessor (24) between the signal input ports (24-1).
6、根据权利要求 5所述的电子标签,其特征在于: 电路装置(2)的微处理器(24) 还设有采样信号输出端口 (24-2); 采样信号输出端口 (24-2) 与偏置电路 (22) 的使 能端相连。  6. The electronic tag according to claim 5, characterized in that: the microprocessor (24) of the circuit device (2) is further provided with a sampling signal output port (24-2); a sampling signal output port (24-2) Connect to the enable terminal of the bias circuit (22).
7、 根据权利要求 1所述的电子标签, 其特征在于: 电路装置(2)还具有副晶振电 路(26), 微处理器(24)还具有副晶振端(24-14), 副晶振电路(26)与微处理器(24) 的副晶振端 (24-14)相连; 副晶振电路(26) 的振荡频率在 20kHz至 100kHz之间, 主晶振电路(25) 的振荡频率在 400kHz至 40MHz之间。 7. The electronic tag according to claim 1, characterized in that: the circuit device (2) further includes a secondary crystal circuit (26), and the microprocessor (24) further includes a secondary crystal terminal (24-14), and a secondary crystal circuit (26) is connected to the auxiliary crystal terminal (24-14) of the microprocessor (24); the oscillation frequency of the auxiliary crystal circuit (26) is between 20kHz and 100kHz, The oscillation frequency of the main crystal circuit (25) is between 400kHz and 40MHz.
8、 根据权利要求 1至 7之一所述的电子标签, 其特征在于: 本标签还具有直流电 源 (4), 直流电源 (4) 的输出端与电路装置 (2) 的电源端相连。  8. The electronic label according to any one of claims 1 to 7, characterized in that: the label further comprises a DC power source (4), and an output terminal of the DC power source (4) is connected to a power terminal of the circuit device (2).
9、根据权利要求 1所述的电子标签,其特征在于: 电路装置(2)的微处理器(24) 通过软件程序处理经数字调制的低频无线电波信号的过程是: ①根据信号输入端口 9. The electronic tag according to claim 1, characterized in that the process of processing the digitally modulated low-frequency radio wave signal by a microprocessor (24) of the circuit device (2) through a software program is: ① according to the signal input port
(24-1)的电平变化来判断有无信号输入;②通过比较信号波形的时间参数的变化来判 断有无信号节点 (61); ③测算出相邻的信号节点 (61) 之间的码元长度 (62), 并存 入数据存储器(24-9) 中, 这一系列码元长度(62)的集合形成了代表基带信号的数据 列, 从而实现了软件解调功能; ④将基带信号解码成实际的数据帧, 完成了软件解码 过程; ⑤将接收到的数据分析处理, 然后控制微处理器 (24) 的工作状态, 并将有关 信息通过显示屏 (3) 显示出来。 (24-1) to determine the presence or absence of signal input; ② to determine the presence or absence of a signal node (61) by comparing the change in the time parameter of the signal waveform; ③ to measure the difference between adjacent signal nodes (61) The symbol length (62) is stored in the data memory (24-9). The collection of this series of symbol lengths (62) forms a data column representing the baseband signal, thereby realizing the software demodulation function; The signal is decoded into an actual data frame, which completes the software decoding process. ⑤ Analyze and process the received data, then control the working state of the microprocessor (24), and display the relevant information through the display screen (3).
10、一种电子货架标签系统, 具有主控制器(5)和多个电子标签(100); 主控制器(5) 具有计算机(51)、激发器(52)和环形天线(53);激发器(52)通过其通讯接口(52-1) 与计算机(51)相连; 激发器(52) 由其驱动器(52-4)和谐振电容(52-5)与环形天 线 (53) 相连; 激发器 (52) 具有将计算机(51) 传送过来的信息经编码、 调制后驱 动环形天线 (53) 发送到空间的功能; 电子标签(100)放置在环形天线 (53) 所围绕 的范围内, 可以接收到主控制器(5) 发送出来的信息, 并将特定的信息显示出来; 电 子标签 (100)具有外壳(1)、 电路装置 (2) 和显示屏 (3), 电路装置 (2)设置在外 壳 (1) 中, 显示屏 (3) 设置在外壳 (1)上且位于外壳 (1) 的显示窗口处; 电路装 置 (2) 具有天线装置 (21)、 微处理器 (24)、 主晶振电路(25)和直流电源端; 微处 理器(24)设有电源端、主晶振端(24-13)、显示输出端(24-15)和信号输入端口(24-1); 微处理器(24) 的电源端与电路装置 (2) 的直流电源端共线; 微处理器 (24) 的主晶 搌端(24-13)与主晶振电路(25)相连; 微处理器(24) 的显示输出端(24-15) 与显 示屏 (3) 相连或通过驱动电路与显示屏 (3) 相连; 其特征在于: 天线装置 (21) 的 输出端与微处理器(24) 的信号输入端口 (24-1)相连; 微处理器(24)是具有通过软 件程序处理经数字调制的低频无线电波信号功能的微处理器, 其可处理的低频信号频 率在 4kHz至 200kHz之间; 微处理器(24)通过软件程序处理低频无线电波信号的过 程是: ①根据信号输入端口 (24-1)的电平变化来判断有无信号输入; ②通过比较信号 波形的时间参数的变化来判断有无信号节点 (61); ③测算出相邻的信号节点 (61) 之 间的码元长度 (62), 并存入数据存储器 (24-9) 中, 这一系列码元长度 (62) 的集合 形成了代表基带信号的数据列, 从而实现了软件解调功能; ④将基带信号解码成实际 的数据帧,完成了软件解码过程;⑤将接收到的数据分析处理,然后控制微处理器(24) 的工作状态, 并将有关信息通过显示屏 (3 ) 显示出来。 10. An electronic shelf label system having a main controller (5) and a plurality of electronic tags (100); the main controller (5) having a computer (51), an exciter (52) and a loop antenna (53); excitation The driver (52) is connected to the computer (51) through its communication interface (52-1); the exciter (52) is connected to the loop antenna (53) by its driver (52-4) and resonance capacitor (52-5); The device (52) has the function of encoding and modulating the information transmitted from the computer (51) to drive the loop antenna (53) and send it to the space; the electronic tag (100) is placed in the range surrounded by the loop antenna (53). Receives the information sent by the main controller (5) and displays specific information; the electronic label (100) has a housing (1), a circuit device (2) and a display screen (3), and the circuit device (2) is set In the casing (1), the display screen (3) is arranged on the casing (1) and located at a display window of the casing (1); the circuit device (2) has an antenna device (21), a microprocessor (24), and a main unit Crystal oscillator circuit (25) and DC power supply terminal; microprocessor (24) with power supply terminal and main crystal The vibration terminal (24-13), the display output terminal (24-15) and the signal input port (24-1); the power supply terminal of the microprocessor (24) and the DC power supply terminal of the circuit device (2) are co-linear; microprocessing The main crystal terminal (24-13) of the controller (24) is connected to the main crystal circuit (25); the display output terminal (24-15) of the microprocessor (24) is connected to the display screen (3) or through the driving circuit and The display screen (3) is connected; it is characterized in that: the output end of the antenna device (21) is connected to the signal input port (24-1) of the microprocessor (24); the microprocessor (24) has a Digitally modulated microprocessor with low frequency radio wave signal function, the frequency of low frequency signal that it can process is between 4kHz and 200kHz; the process of microprocessor (24) processing low frequency radio wave signal through software program is: ① according to the signal input port (24-1) to determine the presence or absence of signal input; ② to determine the presence or absence of a signal node (61) by comparing changes in the time parameter of the signal waveform; ③ to measure the value of the adjacent signal node (61) The symbol length (62) is stored in the data memory (24-9). The collection of this series of symbol length (62) forms a data column representing the baseband signal, thereby implementing the software demodulation function; ④ The baseband signal is decoded into an actual data frame, and the software decoding process is completed; ⑤ Analyze and process the received data, and then control the working state of the microprocessor (24), and display relevant information through the display screen (3).
PCT/CN2003/001008 2002-12-10 2003-11-27 An electronic label system on a shelf and an electronic label thereof WO2004053784A1 (en)

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