WO2004029784A3 - Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system - Google Patents

Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system Download PDF

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Publication number
WO2004029784A3
WO2004029784A3 PCT/US2003/021852 US0321852W WO2004029784A3 WO 2004029784 A3 WO2004029784 A3 WO 2004029784A3 US 0321852 W US0321852 W US 0321852W WO 2004029784 A3 WO2004029784 A3 WO 2004029784A3
Authority
WO
WIPO (PCT)
Prior art keywords
instructions
executed
rate
controlling
microprocessor system
Prior art date
Application number
PCT/US2003/021852
Other languages
French (fr)
Other versions
WO2004029784A2 (en
Inventor
Sudarshan Kadambi
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Priority to AU2003251882A priority Critical patent/AU2003251882A1/en
Publication of WO2004029784A2 publication Critical patent/WO2004029784A2/en
Publication of WO2004029784A3 publication Critical patent/WO2004029784A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

One embodiment of the present invention provides a system that facilitates controlling the rate at which instructions are executed by a microprocessor. The system starts by receiving a signal indicating the existence of a throttling condition. In response to the throttling condition, the system reduces the rate at which instructions are executed by the microprocessor. In a variation on this embodiment, the throttling condition can include a processor idle state, a processor overheating state, or a power over-consumption state.
PCT/US2003/021852 2002-09-26 2003-07-10 Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system WO2004029784A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003251882A AU2003251882A1 (en) 2002-09-26 2003-07-10 Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/259,720 2002-09-26
US10/259,720 US20040064745A1 (en) 2002-09-26 2002-09-26 Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system

Publications (2)

Publication Number Publication Date
WO2004029784A2 WO2004029784A2 (en) 2004-04-08
WO2004029784A3 true WO2004029784A3 (en) 2004-09-30

Family

ID=32029547

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/021852 WO2004029784A2 (en) 2002-09-26 2003-07-10 Method and apparatus for controlling the rate at which instructions are executed by a microprocessor system

Country Status (3)

Country Link
US (1) US20040064745A1 (en)
AU (1) AU2003251882A1 (en)
WO (1) WO2004029784A2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8237386B2 (en) 2003-08-15 2012-08-07 Apple Inc. Methods and apparatuses for operating a data processing system
US7793291B2 (en) * 2004-12-22 2010-09-07 International Business Machines Corporation Thermal management of a multi-processor computer system
US7444526B2 (en) * 2005-06-16 2008-10-28 International Business Machines Corporation Performance conserving method for reducing power consumption in a server system
US7562234B2 (en) 2005-08-25 2009-07-14 Apple Inc. Methods and apparatuses for dynamic power control
US8374730B2 (en) * 2005-08-25 2013-02-12 Apple Inc. Methods and apparatuses for dynamic thermal control
US8566568B2 (en) * 2006-08-16 2013-10-22 Qualcomm Incorporated Method and apparatus for executing processor instructions based on a dynamically alterable delay
US7689851B2 (en) * 2006-10-27 2010-03-30 Hewlett-Packard Development Company, L.P. Limiting power state changes to a processor of a computer device
US7949888B2 (en) * 2008-01-07 2011-05-24 Apple Inc. Forced idle of a data processing system
US7949889B2 (en) * 2008-01-07 2011-05-24 Apple Inc. Forced idle of a data processing system
US8671294B2 (en) * 2008-03-07 2014-03-11 Raritan Americas, Inc. Environmentally cognizant power management
US8713342B2 (en) * 2008-04-30 2014-04-29 Raritan Americas, Inc. System and method for efficient association of a power outlet and device
US8020167B2 (en) * 2008-05-05 2011-09-13 Dell Products L.P. System and method for automatic throttling of resources in an information handling system chassis
US8315746B2 (en) 2008-05-30 2012-11-20 Apple Inc. Thermal management techniques in an electronic device
US8886985B2 (en) * 2008-07-07 2014-11-11 Raritan Americas, Inc. Automatic discovery of physical connectivity between power outlets and IT equipment
US8306772B2 (en) 2008-10-13 2012-11-06 Apple Inc. Method for estimating temperature at a critical point
US8737168B2 (en) * 2008-10-20 2014-05-27 Siva Somasundaram System and method for automatic determination of the physical location of data center equipment
CA2741088C (en) 2008-10-21 2017-07-11 Raritan Americas, Inc. Methods of achieving cognizant power management
US8219831B2 (en) 2009-01-28 2012-07-10 Oracle America, Inc. Reducing temperature and power by instruction throttling at decode stage of processor pipeline in time constant duration steps
US8364999B1 (en) * 2010-06-23 2013-01-29 Nvdia Corporation System and method for processor workload metering
US9846463B2 (en) * 2012-09-28 2017-12-19 Intel Corporation Computing system and processor with fast power surge detection and instruction throttle down to provide for low cost power supply unit
CN105917287A (en) * 2013-09-09 2016-08-31 希捷科技有限公司 Mobile data storage device with temperature management

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5974557A (en) * 1994-06-20 1999-10-26 Thomas; C. Douglass Method and system for performing thermal and power management for a computer
WO2001048584A1 (en) * 1999-12-23 2001-07-05 Intel Corporation Microprocessor with digital power throttle
US20020083354A1 (en) * 2000-12-26 2002-06-27 Mitsuhiro Adachi Method and apparatus for thermal throttling of clocks
WO2002073336A2 (en) * 2001-03-08 2002-09-19 Advanced Micro Devices, Inc. Microprocessor employing a performance throttling mechanism for power management

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5719800A (en) * 1995-06-30 1998-02-17 Intel Corporation Performance throttling to reduce IC power consumption
US6128728A (en) * 1997-08-01 2000-10-03 Micron Technology, Inc. Virtual shadow registers and virtual register windows
US6662278B1 (en) * 2000-09-22 2003-12-09 Intel Corporation Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system
US8190863B2 (en) * 2004-07-02 2012-05-29 Intel Corporation Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5974557A (en) * 1994-06-20 1999-10-26 Thomas; C. Douglass Method and system for performing thermal and power management for a computer
WO2001048584A1 (en) * 1999-12-23 2001-07-05 Intel Corporation Microprocessor with digital power throttle
US20020083354A1 (en) * 2000-12-26 2002-06-27 Mitsuhiro Adachi Method and apparatus for thermal throttling of clocks
WO2002073336A2 (en) * 2001-03-08 2002-09-19 Advanced Micro Devices, Inc. Microprocessor employing a performance throttling mechanism for power management

Also Published As

Publication number Publication date
WO2004029784A2 (en) 2004-04-08
US20040064745A1 (en) 2004-04-01
AU2003251882A1 (en) 2004-04-19

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