PIXEL ARRAY FOR DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a pixel array for a display device and a liquid crystal display.
(b) Description of Related Art
Generally, a liquid crystal display (LCD) includes a liquid crystal panel assembly including two panels provided with two kinds of field generating electrodes such as pixel electrodes and a common electrode and a liquid crystal layer with dielectric anisotropy interposed therebetween. The variation of the voltage difference between the field generating electrodes, i.e., the variation in the strength of an electric field generated by the electrodes changes the transmittance of the light passing through the LCD, and thus desired images are obtained by controlling the voltage difference between the electrodes. The LCD includes a plurality of pixels with pixel electrodes and red (R), green (G) and blue (B) color filters. The pixels are driven to perform display operation by way of the signals applied thereto through display signal lines. The signal lines include gate lines (or scanning signal lines) for carrying the scanning signals, and data lines for carrying data signals. Each pixel has a thin film transistor (TFT) connected to one of the gate lines and one of the data lines to control the data signals applied to the pixel electrode.
Meanwhile, there are several types of arrangement of the red (R), green (G) and blue (B) color filters. Examples are a stripe type where the color filters of the same color are arranged in the same pixel columns, a mosaic type where the red, green and blue color filters are arranged in turn along the row and column directions, and a delta type where the pixels are arranged zigzag in the column direction and the red, green and blue color filters are arranged in turn. The delta type correctly represents a circle or a diagonal line.
However, the conventional pixel arrangements cause reduced resolution of the display and high product cost.
SUMMARY OF THE INVENTION
A pixel array arranged in a matrix for a display device is provided, the pixel array includes: first and second red pixels arranged in a column direction; first and second blue pixels obliquely facing each other across the first and the second red pixels; and first and second green pixels obliquely facing each other across the first and the second red pixels and located adjacent to the first and the second blue pixels, respectively.
A liquid crystal display is provided, which includes: an array of a plurality of sets of pixels, each set including first and second red pixels adjacent to each other, first and second blue pixels obliquely facing each other across the first and the second red pixels, and first and second green pixels obliquely facing each other across the first and the second red pixels and adjacent to the first and the second blue pixels, respectively, each pixel including a pixel electrode and a thin film transistor; a plurality of gate lines extending in a row direction for tiar-smitting a gate signal to the pixels; and a plurality of data lines extending in a column direction for transmitting data signals to the pixels.
The first and the second red pixels preferably have different saturation.
When the first blue pixel and the first green pixel are located left to the first red pixel and the second red pixel, respectively, and the second blue pixel and the second green pixel are located right to the second red pixel and the first red pixel, respectively, the first blue pixel preferably has the saturation lower than the second blue pixel.
The display device such as the liquid crystal display is subject to rendering. The liquid crystal display may further include a passivation layer interposed between the pixel electrodes and the thin film transistors, the gate lines, and the data lines, including low dielectric material, and having a plurality of contact holes for interconnection between the pixel electrodes and the thin film transistors.
The liquid crystal display may further include a plurality of contact assistants connected to portions of the data lines for receiving the data signals from an external device.
BRIEF DESCRIPTION OF THE DRAWINGS The above and other advantages of the present invention will become more apparent by describing preferred embodiments thereof in detail with reference to the accompanying drawings in which:
Fig. 1 is an equivalent circuit diagram of a pixel of an LCD according to an embodiment of the present invention; Figs. 2A and 2B illustrate a pixel arrangement for an LCD according to an embodiment of the present invention;
Figs. 3A and 3B illustrate a pixel arrangement for an LCD according to another embodiment of the present invention;
Fig. 4 is a pixel group for a rendered LCD according to an embodiment of the present invention;
Fig. 5 is a layout view of a TFT array panel for an LCD according to an embodiment of the present invention;
Fig. 6 is a sectional view of the TFT array panel shown in Fig. 15 taken along the line VI- VI'; Fig. 7 is a layout view of a TFT array panel for an LCD according to another embodiment of the present invention; and
Figs. 8 A and 8B are sectional views of the TFT array panel shown in Fig. 7 taken along the lines VIIIA-VIIIA' and VIIIBNIIIB', respectively.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the inventions are shown. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the thickness of layers and regions are exaggerated for clarity. Like numerals refer to like elements throughout. It will be understood
that when an element such as a layer, film, region, panel or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.
Now, LCDs according to embodiments of this invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is an equivalent circuit diagram of a pixel of an LCD according to an embodiment of the present invention. Referring to Fig. 1, an LCD according to an embodiment of the present invention, in structural view, includes a lower panel 100, an upper panel 200 and a liquid crystal layer 3 interposed therebetween, while it includes a plurality of display signal lines 121 and 171 and a plurality of pixels connected thereto and arranged substantially in a matrix in circuital view. The display signal lines 121 and 171 are provided on the lower panel 100 and include a plurality of gate lines 121 tiansmitting gate signals (called scanning signals) and a plurality of data lines 171 transmitting data signals. The gate lines 121 extend substantially in a row direction and are substantially parallel to each other, while the data lines 171 extend substantially in a column direction and are substantially parallel to each other.
Each pixel includes a switching element Q connected to the display signal lines 121 and 171, and an LC capacitor CLC and a storage capacitor CST that are connected to the switching element Q. The storage capacitor CST may be omitted if unnecessary. The switching element Q such as a TFT is provided on the lower panel
100 and has three terminals: a control terminal connected to one of the gate lines 121; an input terminal connected to one of the data lines 171; and an output terminal connected to the LC capacitor CLC and the storage capacitor CST.
The LC capacitor CLC includes a pixel electrode 190 on the lower panel 100, a common electrode 270 on the upper panel 200, and the LC layer 3 as a dielectric between the electrodes 190 and 270. The pixel electrode 190 is
connected to the switching element Q, and the common electrode 270 covers the entire surface of the upper panel 100 and is supplied with a common voltage Vcom. Alternatively, both the pixel electrode 190 and the common electrode 270, which have shapes of bars or stripes, are provided on the lower panel 100. The storage capacitor CST is an auxiliary capacitor for the LC capacitor
CLC The storage capacitor CST includes the pixel electrode 190 and a separate signal line (not shown), which is provided on the lower panel 100, overlaps the pixel electrode 190 via an insulator, and is supplied with a predetermined voltage such as the common voltage Vcom. Alternatively, the storage capacitor CST includes the pixel electrode 190 and an adjacent gate line called a previous gate line, which overlaps the pixel electrode 190 via an insulator.
For color display, each pixel represents its own color by providing one of a plurality of color filters 230 in an area occupied by the pixel electrode 190. The color filter 230 shown in Fig. 1 is provided in the corresponding area of the upper panel 200. Alternatively, the color filter 230 is provided on or under the pixel electrode 190 on the lower panel 100.
Preferably, the color of the color filter 230 is one of the primary colors such as red, green and blue. Hereinafter, a pixel is referred to as red, greed or blue pixel based on the color represented by the pixel and indicated by reference numerals R, G or B.
Figs. 2A and 3A illustrate spatial arrangements of pixels of LCDs according to embodiments of the present invention.
Referring to Figs. 2A and 3A, a plurality of pixels having substantially equal size are arranged in a matrix including a plurality of pixel row and a plurality of pixel columns.
Each pixel row includes pixels representing three colors, i.e., red pixels R, green pixels G, and blue pixels B. The sequence of the pixels in a pixel row shown in Fig. 2A is the red pixel R, the blue pixel B, and the green pixel G or the green pixel G, the blue pixel B, and the red pixel R. On the contrary, the sequence of the pixels in a pixel row shown in Fig. 3A is the blue pixel B, the red
pixel R, and the green pixel G or the green pixel G, the red pixel R, and the blue pixel B.
The pixel columns include a plurality of bicolor columns and a plurality of unicolor columns. As shown in Fig. 2A, each bicolor column includes red pixels R and green pixels G and each unicolor column includes blue pixels B. As shown in Fig. 3A, each bicolor column includes blue pixels B and green pixels G and each unicolor column includes red pixels R.
When viewing only bicolor columns, any two pixels adjacent to each other in a row direction or a column direction represent different colors and thus the bicolor columns form a checkerboard pattern. Each unicolor column is interposed between the bicolor columns.
Figs. 2B and 3B iHustrates a group of pixels forming a dot, which is an elementary unit for an image in the pixel arrangements shown in Figs. 2A and 3A, respectively. Each group includes six pixels, i.e., two adjacent center pixels in a unicolor column and four pixels in bicolor columns, which are adjacent to the respective center pixels in the row direction.
An LCD having the above-described pixel arrangement are rendered for increasing resolution and this will be described in detail with reference to Fig. 4.
Fig. 4 is an exemplary pixel group for a rendered LCD according to an embodiment of the present invention.
Referring to Fig. 4, an exemplary pixel group for rendering is centered on any pixel PI in a bicolor pixel. The pixel group includes four pixels P2 in bicolor columns and two pixels in a unicolor column, which are adjacent to the center pixel PI. The rendering may give about half weight to the center pixel PI. In the meantime, since the pixels representing the same colors in bicolor columns face each other obliquely in a symmetrical manner as shown in Figs. 2B, 3B and 4 and are seen as mixed. On the contrary, the pixels in unicolor columns are arranged in stripes and do not make symmetry with the pixels in the bicolor columns, which may cause incomplete color mixture and deteriorate image quality. In particular, the bicolor columns shown in Fig. 2B represent green and red, which are mixed to form yellow. Since yellow has luminosity higher than
blue, the bicolor columns may be seen brighter than the unicolor columns. On the contrary, blue and green in the bicolor columns shown in Fig. 3B are mixed to form cyan, which has similar luminosity to red, and thus the brightness difference may not be detected. The brightness difference may be much reduced by differentiating saturation of two pixels in two adjacent red pixels R in a unicolor column shown in Fig. 3B.
For example, the saturation of a red pixel R right to a blue pixel B and left to a green pixel G is lower than that of a red pixel R left to a blue pixel B and right to a green pixel G. The red pixel R right to a relatively dark, blue pixel B has lower saturation but higher luminosity than the blue pixel B, while the red pixel B right to a relatively bright, green pixel G has higher saturation but lower luminosity than the green pixel G. Accordingly, the brightness difference between two adjacent pixels in the row direction and the column direction is reduced.
The saturation difference may be obtained by differentiating the amount of pigment mixed to photoresist to form color filters 230 shown in Fig. 1. However, other methods may be also used for the saturation difference.
An exemplary detailed structure of a TFT array panel for an LCD according to an embodiment of the present invention will be described with reference to Figs. 5 and 6.
Fig. 5 is a layout view of an exemplary TFT array panel for an LCD according to an embodiment of the present invention, and Fig. 6 is a sectional view of the TFT array panel shown in Fig. 5 taken along the line VI-VT. A plurality of gate lines 121 for tiansmitting gate signals are formed on an insulating substrate 110. Each gate line 121 extends substantially in a transverse direction and a plurality of portions of each gate line 121 form a plurality of gate electrodes 123. Each gate line 121 includes a plurality of expansions 127 protruding downward. The gate lines 121 include a low resistivity conductive layer preferably made of Ag containing metal such as Ag and Ag alloy or Al containing metal such
as Al and Al alloy. The gate lines 121 may have a multilayered structure including a low resistivity conductive layer and another layer preferably made of Cr, Ti, Ta, Mo or their alloys such as MoW alloy having good physical, chemical and electrical contact characteristics with other materials such as ITO (indium tin oxide) and IZO (indium zinc oxide). A good exemplary combination of such layers is Cr and Al-Nd alloy.
The lateral sides of the gate lines 121 are tapered, and the mclination angle of the lateral sides with respect to a surface of the substrate 110 ranges about 30-80 degrees. A gate insulating layer 140 preferably made of silicon nitride (SiNx) is formed on the gate lines 121.
A plurality of semiconductor islands 154 preferably made of hydrogenated amorphous silicon (abbreviated to "a-Si") are formed on the gate insulating layer 140. A plurality of ohmic contact islands 163 and 165 preferably made of silicide or n+ hydrogenated a-Si heavily doped with n type impurity are formed on the semiconductor islands 154. The ohmic contact islands 163 and 165 are located in pairs on the semiconductor islands 154.
The lateral sides of the semiconductor islands 154 and the ohmic contacts 163 and 165 are tapered, and the inclination angles thereof are preferably in a range between about 30-80 degrees.
A plurality of data lines 171, a plurality of drain electrodes 175, and a plurality of storage capacitor conductors 177 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140. The data lines 171 for tiansmitting data voltages extend substantially in the longitudinal direction and intersect the gate lines 121. A plurality of branches of each data line 171, which extend toward the drain electrodes 175, form a plurality of source electrodes 173. Each pair of the source electrodes 173 and the drain electrodes 175 are separated from each other and opposite each other with respect to a gate electrode 123. A gate electrode 123, a source electrode 173, and a drain electrode 175 along with a semiconductor island 154 form a TFT having a
channel formed in the semiconductor island 154 disposed between the source electrode 173 and the drain electrode 175.
The storage capacitor conductors 177 overlap the expansions 127 of the gate lines 121. The data lines 171, the drain electrodes 175, and the storage capacitor conductors 177 also include a low resistivity conductive layer preferably made of Ag containing metal such as Ag and Ag alloy or Al containing metal such as Al and Al alloy. The data lines 171, the drain electrodes 175, and the storage capacitor conductors 177 may have a multilayered structure including a low resistivity conductive layer and another layer preferably made of Cr, Ti, Ta, Mo or their alloys such as MoW alloy having good physical, chemical and electrical contact characteristics with other materials such as ITO (indium tin oxide) and IZO (indium zinc oxide). A good exemplary combination of such layers is Cr and Al-Nd alloy. The lateral sides of the data lines 171, the drain electrodes 175, and the storage capacitor conductors 177 are tapered, and the inclination angle of the lateral sides with respect to a surface of the substrate 110 ranges about 30-80 degrees.
The ohmic contacts 163 and 165 interposed only between the underlying semiconductor islands 154 and the overlying data lines 171 and the overlying drain electrodes 175 thereon and reduce the contact resistance therebetween.
A passivation layer 180 is formed on the data lines 171, the drain electrodes 175, the storage conductors 177, and the exposed portions of the semiconductor islands 154. The passivation layer 180 is preferably made of photosensitive organic material having a good flatness characteristic, low dielectric insulating material such as a-Si:C:O and a-Si:0:F formed by plasma enhanced chemical vapor deposition (PECVD), or inorganic material such as silicon nitride. Alternatively, the passivation layer 180 may includes both a SiNX film and an organic film. The passivation layer 180 has a plurality of contact holes 185, 187 and 189 exposing the drain electrodes 175, the storage conductors 177, and end portions
179 of the data lines 171, respectively. The passivation layer 180 and the gate insulating layer 140 has a plurality of contact holes 182 exposing end portions 125 of the gate lines 121.
A plurality of pixel electrodes 190 and a plurality of contact assistants 92 and 97, which are preferably made of IZO or ITO, are formed on the passivation layer 180.
The pixel electrodes 190 are physically and electrically connected to the drain electrodes 175 through the contact holes 185 and to the storage capacitor conductors 177 through the contact holes 187 such that the pixel electrodes 190 receives the data voltages from the drain electrodes 175 and transmits the received data voltages to the storage capacitor conductors 177.
Referring back to Fig. 1, the pixel electrodes 190 supplied with the data voltages generate electric fields in cooperation with the common electrode 270 on the other panel 200, which reorient liquid crystal molecules in the liquid crystal layer 3 disposed therebetween.
As described above, a pixel electrode 190 and a common electrode 270 form a liquid crystal capacitor CLC, which stores applied voltages after turn-off of the TFT Q. An additional capacitor called a "storage capacitor," which is connected in parallel to the liquid crystal capacitor CLO is provided for enhancing the voltage storing capacity. The storage capacitors are implemented by overlapping the pixel electrodes 190 with the gate lines 121 adjacent thereto (called "previous gate lines"). The capacitances of the storage capacitors, i.e., the storage capacitances are increased by providing the expansions 127 at the gate lines 121 for increasing overlapping areas and by providing the storage capacitor conductors 177, which are connected to the pixel electrodes 190 and overlap the expansions 127, under the pixel electrodes 190 for decreasing the distance between the terminals.
The pixel electrodes 190 overlap the gate lines 121 and the data lines 171 to increase aperture ratio but it is optional. The contact assistants 92 and 97 are connected to the exposed end portions 125 of the gate lines 121 and the exposed end portions 179 of the data
lines 171 through the contact holes 182 and 189, respectively. The contact assistants 92 and 97 are not requisites but preferred to protect the exposed portions 125 and 179 and to complement the adhesiveness of the exposed portion 125 and 179 and external devices. According to another embodiment of the present invention, the pixel electrodes 190 are made of transparent conductive polymer. For a reflective or transflective LCD, the pixel electrodes 190 include opaque reflective metal.
A TFT array panel for an LCD according to another embodiment of the present invention will be described in detail with reference to Figs. 7, 8A and 8B. Fig. 7 is a layout view of an exemplary TFT array panel for an LCD according to another embodiment of the present invention, and Figs. 8A and 8B are sectional views of the TFT array panel shown in Fig. 7 taken along the line VIIIA- VIIIA' and the line VIIIB- VIIIB', respectively.
As shown in the figures, a layered structure of a TFT array panel of an LCD according to this embodiment is almost the same as that shown in Figs. 5 and
6. That is, a plurality of gate lines 121 including a plurality of gate electrodes 123 are formed on a substrate 110, and a gate insulating layer 140 is formed thereon. A plurality of semiconductor stripes 151 including a plurality of extensions 154 corresponding to the semiconductor islands 154 shown in Figs. 5 and 6 are formed on the gate insulating layer 140, and a plurality of ohmic contact stripes 161 including a plurality of extensions 163 corresponding to the ohmic contact islands 163 shown in Figs. 5 and 6 and a plurality of ohmic contact islands 165 are formed on the semiconductor stripes 151. A plurality of data lines 171 including a plurality of source electrodes 173, a plurality of drain electrodes 175, and a plurality of storage capacitor conductors 177 are formed on the ohmic contacts 161 and 165, and a passivation layer 180 is formed thereon. A plurality of contact holes 182, 185, 187 and 189 are provided at the passivation layer 180 and/ or the gate insulating layer 140, and a plurality of pixel electrodes 190 and a plurality of contact assistants 92 and 97 are formed on the passivation layer 180. Different from the TFT array panel shown in Figs. 5 and 6, the TFT array panel according to this embodiment provides a plurality of storage electrode lines
131, which are separated from the gate lines 121, on the same layer as the gate lines 121, and overlaps the storage electrode lines 131 with the storage capacitor conductors 177 to form storage capacitors without expansions of the gate lines 121. The storage electrode lines 131 are supplied with a predetermined voltage such as the common voltage. The storage electrode lines 131 alo ng with the storage capacitor conductors 177 may be omitted if the storage capacitance generated by the overlapping of the gate lines 121 and the pixel electrodes 190 is sufficient.
In addition, as well as the semiconductor stripes 151 and the ohmic contacts 161 and 165, a plurality of semiconductor islands 157 and a plurality of ohmic contacts 167 thereover are provided between the storage conductors 177 and the gate insulating layer 140.
The semiconductor stripes and islands 151 and 157 have almost the same planar shapes as the data lines 171, the drain electrodes 175 and the storage capacitor conductors 177 as well as the underlying ohmic contacts 161, 165 and 167, except for the extensions 154 where TFTs are provided. In particular, the semiconductor islands 157, the ohmic contact islands 167 and the storage conductors 177 have substantially the same planar shape. The semiconductor stripes 151 include some exposed portions, which are not covered with the data lines 171, the drain electrodes 175 and the storage conductors 177, such as portions located between the source electrodes 173 and the drain electrodes 175.
Although preferred embodiments of the present invention have been described in detail hereinabove, it should be clearly understood that many variations and/ or modifications of the basic inventive concepts herein taught which may appear to those skilled in the present art will still fall within the spirit and scope of the present invention, as defined in the appended claims.