WO2003023616A3 - Verfahren zum debuggen rekonfigurierbarer architekturen - Google Patents
Verfahren zum debuggen rekonfigurierbarer architekturen Download PDFInfo
- Publication number
- WO2003023616A3 WO2003023616A3 PCT/DE2002/003278 DE0203278W WO03023616A3 WO 2003023616 A3 WO2003023616 A3 WO 2003023616A3 DE 0203278 W DE0203278 W DE 0203278W WO 03023616 A3 WO03023616 A3 WO 03023616A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- debugging
- reconfigurable architectures
- debugging reconfigurable
- architectures
- debugger
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
- G06F11/3656—Software debugging using additional hardware using a specific debug interface
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
Abstract
Priority Applications (39)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10297719T DE10297719D2 (de) | 2001-09-03 | 2002-09-03 | Verfahren zum Debuggen rekonfigurierbarer Architekturen |
EP02772041A EP1449083B1 (de) | 2001-09-03 | 2002-09-03 | Verfahren zum debuggen rekonfigurierbarer architekturen |
DE50210212T DE50210212D1 (de) | 2001-09-03 | 2002-09-03 | Verfahren zum debuggen rekonfigurierbarer architekturen |
AU2002336896A AU2002336896A1 (en) | 2001-09-03 | 2002-09-03 | Method for debugging reconfigurable architectures |
US10/487,687 US7480825B2 (en) | 2001-09-03 | 2002-09-03 | Method for debugging reconfigurable architectures |
EP02777144A EP1466264B1 (de) | 1995-12-29 | 2002-09-18 | Verfahren zur konfiguration der verbindung zwischen datenverarbeitungszellen |
PCT/EP2002/010479 WO2003025781A2 (de) | 2001-09-19 | 2002-09-18 | Verfahren zur konfiguration der verbindung zwischen datenverarbeitungszellen |
AU2002338729A AU2002338729A1 (en) | 2001-09-19 | 2002-09-18 | Router |
JP2003538928A JP4456864B2 (ja) | 2001-09-19 | 2002-09-19 | リコンフィギュアブル素子 |
PCT/EP2002/010572 WO2003036507A2 (de) | 2001-09-19 | 2002-09-19 | Rekonfigurierbare elemente |
EP02791644A EP1472616B8 (de) | 2001-09-19 | 2002-09-19 | Rekonfigurierbare elemente |
AU2002357982A AU2002357982A1 (en) | 2001-09-19 | 2002-09-19 | Reconfigurable elements |
AT02791644T ATE533111T1 (de) | 2001-09-19 | 2002-09-19 | Rekonfigurierbare elemente |
US10/508,559 US20060075211A1 (en) | 2002-03-21 | 2003-03-21 | Method and device for data processing |
PCT/DE2003/000942 WO2003081454A2 (de) | 2002-03-21 | 2003-03-21 | Verfahren und vorrichtung zur datenverarbeitung |
AU2003223892A AU2003223892A1 (en) | 2002-03-21 | 2003-03-21 | Method and device for data processing |
EP03720231A EP1518186A2 (de) | 2002-03-21 | 2003-03-21 | Verfahren und vorrichtung zur datenverarbeitung |
AU2003286131A AU2003286131A1 (en) | 2002-08-07 | 2003-07-23 | Method and device for processing data |
PCT/EP2003/008081 WO2004021176A2 (de) | 2002-08-07 | 2003-07-23 | Verfahren und vorrichtung zur datenverarbeitung |
EP03776856.1A EP1537501B1 (de) | 2002-08-07 | 2003-07-23 | Verfahren und vorrichtung zur datenverarbeitung |
US10/523,764 US8156284B2 (en) | 2002-08-07 | 2003-07-24 | Data processing method and device |
JP2005506110A JP2005535055A (ja) | 2002-08-07 | 2003-07-24 | データ処理方法およびデータ処理装置 |
PCT/EP2003/008080 WO2004015568A2 (en) | 2002-08-07 | 2003-07-24 | Data processing method and device |
AU2003260323A AU2003260323A1 (en) | 2002-08-07 | 2003-07-24 | Data processing method and device |
EP03784053A EP1535190B1 (de) | 2002-08-07 | 2003-07-24 | Verfahren zum gleichzeitigen Betreiben eines sequenziellen Prozessors und eines rekonfigurierbaren Arrays |
US12/247,076 US8209653B2 (en) | 2001-09-03 | 2008-10-07 | Router |
US12/354,590 US8069373B2 (en) | 2001-09-03 | 2009-01-15 | Method for debugging reconfigurable architectures |
US12/570,943 US8914590B2 (en) | 2002-08-07 | 2009-09-30 | Data processing method and device |
US12/621,860 US8281265B2 (en) | 2002-08-07 | 2009-11-19 | Method and device for processing data |
JP2009271120A JP2010079923A (ja) | 2001-09-19 | 2009-11-30 | 処理チップ、チップを含むシステム、マルチプロセッサ装置およびマルチコアプロセッサ装置 |
US12/729,090 US20100174868A1 (en) | 2002-03-21 | 2010-03-22 | Processor device having a sequential data processing unit and an arrangement of data processing elements |
US12/729,932 US20110161977A1 (en) | 2002-03-21 | 2010-03-23 | Method and device for data processing |
US12/947,167 US20110238948A1 (en) | 2002-08-07 | 2010-11-16 | Method and device for coupling a data processing unit and a data processing array |
US13/023,796 US8686475B2 (en) | 2001-09-19 | 2011-02-09 | Reconfigurable elements |
US13/279,561 US8407525B2 (en) | 2001-09-03 | 2011-10-24 | Method for debugging reconfigurable architectures |
US13/796,215 US20130339797A1 (en) | 2001-09-03 | 2013-03-12 | Method for debugging reconfigurable architectures |
US14/162,704 US20140143509A1 (en) | 2002-03-21 | 2014-01-23 | Method and device for data processing |
US14/540,782 US20150074352A1 (en) | 2002-03-21 | 2014-11-13 | Multiprocessor Having Segmented Cache Memory |
US14/923,702 US10579584B2 (en) | 2002-03-21 | 2015-10-27 | Integrated data processing core and array data processor and method for processing algorithms |
Applications Claiming Priority (22)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10142894.4 | 2001-09-03 | ||
DE10142894 | 2001-09-03 | ||
DE10142904.5 | 2001-09-03 | ||
DE10142904 | 2001-09-03 | ||
DE10144733 | 2001-09-11 | ||
DE10144733.7 | 2001-09-11 | ||
DE10145795 | 2001-09-17 | ||
DE10145795.2 | 2001-09-17 | ||
US09/967,497 | 2001-09-28 | ||
US09/967,497 US7266725B2 (en) | 2001-09-03 | 2001-09-28 | Method for debugging reconfigurable architectures |
DE10154259 | 2001-11-05 | ||
DE10202044.2 | 2002-01-19 | ||
DE10202044 | 2002-01-19 | ||
DE10202175 | 2002-01-20 | ||
DE10202175.9 | 2002-01-20 | ||
DE10206856.9 | 2002-02-18 | ||
DE10206856 | 2002-02-18 | ||
DE10207226 | 2002-02-21 | ||
DE10207226.4 | 2002-02-21 | ||
DE10240022.9 | 2002-08-27 | ||
DE10240022 | 2002-08-27 | ||
DE10154259.3 | 2002-11-05 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10487687 A-371-Of-International | 2002-09-03 | ||
US12/354,590 Continuation US8069373B2 (en) | 2001-09-03 | 2009-01-15 | Method for debugging reconfigurable architectures |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2003023616A2 WO2003023616A2 (de) | 2003-03-20 |
WO2003023616A8 WO2003023616A8 (de) | 2003-08-21 |
WO2003023616A3 true WO2003023616A3 (de) | 2003-12-18 |
Family
ID=45871926
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2002/003278 WO2003023616A2 (de) | 1995-12-29 | 2002-09-03 | Verfahren zum debuggen rekonfigurierbarer architekturen |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1449083B1 (de) |
AT (1) | ATE363098T1 (de) |
AU (1) | AU2002336896A1 (de) |
WO (1) | WO2003023616A2 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
EP2043000B1 (de) | 2002-02-18 | 2011-12-21 | Richter, Thomas | Bussysteme und Rekonfigurationsverfahren |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
WO2019217929A1 (en) | 2018-05-11 | 2019-11-14 | Lattice Semiconductor Corporation | Failure characterization systems and methods for programmable logic devices |
EP3791307A4 (de) * | 2018-05-11 | 2022-03-30 | Lattice Semiconductor Corporation | Systeme und verfahren zum sicheren hochfahren für programmierbare logische vorrichtungen |
CN112579460B (zh) * | 2020-12-24 | 2023-04-14 | 中国航空工业集团公司西安航空计算技术研究所 | 一种基于多核嵌入式系统的多级调试方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5425036A (en) * | 1992-09-18 | 1995-06-13 | Quickturn Design Systems, Inc. | Method and apparatus for debugging reconfigurable emulation systems |
US5680583A (en) * | 1994-02-16 | 1997-10-21 | Arkos Design, Inc. | Method and apparatus for a trace buffer in an emulation system |
US5754827A (en) * | 1995-10-13 | 1998-05-19 | Mentor Graphics Corporation | Method and apparatus for performing fully visible tracing of an emulation |
-
2002
- 2002-09-03 EP EP02772041A patent/EP1449083B1/de not_active Expired - Lifetime
- 2002-09-03 WO PCT/DE2002/003278 patent/WO2003023616A2/de active IP Right Grant
- 2002-09-03 AU AU2002336896A patent/AU2002336896A1/en not_active Abandoned
- 2002-09-03 AT AT02772041T patent/ATE363098T1/de not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5425036A (en) * | 1992-09-18 | 1995-06-13 | Quickturn Design Systems, Inc. | Method and apparatus for debugging reconfigurable emulation systems |
US5680583A (en) * | 1994-02-16 | 1997-10-21 | Arkos Design, Inc. | Method and apparatus for a trace buffer in an emulation system |
US5754827A (en) * | 1995-10-13 | 1998-05-19 | Mentor Graphics Corporation | Method and apparatus for performing fully visible tracing of an emulation |
Also Published As
Publication number | Publication date |
---|---|
WO2003023616A2 (de) | 2003-03-20 |
EP1449083A2 (de) | 2004-08-25 |
WO2003023616A8 (de) | 2003-08-21 |
EP1449083B1 (de) | 2007-05-23 |
ATE363098T1 (de) | 2007-06-15 |
AU2002336896A1 (en) | 2003-03-24 |
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