WO2003001859A1

WO2003001859A1 - Method and device for testing electronic devices

Info

Publication number: WO2003001859A1
Application number: PCT/US2002/019434
Authority: WO
Inventors: Robert H. Martter; Craig C. Sundberg; Richard N. Giardina; Brian S. Fetscher; James G. Deutschlander
Original assignee: Heatron, Inc.
Priority date: 2001-06-20
Filing date: 2002-06-19
Publication date: 2003-01-03
Also published as: US20040169522A1; US6720784B2; US20030016025A1; US6856157B2

Abstract

The present invention provides a new electronic circuit board (10) and a method of using such board (10) to test electronic devices at elevated temperatures. The board (10) comprises a steel base (12) having a dielectric coating layer (14) and a circuit (18) formed on the layer (14). The circuit (18) includes a connector region (20) for attachment to an external electrical source and a mounting region (20) for mounting sockets (26) for supporting, powering and monitoring the electronic devices during elevated temperature testing.

Description

Title: METHOD AND DEVICE FOR TESTING ELECTRONIC DEVICES

Related Applications

This application claims the benefit of provisional application no. 60/299632 filed

June 20, 2001.

Field Of The Invention

5 The present invention concerns an electronic circuit board for use in the high

temperature testing of electronic devices and a method for conducting such tests. Such

boards are commonly referred to as burn-in boards. The circuit board of the present

invention comprises a base made of steel which is coated with a dielectric layer.

Background Of The Invention

l o The high temperature testing of electronic circuit devices is commonly employed

in the semiconductor or microelectronic device manufacturing industries. Such tests are

utilized in the burn-in, TDDB (time dependent dielectric breakdown) and the

electromigration testing of semiconductor devices or chips.

Burn-in testing comprises the application of thermal and electrical stresses for the

15 purposes of inducing the failure of marginal microelectronic devices having inherent

defects resulting from manufacturing aberrations which cause time and stress dependent

failures. TDDB testing concerns monitoring a device for diminished electric properties

during heating. Electromigration in thin metal lines can cause chip failures with the

formation of voids, or gaps, in interconnects. The potential for electromigration failures

20 is a more significant issue in standard aluminum metal interconnects as chip makers attempt to reduce resistance using thinner wires. Copper metal interconnects are more

resistant to electromigration. However, migration is still a concern and this concern has

resulted in the need for testing procedures at elevated temperatures. These various

elevated temperature tests are run both for the end-run qualification of chips and also for

5 chip developmental purposes. These tests can also be run as a quality control test for

incoming electronic devices or chips.

During all elevated temperature testing procedures, the electronic devices are

loaded into sockets which make temporary electrical contact with the device leads. The

sockets are mounted on high temperature circuit boards with circuitry to provide the

l o proper voltages and electric stimuli to the devices. These circuit boards, which are used

in electromigration, TDDB and burn-in testing, are commonly referred to as "bum-in

boards." Once the boards are filled with devices, the boards are then loaded into a

heating device, such as a convection oven, which in addition to supplying heat also

provides an electrical interconnect between the boards and the power supplies and signal

15 generators used to power the electronic devices during heating. During heating, the

electrical characteristics of the electronic devices are continually monitored, logged and

made available for analysis. The oven, power supplies and signal generators are

commonly referred to as the burn-in system.

In the prior art, many burn-in boards were constructed of phenolic/epoxy

0 materials. However, such boards present a major drawback. Specifically, such boards

degrade quickly at elevated temperatures (e.g., temperatures in excess of about 180°C).

Ceramic substrates are employed for tests run at elevated temperatures (e.g., 300°C), however, ceramic substrates are costly and they must be limited in size, for they are

somewhat fragile. Accordingly, there is a need for a robust high-temperature burn-in

board which displays excellent electrical properties that can be produced at a reasonable

cost.

Summary Of The Invention

The present invention provides a new and improved electronic circuit board or

burn-in board for use in testing semiconductor chips or other electronic devices at

elevated temperature and a method for conducting such tests. The burn-in board is

extremely robust and it can be produced at a reasonable cost. Of course, leakage current

is a function of board geometry, circuit area and operating temperature. However, burn-

in boards generally display a surface area of 70 or more square inches per side, with about

10%-20% of each side printed with circuitry.

In one preferred embodiment the burn-in board comprises a decarburized steel

base having a dielectric coating formed thereon. Formed on the dielectric coating is an

electrical circuit. The circuit includes a connector region for facilitating attachment to

an external electrical source and a mounting region for mounting sockets for supporting

and supplying current to the electronic devices during heating. In one preferred

embodiment, the board displays a leakage current of less than lOμ Amps at 350°C.

Among those benefits and improvements that have been disclosed, other objects

and advantages of this invention will become apparent from the following description

taken in conjunction with the accompanying drawings. The drawings constitute a part of this specification and include exemplary embodiments of the present invention and

illustrate various objects and features thereof.

Brief Description Of The Drawings

In the annexed drawings:

5 Figure 1 is a top view of a burn-in board made in accordance with the present

invention having no sockets mounted thereon;

Figure 2 is a top view of the burn-in board of Figure 1 with sockets mounted

thereon;

Figure 3 is a schematic side view of the burn-in board of Figure 2;

l o Figure 4 is a schematic broken-away cross-sectional view of a portion of a burn-in

board made in accordance with the present invention; and

Figure 5 is a schematic broken-away cross-sectional view of a portion of another

embodiment of a burn-in board made in accordance with the present invention.

Detailed Description

15 Referring to the drawings, and initially to Figures 1-3, there is illustrated a burn-in

board or electronic circuit board 10 made in accordance with the present invention. In

all of the drawings, the same reference numerals are used to identify similar elements.

Board 10 comprises a metal base 12 coated along its top and bottom surfaces with a

dielectric coating 14. The dielectric coating 14 in this preferred embodiment comprises

20 two (2) discrete layers of porcelain enamel. However, it will be appreciated that the

invention also contemplates the use of a single homogeneous layer of dielectric coating material. As discussed below, the dielectric coating 14 may be formed in a variety of

manners.

Board 10 includes along its top surface 16 an electrical circuit 18 formed by use

of a thick film conductor material. Circuit 18 includes a connector region 20 and a

mounting region 22. The front end 24 of connector region 20 is where the board is

plugged into an electrical receptacle located in the heating device or oven wherein the

board 10 is intended to be utilized. The mounting region 22 is the portion of the board

wherein the sockets 26 for supporting the electronic devices 27 that are being tested are

located. Sockets 26 may comprise one of a variety of commercially available sockets for

supporting electronic devices, such as, semiconductor chips, for testing. In addition to

providing mounting support, sockets 26, provide an electrical connection between the

circuit 18 and the devices 27.

Referring now to Figure 4, there is schematically illustrated a broken-away cross-

sectional view of a burn- in board 10 made in accordance with the present invention. As

shown, board 10 includes the metal base 12, and the dielectric coating or material layer

14. On top surface 16 of dielectric layer 14 is the electronic circuit or circuit trace 18.

As illustrated, dielectric layer 14 is formed from two discrete layers 28 and 29 of

dielectric material. Layers 28 and 29 are formed from different material systems, and

thus they are nonhomogeneous. Base or substrate 12 may comprise any one of a variety

of high temperature firing metal materials. Examples of such materials include

decarburized steel or stainless steel and it will be appreciated that the base may be coated

on all sides or just one side depending upon circuit requirements. Metal substrates coated with a dielectric layer of electronic grade porcelain enamel along all sides of the metal

base are commercially available under the trade designation ELPOR from the ECA

Electronics Company located in Erie, Pennsylvania. Coated substrates are commercially

available from ECA Electronics made with either low carbon steel or various grades of

stainless steel. Applicants hereby incorporate by reference U.S. Patent No. 6, 195,881B1;

Lim et al., U.S. Patent No. 5,002,903; Ohmura et al., U.S. Patent No. 4,361,654; Kaup

et al., U.S. PatentNo. 3,935,088; Moritsu etal., U.S. PatentNo. 4,172,733; Van derVliet,

U.S. Patent No. 4,085,021 ; Hang et al., U.S. Patent No. 4,256,796; Andrus et al., U.S.

Patent No. 4,358,541 ; Chyung, U.S. Patent No. 4,385,127; Gazo et al. U.S. Patent No.

3,841,986 and Hughes U.S. PatentNo. 3,575,838 for their teachings as to howto produce

metal substrates coated with a dielectric layer.

For certain test applications, a test board may be required that provides a

maximum leakage current of lOμ Amps at 350°C. In such applications, a dielectric

coating 14 formed from multiple dielectric layers 28 and 29 of nonhomogeneous

materials is required. Such multilayer boards may be formed by taking a porcelain

enamel metal coated substrate available from ECA Electronics Company under the trade

designation ELPOR and coating it with a high performance electronic grade porcelain

enamel coating material available from the Ferro Corporation of Cleveland, Ohio, under

the trade designation QP-330. The ECA substrate with its enamel coating provides

bottom dielectric layer 29 and the QP-330 material provides top layer 28. QP-330 is

applied wet to the ECA porcelain coated substrates and then fired at about 800°C. The

QP-330 material may either be applied by dipping or screen printing to a thickness of about .002" (after firing). One to three layers of the QP-330 material may be applied

successfully to the ECA porcelain coated substrates. Applicants have found that the use

of multiple layers of the QP-330 leads to improved breakdown current properties.

As shown in Figure 4, an encapsulant layer 40 may be applied over the conductive

circuit 10 to add further protection. A suitable encapsulant layer may be formed using

a glass encapsulant sold by the Ferro Corporation of Cleveland, Ohio, under the trade

designation A-3565. The glass encapsulant serves to prevent particulate migration

between individual circuit traces. The encapsulant may be applied, for example, by

screen printing directly on the thick film materials and the top surface of the dielectric

layer and then the entire board may be fired at a temperature of about 625°C.

Test boards that display further improved electrical properties may also be

produced by forming a dielectric coating using multiple discrete homogeneous layers of

commercially available thick film dielectric materials intended for use on metal

substrates. Such boards display a maximum leakage current of l μ Amp at 350°C.

Examples of such materials include a thick film material available from Electro-Science

Laboratories, Inc. of King of Prussia, Pennsylvania, under the trade designation 4924,

thick film materials available from DuPont of Wilmington, Delaware, under the trade

designation 3500N and thick film materials available from Heraeus of West

Conshohocken, Pennsylvania, under the trade designation IP-222. These commercially

available materials are preferably applied to 430 stainless steel. These materials are

intended for use in making thick film heaters, but applicants have unexpectedly found

them suitable for use in the present invention. The thick film dielectric materials are applied in multiple layers upon the metal

substrate and then they are fired at a temperature of about 850°C. Prior to application of

the dielectric materials the stainless steel surface is thoroughly cleaned. The layers are

preferably applied by screen printing. However, other application techniques such as

spraying could be utilized. Each applied layer is dried prior to application of the

subsequent layer. Referring to Figure 5 there is illustrated a substrate 12 having multiple

layers of dielectric material 42, 44, 46 screen printed upon substrate 12. Burn-in boards

made using three layers of the 4924 thick film material at a total thickness after firing per

side of about .006" display a maximum leakage current of l μ Amps at 350°C.

Electrical circuit 18 may be formed in a conventional manner using a suitable

commercially available conductive thick film or combination of commercially available

thick films. The thick films are applied to the top of the dielectric layer using

conventional application techniques, such as, for example, screen printing. Examples of

other possible, but generally less desirable application techniques other than screen

printing include, for example, spraying, dipping, spinning, brushing and application using

a doctor blade. An example of a suitable thick film for use in the present invention is a

gold thick film available from Electro-Science Laboratories, Inc. under the trade

designation 8835. It will be appreciated that a multilayer circuit structure may be

formed by applying a dielectric thick film layer over the conductive layer. After firing

the dielectric layer may form as a base for printing an additional circuit using conductive

thick film materials. The circuit boards 10 of the present invention allow for a method of high

temperature testing of electronic devices such as, semiconductor chips, at elevated temperatures, such as from about 200°C to about 500°C, or preferably from about 350°C

to about 500°C. During testing, while at elevated temperature, controlled electric current

or signals are supplied to the devices under test, and the performance properties of such

devices are tracked.

Although the invention has been shown and described with respect to preferred

embodiments, it is obvious that equivalent alterations and modifications will occur to

others skilled in the art upon reading and understanding the specification. The present

invention includes all such equivalent alterations and modifications, and is limited only

by the scope of the following claims.

Claims

What Is Claimed Is:

1. A burn-in board for use in testing semiconductor chips at elevated

temperatures comprising a steel base having a dielectric coating formed thereon, said

dielectric coating having a circuit formed thereon, said circuit having a connector region

for attachment to an external electrical source and a mounting region for mounting

sockets for supporting said chips.

2. A burn-in board as set forth in claim 1 wherein said dielectric coating

comprises multiple discrete layers of dielectric material.

3. A burn-in board as set forth in claim 1 wherein said dielectric coating

comprises two discrete layers of dielectric material.

4. A burn-in board as set forth in claim 1 wherein said dielectric coating

comprises a first layer of porcelain enamel and a second layer of high-performance

porcelain enamel.

5. A burn-in board as set forth in claim 4 wherein said first and second layers

of enamel are nonhomogeneous.

6. A burn-in board as set forth in claim 1 wherein said dielectric coating

comprises at least three discrete layers of dielectric material.

7. A burn-in board as set forth in claim 6 wherein said discrete layers are

homogeneous.

8. A burn-in board as set forth in claim 7 wherein said burn- in board displays

a leakage current of less than lOμ Amps at 350°C.

9. A burn- in board as set forth in claim 7 wherein said burn-in board displays

a leakage current of less than l μ Amps at 350°C.

10. A burn-in board as set forth in claim 1 wherein said base comprises

stainless steel.

11. A method of conducting the high temperature testing of an electronic

device comprising the steps of:

(i) providing an electronic circuit board for supporting and supplying

current to the device to be tested, said electronic circuit board comprising a steel

base coated with a dielectric material coating;

(ii) providing electric current to the electronic circuit board; and

(iii) heating the electronic circuit board to a temperature of from about

200°C to about 500°C.

12. A method as set forth in claim 1 1 wherein said steel base comprises

stainless steel.

13. A method as set forth in claim 1 1 wherein said electronic circuit board

includes a connector region for attachment to an external electrical source and a mounting

region having sockets for supporting said electronic device.

14. A method as set forth in claim 11 including the step (iv) of monitoring the

electrical characteristics of said electronic device during heating.

15. A method as set forth in claim 11 wherein said dielectric material coating

comprises multiple discrete layers of dielectric material, and said electronic circuit board

displays a leakage current of less than lOμ Amps at 350°C.

16. A method as set forth in claim 11 wherein said electronic circuit board

displays a leakage current of less than lμ Amps at 350°C.

17. An electronic device made by the method of claim 11.