WO2002089312A3 - Frequency conversion by undersampling - Google Patents

Frequency conversion by undersampling Download PDF

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Publication number
WO2002089312A3
WO2002089312A3 PCT/US2002/013786 US0213786W WO02089312A3 WO 2002089312 A3 WO2002089312 A3 WO 2002089312A3 US 0213786 W US0213786 W US 0213786W WO 02089312 A3 WO02089312 A3 WO 02089312A3
Authority
WO
WIPO (PCT)
Prior art keywords
signal
amplifier
downconverted
digitizer
filtered
Prior art date
Application number
PCT/US2002/013786
Other languages
French (fr)
Other versions
WO2002089312A2 (en
Inventor
Hans A Troemel Jr
Original Assignee
Matsushita Comm Ind Corp Ofu S
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Comm Ind Corp Ofu S filed Critical Matsushita Comm Ind Corp Ofu S
Priority to EP02734120A priority Critical patent/EP1384314B1/en
Priority to AT02734120T priority patent/ATE543260T1/en
Priority to AU2002305309A priority patent/AU2002305309A1/en
Priority to JP2002586486A priority patent/JP4287152B2/en
Priority to KR1020037014196A priority patent/KR100888300B1/en
Publication of WO2002089312A2 publication Critical patent/WO2002089312A2/en
Publication of WO2002089312A3 publication Critical patent/WO2002089312A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
    • H03D3/24—Modifications of demodulators to reject or remove amplitude variations by means of locked-in oscillator circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00—Continuous tuning
    • H03J3/02—Details
    • H03J3/06—Arrangements for obtaining constant bandwidth or gain throughout tuning range or ranges
    • H03J3/08—Arrangements for obtaining constant bandwidth or gain throughout tuning range or ranges by varying a second parameter simultaneously with the tuning, e.g. coupling bandpass filter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
    • H03D3/007—Demodulation of angle-, frequency- or phase- modulated oscillations by converting the oscillations into two quadrature related signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
    • H03M1/181—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values
    • H03M1/183—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values the feedback signal controlling the gain of an amplifier or attenuator preceding the analogue/digital converter
    • H03M1/185—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values the feedback signal controlling the gain of an amplifier or attenuator preceding the analogue/digital converter the determination of the range being based on more than one digital output value, e.g. on a running average, a power estimation or the rate of change

Abstract

An input signal (IN) is filtered (605) to remove aliases and a switched capacitor network (610) undersamples this signal to provide a downconverted, near-baseband signal. An amplifier (615) adjusts the amplitude of this signal to match a digitizer (620). The digitized output is converted into first phase and second phase signals which are then filtered (640) and decimated (645) to further reduce the sampling rate. The downconverted first an second phase signals, rather than higher frequency signals, control the gain function (AGC) for the amplifier (615). The switched capacitor network (610) provides for both tuning and downconversion of the desired signal to a lower frequency for further processing, thus reducing the frequency and power requirements of an associated amplifier and analog-to-digital converter (digitizer).
PCT/US2002/013786 2001-05-01 2002-05-01 Frequency conversion by undersampling WO2002089312A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP02734120A EP1384314B1 (en) 2001-05-01 2002-05-01 Frequency conversion by undersampling
AT02734120T ATE543260T1 (en) 2001-05-01 2002-05-01 FREQUENCY CONVERTER USING SUB-SAMPLING
AU2002305309A AU2002305309A1 (en) 2001-05-01 2002-05-01 Frequency conversion by undersampling
JP2002586486A JP4287152B2 (en) 2001-05-01 2002-05-01 Switched capacitor network for frequency regulation and frequency down-conversion
KR1020037014196A KR100888300B1 (en) 2001-05-01 2002-05-01 Frequency conversion by undersampling

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US28786101P 2001-05-01 2001-05-01
US60/287,861 2001-05-01

Publications (2)

Publication Number Publication Date
WO2002089312A2 WO2002089312A2 (en) 2002-11-07
WO2002089312A3 true WO2002089312A3 (en) 2003-11-27

Family

ID=23104674

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/013786 WO2002089312A2 (en) 2001-05-01 2002-05-01 Frequency conversion by undersampling

Country Status (8)

Country Link
US (1) US7477706B2 (en)
EP (1) EP1384314B1 (en)
JP (2) JP4287152B2 (en)
KR (2) KR100888300B1 (en)
CN (1) CN1513226A (en)
AT (1) ATE543260T1 (en)
AU (1) AU2002305309A1 (en)
WO (1) WO2002089312A2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1259002B1 (en) * 2001-05-14 2004-01-14 Sony International (Europe) GmbH Stereo demultiplexer
FR2824986B1 (en) * 2001-05-18 2003-10-31 St Microelectronics Sa ELECTRONIC COMPONENT FOR THE DECODING OF A RADIO FREQUENCY TRANSMISSION CHANNEL CARRYING ENCODED DIGITAL INFORMATION, PARTICULARLY FOR DIGITAL SATELLITE BROADCASTING
US7672659B2 (en) * 2002-04-04 2010-03-02 Telefonaktiebolaget L M Ericsson (Publ) Mixer with feedback
US7015850B2 (en) * 2003-08-29 2006-03-21 Texas Instruments Incorporated Bandwidth limited sampling circuit of high linearity
JP4168393B2 (en) * 2003-09-05 2008-10-22 日本電気株式会社 AGC control method for radio communication mobile station
JP3625470B1 (en) * 2003-09-30 2005-03-02 キヤノン株式会社 Process cartridge and electrophotographic image forming apparatus
US7403584B2 (en) * 2003-12-31 2008-07-22 Intel Corporation Programmable phase interpolator adjustment for ideal data eye sampling
DE102004025472A1 (en) * 2004-05-21 2005-12-15 Micronas Gmbh Method or data processing device for processing digital data of a signal
JP2008514135A (en) * 2004-09-20 2008-05-01 パナソニック オートモーティブ システムズ カンパニー オブ アメリカ ディビジョン オブ パナソニック コーポレイション オブ ノース アメリカ Apparatus having a distributed architecture for receiving and / or transmitting radio frequency signals and method for implementing the distributed architecture
JP4501679B2 (en) * 2004-12-24 2010-07-14 Ｋｄｄｉ株式会社 Method and program for determining sampling frequency in undersampling
US9172404B1 (en) * 2005-02-07 2015-10-27 Rf Micro Devices, Inc. Switch architecture for TDMA and FDD multiplexing
DE602005010574D1 (en) * 2005-08-12 2008-12-04 St Microelectronics Belgium Nv Receiver with two-stage compensation of the frequency shift for an M-stage phase-modulated signal
JP4616226B2 (en) * 2006-09-15 2011-01-19 Ｏｋｉセミコンダクタ株式会社 Receiver circuit
JP2008154121A (en) * 2006-12-20 2008-07-03 Sony Corp Radio communication device
JP2010011336A (en) * 2008-06-30 2010-01-14 Advantest Corp Signal output device, signal output control method, program, and recording medium
US7978113B2 (en) * 2009-09-10 2011-07-12 National Semiconductor Corporation Analog-to-digital converter having output data with reduced bit-width and related system and method
CN101841301B (en) * 2010-05-28 2012-07-04 常州市同惠电子有限公司 Undersampling mixer circuit
KR101213130B1 (en) * 2011-03-04 2013-01-21 삼성탈레스 주식회사 Demodulator and programmable down converter
US9184771B2 (en) 2011-10-12 2015-11-10 Optis Cellular Technology, Llc Digital down conversion and demodulation
US10326957B2 (en) * 2016-12-05 2019-06-18 Tech Idea Co., Ltd. A/D converter and sensor device using the same
US11569856B2 (en) 2020-12-07 2023-01-31 Electronics And Telecommunications Research Institute Method and apparatus for receiving periodic band-limited signal

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888557A (en) * 1989-04-10 1989-12-19 General Electric Company Digital subharmonic sampling down-converter
WO1994005087A1 (en) * 1992-08-25 1994-03-03 Wireless Access, Inc. A direct conversion receiver for multiple protocols
DE19523433A1 (en) * 1995-06-28 1997-01-09 Telefunken Microelectron Frequency conversion circuit - has switched capacitor low pass filter with clock frequency dependent corner frequency and several conversion frequency bands with clock frequency as filter centre frequency and twice cut=off frequency as filter bandwidth
US5640698A (en) * 1995-06-06 1997-06-17 Stanford University Radio frequency signal reception using frequency shifting by discrete-time sub-sampling down-conversion
EP0878903A2 (en) * 1997-05-13 1998-11-18 Matsushita Electric Industrial Co., Ltd. Radio receiving system
US5955783A (en) * 1997-06-18 1999-09-21 Lsi Logic Corporation High frequency signal processing chip having signal pins distributed to minimize signal interference
US6005506A (en) * 1997-12-09 1999-12-21 Qualcomm, Incorporated Receiver with sigma-delta analog-to-digital converter for sampling a received signal

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972436A (en) * 1988-10-14 1990-11-20 Hayes Microcomputer Products, Inc. High performance sigma delta based analog modem front end
JP2868933B2 (en) * 1991-08-07 1999-03-10 ローム株式会社 Frequency converter
US5222144A (en) * 1991-10-28 1993-06-22 Ford Motor Company Digital quadrature radio receiver with two-step processing
US5490173A (en) 1993-07-02 1996-02-06 Ford Motor Company Multi-stage digital RF translator
FR2707815B1 (en) * 1993-07-13 1995-08-25 Alcatel Mobile Comm France Analog to digital converter with modulated feedback loop.
JPH09191264A (en) 1996-01-08 1997-07-22 Mitsubishi Electric Corp Transmitter-receiver, receiver, communication system and reception section evaluation device
US6026129A (en) * 1996-03-27 2000-02-15 Matsushita Electric Industrial Co., Ltd. Radio receiving apparatus for receiving communication signals of different bandwidths
JP3392670B2 (en) 1996-11-28 2003-03-31 株式会社東芝 Sampling device
US6148048A (en) * 1997-09-26 2000-11-14 Cirrus Logic, Inc. Receive path implementation for an intermediate frequency transceiver
US6295324B1 (en) * 1997-12-10 2001-09-25 Visteon Global Technologies, Inc. Signal quality measurement using full-complex FM detector
US6347123B1 (en) * 1998-07-10 2002-02-12 Qualcomm Incorporated Low-current sample rate converter
AU3928000A (en) 1999-03-31 2000-10-16 Sony Electronics Inc. Electronic device having a reversible display
US6369857B1 (en) * 1999-05-13 2002-04-09 Sarnoff Corporation Receiver for analog and digital television signals
DE60001960T2 (en) * 1999-05-24 2003-11-13 Level One Communications Inc AUTOMATIC GAIN CONTROL AND OFFSET CORRECTION
US6535560B1 (en) * 1999-06-03 2003-03-18 Ditrans Corporation Coherent adaptive calibration system and method
KR100680075B1 (en) * 1999-09-13 2007-02-09 유티스타콤코리아 유한회사 Apparatus for controlling inter-FA power level in apparatus for recieving radio frequency of a mobile communication system
DE60030932T2 (en) * 1999-10-20 2007-06-21 Koninklijke Philips Electronics N.V. Search for the optimal sampling time in a TDMA packet transmission system
MY130364A (en) * 2000-05-15 2007-06-29 Matsushita Electric Ind Co Ltd Digital demodulation apparatus
WO2002015384A1 (en) * 2000-08-11 2002-02-21 Novatel Wireless, Inc. Method and apparatus for a frequency agile variable bandwidth transceiver
US7110732B2 (en) * 2001-04-09 2006-09-19 Texas Instruments Incorporated Subsampling RF receiver architecture

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888557A (en) * 1989-04-10 1989-12-19 General Electric Company Digital subharmonic sampling down-converter
WO1994005087A1 (en) * 1992-08-25 1994-03-03 Wireless Access, Inc. A direct conversion receiver for multiple protocols
US5640698A (en) * 1995-06-06 1997-06-17 Stanford University Radio frequency signal reception using frequency shifting by discrete-time sub-sampling down-conversion
DE19523433A1 (en) * 1995-06-28 1997-01-09 Telefunken Microelectron Frequency conversion circuit - has switched capacitor low pass filter with clock frequency dependent corner frequency and several conversion frequency bands with clock frequency as filter centre frequency and twice cut=off frequency as filter bandwidth
EP0878903A2 (en) * 1997-05-13 1998-11-18 Matsushita Electric Industrial Co., Ltd. Radio receiving system
US5955783A (en) * 1997-06-18 1999-09-21 Lsi Logic Corporation High frequency signal processing chip having signal pins distributed to minimize signal interference
US6005506A (en) * 1997-12-09 1999-12-21 Qualcomm, Incorporated Receiver with sigma-delta analog-to-digital converter for sampling a received signal

Also Published As

Publication number Publication date
KR100913862B1 (en) 2009-08-26
JP2009027728A (en) 2009-02-05
WO2002089312A2 (en) 2002-11-07
KR100888300B1 (en) 2009-03-11
KR20080083371A (en) 2008-09-17
JP4750833B2 (en) 2011-08-17
JP4287152B2 (en) 2009-07-01
CN1513226A (en) 2004-07-14
EP1384314B1 (en) 2012-01-25
JP2004531132A (en) 2004-10-07
AU2002305309A1 (en) 2002-11-11
US20020163981A1 (en) 2002-11-07
KR20040007521A (en) 2004-01-24
EP1384314A2 (en) 2004-01-28
US7477706B2 (en) 2009-01-13
ATE543260T1 (en) 2012-02-15

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