WO2002041365A2 - Single crystalline oxide on a semiconductor substrate - Google Patents

Single crystalline oxide on a semiconductor substrate Download PDF

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Publication number
WO2002041365A2
WO2002041365A2 PCT/US2001/045570 US0145570W WO0241365A2 WO 2002041365 A2 WO2002041365 A2 WO 2002041365A2 US 0145570 W US0145570 W US 0145570W WO 0241365 A2 WO0241365 A2 WO 0241365A2
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WO
WIPO (PCT)
Prior art keywords
semiconductor substrate
single crystalline
introducing
forming single
crystalline oxides
Prior art date
Application number
PCT/US2001/045570
Other languages
French (fr)
Other versions
WO2002041365A3 (en
Inventor
Zhiyi Yu
Corey Daniel Overgaard
Ravindranath Droopad
Jerald A. Hallmark
William J. Ooms
Original Assignee
Motorola, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola, Inc. filed Critical Motorola, Inc.
Priority to AU2002228719A priority Critical patent/AU2002228719A1/en
Publication of WO2002041365A2 publication Critical patent/WO2002041365A2/en
Publication of WO2002041365A3 publication Critical patent/WO2002041365A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02244Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Definitions

  • This invention relates to a method for forming single crystal oxides.
  • the present invention relates to apparatus and method for forming single crystal oxides on semiconductor substrates.
  • gate oxides are used in field effect transistors (FETs) to separate a gate terminal or contact from the gate area within the transistor.
  • FETs field effect transistors
  • DRAMs dynamic random access memory
  • FeRAMs magnetic RAM
  • SOls field effect transistors
  • a major problem with using oxygen molecules (O2) to form an oxide directly on a semiconductor substrate is that the oxidation generally proceeds very fast so that some oxidation and other damage of the substrate occurs. Oxidation or any other alterations occurring in the semiconductor substrate will very radically affect any semiconductor devices formed in the substrate.
  • single crystalline BaO and (Ba, Sr)0 thin oxide layers have been grown on a cubic BaS.2 or (Ba, Sr) S.2 template on a Si substrate using oxygen molecules (O2) by MBE techniques. While this procedure provides some protection for the semiconductor substrate, it does not result in the oxide being formed directly on the semiconductor substrate.
  • FIGS. 1 through 3 are simplified sectional views of sequential steps in a method of forming single crystalline oxide on the surface of a semiconductor substrate in accordance with the present invention.
  • FIG. 1 a simplified sectional view of a semiconductor substrate 10 having a surface 11 is illustrated.
  • Semiconductor substrate 10 includes any of the well known semiconductor materials, such as silicon, germanium, etc. or any of the compound semiconductor materials.
  • substrate 10 is silicon.
  • surface 11 is a clean surface with no oxidation or other foreign materials thereon.
  • Semiconductor substrate 10 is placed in an epitaxial chamber, such as a molecular beam epitaxy (MBE) chamber at a base pressure generally in a low 10" 10 Torr range.
  • a metal from group II of the periodic table (hereinafter a II metal) is chosen for an oxide formation.
  • the metal is barium, barium, strontium, or some combination including one of these metals.
  • a very thin layer 12 of the II metal is deposited on surface 11 of semiconductor substrate 10, as illustrated in FIG. 2.
  • the thickness of layer 12 will be in a range of 1 to 5 monolayers of the II metal.
  • barium and strontium beams can be generated from resistively heated effusion cells.
  • Layer 12 is formed with a thickness at least sufficient to passivate the material (i.e., terminate all loose bqnds or links) and protect surface 11 from oxygen introduced into the epitaxial chamber.
  • the alternative oxidation agent is a material other than molecular oxygen (O2), such as one of pure H2O, NO, and N2O, including activated species, such as a plasma of any of these oxidation agents.
  • the alternative oxidation agent is introduced into the epitaxial chamber at a partial vapor pressure and at a temperature high enough to enhance the formation of the II metal in layer 12 into an oxide and to prevent unwanted by- product formation, such as hydroxides of the II metal. Also, the temperature should be low enough to prevent unwanted metal-semiconductor interactions and interdiffusion of the II metal into semiconductor substrate 10.
  • a controlled amount of the alternative oxidation agent is introduced into the epitaxial chamber through a leak valve, or other convenient device, at a partial vapor pressure in a range of approximately 10 -8 Torr to 10 -5 Torr and at a temperature in a range of approximately 300°C to 800°C.
  • the alternative oxidation agent may be introduced in pulses or continuously.
  • additional molecular II metal can be introduced into the epitaxial chamber with the alternative oxidation agent.
  • RHEED reflection high energy electron diffraction
  • a silicon substrate is provided and introduced into an
  • two slightly different embodiments or methods can be used.
  • sufficient II metal is initially deposited in the semiconductor surface to passivate the surface, this is generally a sub-monolayer to a monolayer of material.
  • additional II metal is deposited to increase the thickness of layer 12 to 1 to 5 monolayers.
  • the controlled amount of alternative oxidation agent is then introduced, as described above, to oxidize layer 12.
  • additional II metal oxide can be added if desired by simultaneously introducing the II metal and the oxidation agent.
  • molecular II metal and the oxidation agent are introduced simultaneously to grow the II metal oxide layer 14 to the desired thickness.
  • a new and improved method of growing single crystalline oxide layers lattice-matched on semiconductor substrates is disclosed.
  • the new method prevents the formation of unwanted by-products, such as hydroxides of the II metal.
  • the new method prevents unwanted metal-semiconductor interactions and interdiffusion of the II metal into a semiconductor substrate.
  • the new method is simple and can be used in an MBE chamber during normal processing procedures.

Abstract

A method of forming single crystalline oxides on the surface of a semiconductor substrate includes placing the semiconductor substrate (10) in a vacuum chamber and depositing a thin layer of material (12) including a II metal on the surface (11). At a minimum the layer is thick enough to passivate the surface. An alternative oxidation agent is introduced into the chamber at a partial vapor pressure and at a temperature so as to form a layer (14) of single crystal oxide from the thin layer of material with the layer of single crystal oxide lattice matched to the semiconductor substrate. The surface is monitored by reflection high energy electron diffraction (RHEED) during the oxide growth. In a preferred embodiment single crystal BaO or (Ba,Sr)O is grown on and lattice matched to a silicon substrate.

Description

SINGLE CRYSTALLINE OXIDE ON A SEMICONDUCTOR SUBSTRATE ,
Field of the Invention
This invention relates to a method for forming single crystal oxides.
More particularly, the present invention relates to apparatus and method for forming single crystal oxides on semiconductor substrates.
Background of the Invention
In the fabrication of various semiconductor devices there is generally a need for layers of oxide as insulating layers. As a typical example, gate oxides are used in field effect transistors (FETs) to separate a gate terminal or contact from the gate area within the transistor. For high density arrays of devices, such as DRAMs, FeRAMs, SOls, and the like, it is highly desirable to grow single crystalline oxides directly on the semiconductor substrate. However, this procedure is very difficult to achieve.
A major problem with using oxygen molecules (O2) to form an oxide directly on a semiconductor substrate is that the oxidation generally proceeds very fast so that some oxidation and other damage of the substrate occurs. Oxidation or any other alterations occurring in the semiconductor substrate will very radically affect any semiconductor devices formed in the substrate. In the prior art, single crystalline BaO and (Ba, Sr)0 thin oxide layers have been grown on a cubic BaS.2 or (Ba, Sr) S.2 template on a Si substrate using oxygen molecules (O2) by MBE techniques. While this procedure provides some protection for the semiconductor substrate, it does not result in the oxide being formed directly on the semiconductor substrate.
Accordingly it is highly desirable to provide a method of forming single crystalline oxide directly on the surface of a semiconductor substrate. It is an object of the present invention to provide a method of forming single crystalline oxide on the surface of a semiconductor substrate.
It is another object of the present invention to provide a method of forming single crystalline oxide on the surface of a semiconductor substrate which does not damage the substrate and which is inexpensive and easy to use.
Brief Description of the Drawings
Referring to the drawings, FIGS. 1 through 3 are simplified sectional views of sequential steps in a method of forming single crystalline oxide on the surface of a semiconductor substrate in accordance with the present invention.
Description of the Preferred Embodiment
Turning now to FIG. 1 , a simplified sectional view of a semiconductor substrate 10 having a surface 11 is illustrated. Semiconductor substrate 10 includes any of the well known semiconductor materials, such as silicon, germanium, etc. or any of the compound semiconductor materials. In the preferred embodiment substrate 10 is silicon. Also, surface 11 is a clean surface with no oxidation or other foreign materials thereon.
Semiconductor substrate 10 is placed in an epitaxial chamber, such as a molecular beam epitaxy (MBE) chamber at a base pressure generally in a low 10"10 Torr range. A metal from group II of the periodic table (hereinafter a II metal) is chosen for an oxide formation. Preferably, the metal is barium, barium, strontium, or some combination including one of these metals. A very thin layer 12 of the II metal is deposited on surface 11 of semiconductor substrate 10, as illustrated in FIG. 2. Generally, the thickness of layer 12 will be in a range of 1 to 5 monolayers of the II metal. In a specific example, barium and strontium beams can be generated from resistively heated effusion cells. Layer 12 is formed with a thickness at least sufficient to passivate the material (i.e., terminate all loose bqnds or links) and protect surface 11 from oxygen introduced into the epitaxial chamber.
With layer 12 in place on surface 11 , a controlled amount of alternative oxidation agent is introduced into the chamber. Generally, the alternative oxidation agent is a material other than molecular oxygen (O2), such as one of pure H2O, NO, and N2O, including activated species, such as a plasma of any of these oxidation agents. The alternative oxidation agent is introduced into the epitaxial chamber at a partial vapor pressure and at a temperature high enough to enhance the formation of the II metal in layer 12 into an oxide and to prevent unwanted by- product formation, such as hydroxides of the II metal. Also, the temperature should be low enough to prevent unwanted metal-semiconductor interactions and interdiffusion of the II metal into semiconductor substrate 10. Generally, a controlled amount of the alternative oxidation agent is introduced into the epitaxial chamber through a leak valve, or other convenient device, at a partial vapor pressure in a range of approximately 10-8 Torr to 10-5 Torr and at a temperature in a range of approximately 300°C to 800°C. The alternative oxidation agent may be introduced in pulses or continuously.
Depending upon the thickness of the II metal layer 12, and the desired thickness of the final II metal oxide layer 14, additional molecular II metal can be introduced into the epitaxial chamber with the alternative oxidation agent.
Generally, sufficient amounts of the alternative oxidation agent are introduced to completely oxidize layer 12 and then a combination of alternative oxidation agent and molecular II metal is introduced to grow layer 14 to the desired thickness.
During the oxide growth step, the surface of the formation on semiconductor substrate 10 is monitored continuously by reflection high energy electron diffraction (RHEED). Generally, a streaky (1x1) RHEED pattern represents a single crystalline surface of a II metal oxide closely lattice-matched to semiconductor substrate 10. The result is a single crystalline layer 14 of II metal oxide formed on surface 11 of semiconductor substrate 10 and lattice-matched to the semiconductor material,, as illustrated in FIG. 3.
In a specific example, a silicon substrate is provided and introduced into an
MBE chamber. 1 to 5 monolayers of barium are deposited on the surface of the silicon substrate at a base pressure in the low 10_ ° Torr. A controlled amount of ultra-pure H2O is introduced into the epitaxial chamber through a leak valve at a partial vapor pressure in a range of approximately 10-8 Torr to 10-5 Torr and at a temperature in a range of approximately 300°C to 800°C. A single crystalline layer of BaO is grown on the surface of the silicon substrate and lattice-matched to the silicon.
Basically, two slightly different embodiments or methods can be used. In each method, sufficient II metal is initially deposited in the semiconductor surface to passivate the surface, this is generally a sub-monolayer to a monolayer of material. In one method additional II metal is deposited to increase the thickness of layer 12 to 1 to 5 monolayers. The controlled amount of alternative oxidation agent is then introduced, as described above, to oxidize layer 12. In this method, additional II metal oxide can be added if desired by simultaneously introducing the II metal and the oxidation agent. In another method, after the deposition of the sub-monolayer to one monolayer, molecular II metal and the oxidation agent are introduced simultaneously to grow the II metal oxide layer 14 to the desired thickness.
Thus, a new and improved method of growing single crystalline oxide layers lattice-matched on semiconductor substrates is disclosed. The new method prevents the formation of unwanted by-products, such as hydroxides of the II metal. Also, the new method prevents unwanted metal-semiconductor interactions and interdiffusion of the II metal into a semiconductor substrate. Further, the new method is simple and can be used in an MBE chamber during normal processing procedures.
While we have shown and described specific embodiments of the present invention, further modifications and improvements will occur to those skilled in the art. We desire it to be understood, therefore, that this invention is not limited to the particular forms shown and we intend in the appended claims to cover all modifications that do not depart from the spirit and scope of this invention.

Claims

What is claimed is:
1. A method of forming single crystalline oxides on a semiconductor substrate comprising the steps of: providing a semiconductor substrate having a surface to be oxidized; placing the semiconductor substrate in a vacuum chamber; depositing a thin layer including a II metal on the surface to be oxidized; introducing an alternative oxidation agent into the chamber at a partial vapor pressure and at a temperature such that it is high enough to enhance oxide formation and to prevent unwanted by-product formation and low enough to prevent unwanted metal-semiconductor interactions and interdif fusion.
2. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of depositing a thin layer including the II metal includes passivating the surface to be oxidized with a sub-monolayer to a monolayer of the II metal and the step of introducing the alternative oxidation agent includes simultaneously introducing molecular II metal.
3. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 further including a step of introducing additional material including barium during the step of introducing the alternative oxidation agent.
4. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of providing the semiconductor substrate includes providing a substrate including silicon.
5. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of placing the semiconductor substrate in the vacuum chamber includes placing the substrate in a molecular beam epitaxy chamber.
6. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of depositing the thin layer includes depositing a layer with a thickness in a range of approximately 1 to 5 monolayers.
7. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of depositing the thin layer including the II metal includes a step of depositing a metal including one of barium and barium-strontium.
8. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of introducing the alternative oxidation agent includes introducing one of pure H2O, NO, and N2O, including activated species of any of H2O, NO, and N2O.
9. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 wherein the step of placing the semiconductor substrate in the vacuum chamber includes reducing pressure within the vacuum chamber to a base pressure in a 10-10 Torr range.
10. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 9 wherein the step of introducing the alternative oxidation agent includes introducing the agent at a partial vapor pressure in a range of approximately 10-8 Torr to 10-5 Torr.
11. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 10 wherein the step of introducing the alternative oxidation agent includes introducing the agent at a temperature in a range of approximately 300°C to 800°C. 5
12. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 1 further including a step of monitoring the surface by reflection high energy electron diffraction (RHEED) during oxide growth.
10 13. A method of forming single crystalline oxides on a semiconductor substrate comprising the steps of: providing a semiconductor substrate having a surface to be oxidized; placing the semiconductor substrate in a vacuum chamber; depositing a thin layer of material including barium on the surface to be 15 oxidized; introducing an alternative oxidation agent into the chamber at a partial vapor pressure and at a temperature so as to form a layer of single crystal oxide from the thin layer of material with the layer of single crystal oxide lattice matched to the semiconductor substrate. >0
14. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of providing the semiconductor substrate includes providing a substrate including silicon.
15 15. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of placing the semiconductor substrate in the vacuum chamber includes placing the substrate in an MBE chamber.
16. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of depositing the thin layer includes depositing a layer with a thickness in a range of approximately 1 to 5 monolayers.
17. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of depositing the thin layer including barium includes a step of depositing one of barium and barium-strontium.
18. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of introducing the alternative oxidation agent includes introducing one of pure H2O, NO, and 2O, including activated species of any of H2O, NO, and N2O.
19. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of placing the semiconductor substrate in the vacuum chamber includes reducing pressure within the vacuum chamber to a base pressure in a 10-10 Torr range.
20. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of introducing the alternative oxidation agent includes introducing the agent at a partial vapor pressure in a range of approximately 10-8 Torr to 10-5 Torr.
21. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 20 wherein the step of introducing the alternative oxidation agent includes introducing the agent at a temperature in a range of approximately 300°C to 800°C.
22. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 further including a step of monitoring the surface by reflection high energy electron diffraction (RHEED) during oxide growth.
23. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 wherein the step of depositing a thin layer of material including barium includes passivating the surface to be oxidized with a sub-monolayer to a monolayer of material including barium and the step of introducing the alternative oxidation agent includes simultaneously introducing molecular material including barium.
24. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 13 further including a step of introducing additional material including barium during the step of introducing the alternative oxidation agent.
25. A method of forming single crystalline oxides on a semiconductor substrate comprising the steps of: providing a semiconductor substrate including silicon having a surface to be oxidized; placing the semiconductor substrate in a vacuum chamber at a base pressure in a 10-10 Torr range; depositing a thin layer of material including barium on the surface to be oxidized; and introducing an alternative oxidation agent into the chamber at a partial vapor pressure in a range of approximately 10-8 Torr to 10-5 Torr and at a temperature in a range of approximately 300°C to 800°C so as to form a layer of single crystal oxide from the thin layer of material with the layer of single crystal oxide lattice matched to the semiconductor substrate.
26. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 wherein the step of placing the semiconductor substrate in the vacuum chamber includes placing the substrate in an MBE chamber.
27. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 wherein the step of depositing the thin layer includes depositing a layer with a thickness in a range of approximately 1 to 5 monolayers.
28. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 wherein the step of depositing the thin layer including barium includes a step of depositing one of barium and barium-strontium.
29. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 wherein the step of introducing the alternative oxidation agent includes introducing one of pure H2O, NO, and N2O, including activated species of any of H2O, NO, and N2O.
30. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 further including a step of monitoring the surface by reflection high energy electron diffraction (RHEED) during oxide growth.
31. A method of forming single crystalline oxides on a semiconductor substrate as claimed in claim 25 further including a step of introducing additional material including barium during the step of introducing the alternative oxidation agent.
PCT/US2001/045570 2000-11-16 2001-10-24 Single crystalline oxide on a semiconductor substrate WO2002041365A2 (en)

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AU2002228719A AU2002228719A1 (en) 2000-11-16 2001-10-24 Single crystalline oxide on a semiconductor substrate

Applications Claiming Priority (2)

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US71438000A 2000-11-16 2000-11-16
US09/714,380 2000-11-16

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227363A (en) * 1991-02-20 1993-07-13 Sanyo Electric Co., Ltd. Molecular beam epitaxy process of making superconducting oxide thin films using an oxygen radical beam
US5556472A (en) * 1991-12-09 1996-09-17 Sumitomo Electric Industries, Ltd Film deposition apparatus
US5830270A (en) * 1996-08-05 1998-11-03 Lockheed Martin Energy Systems, Inc. CaTiO3 Interfacial template structure on semiconductor-based material and the growth of electroceramic thin-films in the perovskite class

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3683095B2 (en) * 1998-03-20 2005-08-17 雅則 奥山 Ferroelectric thin film material, manufacturing method of ferroelectric thin film material, manufacturing method of dielectric bolometer using ferroelectric thin film material, dielectric bolometer, and infrared detection element using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227363A (en) * 1991-02-20 1993-07-13 Sanyo Electric Co., Ltd. Molecular beam epitaxy process of making superconducting oxide thin films using an oxygen radical beam
US5556472A (en) * 1991-12-09 1996-09-17 Sumitomo Electric Industries, Ltd Film deposition apparatus
US5830270A (en) * 1996-08-05 1998-11-03 Lockheed Martin Energy Systems, Inc. CaTiO3 Interfacial template structure on semiconductor-based material and the growth of electroceramic thin-films in the perovskite class

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 01, 31 January 2000 (2000-01-31) & JP 11 271142 A (OKUYAMA MASANORI;MURATA MFG CO LTD; MATSUSHITA ELECTRIC IND CO LTD), 5 October 1999 (1999-10-05) *

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AU2002228719A1 (en) 2002-05-27

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