WO2001046800A3 - Dual-mode processor - Google Patents

Dual-mode processor Download PDF

Info

Publication number
WO2001046800A3
WO2001046800A3 PCT/US2000/034458 US0034458W WO0146800A3 WO 2001046800 A3 WO2001046800 A3 WO 2001046800A3 US 0034458 W US0034458 W US 0034458W WO 0146800 A3 WO0146800 A3 WO 0146800A3
Authority
WO
WIPO (PCT)
Prior art keywords
mode
processor
memories
data
secure
Prior art date
Application number
PCT/US2000/034458
Other languages
French (fr)
Other versions
WO2001046800A2 (en
Inventor
Brant Candelore
Eric J Sprunk
Original Assignee
Gen Instrument Corp
Brant Candelore
Eric J Sprunk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Instrument Corp, Brant Candelore, Eric J Sprunk filed Critical Gen Instrument Corp
Priority to KR1020027007955A priority Critical patent/KR20020091061A/en
Priority to JP2001547248A priority patent/JP2003518287A/en
Priority to EP00986569A priority patent/EP1240583A2/en
Priority to AU22786/01A priority patent/AU2278601A/en
Priority to MXPA02006214A priority patent/MXPA02006214A/en
Priority to CA002395645A priority patent/CA2395645A1/en
Publication of WO2001046800A2 publication Critical patent/WO2001046800A2/en
Publication of WO2001046800A3 publication Critical patent/WO2001046800A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1433Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a module or a part of a module
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/3012Organisation of register space, e.g. banked or distributed register file
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/3012Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2221/00Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/21Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F2221/2105Dual mode as a secondary aspect

Abstract

A multiple-mode processing circuit, such as a dual-mode processor (5), operates in at least first and second modes according to a switch (10). When a mode is active, data transfer between the processor and a respective memory occurs. Thus, instructions from the memory can be executed at the processor, and the results can be stored in the respective memory. For example, first and second memories (14, 54) may be provided for the first and second modes (10, 50), respectively. The memories are separate, and no data transfer can occur between the memories directly or via the processor. The first mode (10) may be a secure mode for secure processing operations, such as providing conditional access for television programming services at a set-top subscriber terminal. The second mode (50) may be a non-secure mode, such as for providing any other application at the terminal, e.g., program guide, shop at home service, etc. In one embodiment, a data bus is provided for time-multiplexed transfer of data between the processor and the respective memories. In another embodiment, switching of individual internal registers and external elements such as address and data latches, is provided.
PCT/US2000/034458 1999-12-23 2000-12-19 Dual-mode processor WO2001046800A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020027007955A KR20020091061A (en) 1999-12-23 2000-12-19 Dual-mode processor
JP2001547248A JP2003518287A (en) 1999-12-23 2000-12-19 Dual mode processor
EP00986569A EP1240583A2 (en) 1999-12-23 2000-12-19 Dual-mode processor
AU22786/01A AU2278601A (en) 1999-12-23 2000-12-19 Dual-mode processor
MXPA02006214A MXPA02006214A (en) 1999-12-23 2000-12-19 Dualmode processor.
CA002395645A CA2395645A1 (en) 1999-12-23 2000-12-19 Dual-mode processor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47175499A 1999-12-23 1999-12-23
US09/471,754 1999-12-23

Publications (2)

Publication Number Publication Date
WO2001046800A2 WO2001046800A2 (en) 2001-06-28
WO2001046800A3 true WO2001046800A3 (en) 2002-07-25

Family

ID=23872866

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/034458 WO2001046800A2 (en) 1999-12-23 2000-12-19 Dual-mode processor

Country Status (9)

Country Link
EP (1) EP1240583A2 (en)
JP (1) JP2003518287A (en)
KR (1) KR20020091061A (en)
CN (1) CN1425157A (en)
AU (1) AU2278601A (en)
CA (1) CA2395645A1 (en)
MX (1) MXPA02006214A (en)
TW (1) TW541466B (en)
WO (1) WO2001046800A2 (en)

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US9164842B2 (en) 2003-03-20 2015-10-20 Arm Limited Error recovery within integrated circuit

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EP1331539B1 (en) * 2002-01-16 2016-09-28 Texas Instruments France Secure mode for processors supporting MMU and interrupts
US7370210B2 (en) 2002-11-18 2008-05-06 Arm Limited Apparatus and method for managing processor configuration data
US9158574B2 (en) 2002-11-18 2015-10-13 Arm Limited Handling interrupts in data processing
WO2004046925A1 (en) * 2002-11-18 2004-06-03 Arm Limited Security mode switching via an exception vector
GB2396451B (en) 2002-11-18 2005-12-07 Advanced Risc Mach Ltd Delivering data processing requests to a suspended operating system
GB0226906D0 (en) * 2002-11-18 2002-12-24 Advanced Risc Mach Ltd Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain
GB2396712B (en) 2002-11-18 2005-12-07 Advanced Risc Mach Ltd Handling multiple interrupts in a data processing system utilising multiple operating systems
US7539853B2 (en) 2002-11-18 2009-05-26 Arm Limited Handling interrupts in data processing of data in which only a portion of a function has been processed
GB0226874D0 (en) 2002-11-18 2002-12-24 Advanced Risc Mach Ltd Switching between secure and non-secure processing modes
RU2005115094A (en) * 2002-11-18 2006-01-20 Арм Лимитед (Gb) DISPLAYING VIRTUAL MEMORY ADDRESSES TO PHYSICAL ADDRESSES IN A SYSTEM WITH A PROTECTED DOMAIN AND AN UNsecure DOMAIN
WO2004046924A1 (en) * 2002-11-18 2004-06-03 Arm Limited Processor switching between secure and non-secure modes
US7322042B2 (en) 2003-02-07 2008-01-22 Broadon Communications Corp. Secure and backward-compatible processor and secure software execution thereon
US20100017627A1 (en) 2003-02-07 2010-01-21 Broadon Communications Corp. Ensuring authenticity in a closed content distribution system
KR100981999B1 (en) 2003-03-20 2010-09-13 유니버시티 오브 미시간 Systematic and random error detection and recovery within processing stages of an integrated circuit
US8185812B2 (en) 2003-03-20 2012-05-22 Arm Limited Single event upset error detection within an integrated circuit
US7278080B2 (en) 2003-03-20 2007-10-02 Arm Limited Error detection and recovery within processing stages of an integrated circuit
WO2004084233A1 (en) 2003-03-20 2004-09-30 Arm Limited Momory system having fast and slow data reading mechanisms
WO2005052769A1 (en) * 2003-11-28 2005-06-09 Matsushita Electric Industrial Co.,Ltd. Data processing device
KR100677327B1 (en) * 2004-06-16 2007-02-02 엘지전자 주식회사 Mobile communication terminal with dual operating system
FR2872933B1 (en) * 2004-07-06 2008-01-25 Trusted Logic Sa TIME SHARING METHOD OF A PROCESSOR
KR100710263B1 (en) * 2005-01-27 2007-04-20 엘지전자 주식회사 Method of Multi-Tasking Using Multi-Modem Mobile Phone
FR2884628A1 (en) * 2005-04-18 2006-10-20 St Microelectronics Sa Interrupt service routine processing method for e.g. set-top box, involves starting counter while processor is operated in non-secured mode and returning processor to secured mode to pursue process execution when counter attains end value
WO2006120367A1 (en) * 2005-05-11 2006-11-16 Arm Limited A data processing apparatus and method employing multiple register sets
CN101064886B (en) * 2006-04-28 2012-12-12 朗迅科技公司 Wireless equipment and method for transmitting data through wireless equipment
KR100709385B1 (en) * 2006-07-19 2007-04-24 주식회사 케이 썸 씨앤 에프 Computer system
US7882318B2 (en) * 2006-09-29 2011-02-01 Intel Corporation Tamper protection of software agents operating in a vitual technology environment methods and apparatuses
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US8332660B2 (en) * 2008-01-02 2012-12-11 Arm Limited Providing secure services to a non-secure application
US8978132B2 (en) * 2008-05-24 2015-03-10 Via Technologies, Inc. Apparatus and method for managing a microprocessor providing for a secure execution mode
US8756391B2 (en) 2009-05-22 2014-06-17 Raytheon Company Multi-level security computing system
CN101707664B (en) * 2009-10-30 2013-03-06 深圳创维数字技术股份有限公司 Method for safe operation of set top box
CN107944298A (en) * 2012-08-21 2018-04-20 联想(北京)有限公司 A kind of electronic equipment and the mode switching method applied to electronic equipment
CN103559460B (en) * 2013-11-06 2016-06-08 深圳国微技术有限公司 A kind of condition receiving card CAM and data processing method
CN104268027B (en) * 2014-09-22 2017-09-29 北京经纬恒润科技有限公司 The fault handling method and device of embedded real-time operating system
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Publication number Priority date Publication date Assignee Title
US9164842B2 (en) 2003-03-20 2015-10-20 Arm Limited Error recovery within integrated circuit
US9448875B2 (en) 2003-03-20 2016-09-20 Arm Limited Error recovery within integrated circuit

Also Published As

Publication number Publication date
KR20020091061A (en) 2002-12-05
MXPA02006214A (en) 2003-01-28
CA2395645A1 (en) 2001-06-28
TW541466B (en) 2003-07-11
CN1425157A (en) 2003-06-18
EP1240583A2 (en) 2002-09-18
JP2003518287A (en) 2003-06-03
WO2001046800A2 (en) 2001-06-28
AU2278601A (en) 2001-07-03

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