WO2001046800A3 - Dual-mode processor - Google Patents
Dual-mode processor Download PDFInfo
- Publication number
- WO2001046800A3 WO2001046800A3 PCT/US2000/034458 US0034458W WO0146800A3 WO 2001046800 A3 WO2001046800 A3 WO 2001046800A3 US 0034458 W US0034458 W US 0034458W WO 0146800 A3 WO0146800 A3 WO 0146800A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- mode
- processor
- memories
- data
- secure
- Prior art date
Links
- 230000015654 memory Effects 0.000 abstract 7
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1433—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a module or a part of a module
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
- G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2105—Dual mode as a secondary aspect
Abstract
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020027007955A KR20020091061A (en) | 1999-12-23 | 2000-12-19 | Dual-mode processor |
JP2001547248A JP2003518287A (en) | 1999-12-23 | 2000-12-19 | Dual mode processor |
EP00986569A EP1240583A2 (en) | 1999-12-23 | 2000-12-19 | Dual-mode processor |
AU22786/01A AU2278601A (en) | 1999-12-23 | 2000-12-19 | Dual-mode processor |
MXPA02006214A MXPA02006214A (en) | 1999-12-23 | 2000-12-19 | Dualmode processor. |
CA002395645A CA2395645A1 (en) | 1999-12-23 | 2000-12-19 | Dual-mode processor |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US47175499A | 1999-12-23 | 1999-12-23 | |
US09/471,754 | 1999-12-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001046800A2 WO2001046800A2 (en) | 2001-06-28 |
WO2001046800A3 true WO2001046800A3 (en) | 2002-07-25 |
Family
ID=23872866
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/034458 WO2001046800A2 (en) | 1999-12-23 | 2000-12-19 | Dual-mode processor |
Country Status (9)
Country | Link |
---|---|
EP (1) | EP1240583A2 (en) |
JP (1) | JP2003518287A (en) |
KR (1) | KR20020091061A (en) |
CN (1) | CN1425157A (en) |
AU (1) | AU2278601A (en) |
CA (1) | CA2395645A1 (en) |
MX (1) | MXPA02006214A (en) |
TW (1) | TW541466B (en) |
WO (1) | WO2001046800A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9164842B2 (en) | 2003-03-20 | 2015-10-20 | Arm Limited | Error recovery within integrated circuit |
Families Citing this family (38)
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EP1331539B1 (en) * | 2002-01-16 | 2016-09-28 | Texas Instruments France | Secure mode for processors supporting MMU and interrupts |
US7370210B2 (en) | 2002-11-18 | 2008-05-06 | Arm Limited | Apparatus and method for managing processor configuration data |
US9158574B2 (en) | 2002-11-18 | 2015-10-13 | Arm Limited | Handling interrupts in data processing |
WO2004046925A1 (en) * | 2002-11-18 | 2004-06-03 | Arm Limited | Security mode switching via an exception vector |
GB2396451B (en) | 2002-11-18 | 2005-12-07 | Advanced Risc Mach Ltd | Delivering data processing requests to a suspended operating system |
GB0226906D0 (en) * | 2002-11-18 | 2002-12-24 | Advanced Risc Mach Ltd | Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain |
GB2396712B (en) | 2002-11-18 | 2005-12-07 | Advanced Risc Mach Ltd | Handling multiple interrupts in a data processing system utilising multiple operating systems |
US7539853B2 (en) | 2002-11-18 | 2009-05-26 | Arm Limited | Handling interrupts in data processing of data in which only a portion of a function has been processed |
GB0226874D0 (en) | 2002-11-18 | 2002-12-24 | Advanced Risc Mach Ltd | Switching between secure and non-secure processing modes |
RU2005115094A (en) * | 2002-11-18 | 2006-01-20 | Арм Лимитед (Gb) | DISPLAYING VIRTUAL MEMORY ADDRESSES TO PHYSICAL ADDRESSES IN A SYSTEM WITH A PROTECTED DOMAIN AND AN UNsecure DOMAIN |
WO2004046924A1 (en) * | 2002-11-18 | 2004-06-03 | Arm Limited | Processor switching between secure and non-secure modes |
US7322042B2 (en) | 2003-02-07 | 2008-01-22 | Broadon Communications Corp. | Secure and backward-compatible processor and secure software execution thereon |
US20100017627A1 (en) | 2003-02-07 | 2010-01-21 | Broadon Communications Corp. | Ensuring authenticity in a closed content distribution system |
KR100981999B1 (en) | 2003-03-20 | 2010-09-13 | 유니버시티 오브 미시간 | Systematic and random error detection and recovery within processing stages of an integrated circuit |
US8185812B2 (en) | 2003-03-20 | 2012-05-22 | Arm Limited | Single event upset error detection within an integrated circuit |
US7278080B2 (en) | 2003-03-20 | 2007-10-02 | Arm Limited | Error detection and recovery within processing stages of an integrated circuit |
WO2004084233A1 (en) | 2003-03-20 | 2004-09-30 | Arm Limited | Momory system having fast and slow data reading mechanisms |
WO2005052769A1 (en) * | 2003-11-28 | 2005-06-09 | Matsushita Electric Industrial Co.,Ltd. | Data processing device |
KR100677327B1 (en) * | 2004-06-16 | 2007-02-02 | 엘지전자 주식회사 | Mobile communication terminal with dual operating system |
FR2872933B1 (en) * | 2004-07-06 | 2008-01-25 | Trusted Logic Sa | TIME SHARING METHOD OF A PROCESSOR |
KR100710263B1 (en) * | 2005-01-27 | 2007-04-20 | 엘지전자 주식회사 | Method of Multi-Tasking Using Multi-Modem Mobile Phone |
FR2884628A1 (en) * | 2005-04-18 | 2006-10-20 | St Microelectronics Sa | Interrupt service routine processing method for e.g. set-top box, involves starting counter while processor is operated in non-secured mode and returning processor to secured mode to pursue process execution when counter attains end value |
WO2006120367A1 (en) * | 2005-05-11 | 2006-11-16 | Arm Limited | A data processing apparatus and method employing multiple register sets |
CN101064886B (en) * | 2006-04-28 | 2012-12-12 | 朗迅科技公司 | Wireless equipment and method for transmitting data through wireless equipment |
KR100709385B1 (en) * | 2006-07-19 | 2007-04-24 | 주식회사 케이 썸 씨앤 에프 | Computer system |
US7882318B2 (en) * | 2006-09-29 | 2011-02-01 | Intel Corporation | Tamper protection of software agents operating in a vitual technology environment methods and apparatuses |
WO2009031573A1 (en) * | 2007-09-07 | 2009-03-12 | Nec Corporation | Information processing apparatus, processor status transition method, processor status transition control apparatus, and processor |
US8332660B2 (en) * | 2008-01-02 | 2012-12-11 | Arm Limited | Providing secure services to a non-secure application |
US8978132B2 (en) * | 2008-05-24 | 2015-03-10 | Via Technologies, Inc. | Apparatus and method for managing a microprocessor providing for a secure execution mode |
US8756391B2 (en) | 2009-05-22 | 2014-06-17 | Raytheon Company | Multi-level security computing system |
CN101707664B (en) * | 2009-10-30 | 2013-03-06 | 深圳创维数字技术股份有限公司 | Method for safe operation of set top box |
CN107944298A (en) * | 2012-08-21 | 2018-04-20 | 联想(北京)有限公司 | A kind of electronic equipment and the mode switching method applied to electronic equipment |
CN103559460B (en) * | 2013-11-06 | 2016-06-08 | 深圳国微技术有限公司 | A kind of condition receiving card CAM and data processing method |
CN104268027B (en) * | 2014-09-22 | 2017-09-29 | 北京经纬恒润科技有限公司 | The fault handling method and device of embedded real-time operating system |
GB2543096A (en) | 2015-10-09 | 2017-04-12 | Secure Thingz Ltd | Data Processing Device |
CN105701420B (en) * | 2016-02-23 | 2019-05-14 | 深圳市金立通信设备有限公司 | A kind of management method and terminal of user data |
JP7280600B2 (en) * | 2019-04-23 | 2023-05-24 | 株式会社エルイーテック | processor |
US11569994B2 (en) * | 2021-06-24 | 2023-01-31 | Intel Corporation | Accelerating multiple post-quantum cryptograhy key encapsulation mechanisms |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5867579A (en) * | 1994-10-27 | 1999-02-02 | Mitsubishi Corporation | Apparatus for data copyright management system |
-
2000
- 2000-12-19 WO PCT/US2000/034458 patent/WO2001046800A2/en not_active Application Discontinuation
- 2000-12-19 KR KR1020027007955A patent/KR20020091061A/en not_active Application Discontinuation
- 2000-12-19 AU AU22786/01A patent/AU2278601A/en not_active Abandoned
- 2000-12-19 EP EP00986569A patent/EP1240583A2/en not_active Withdrawn
- 2000-12-19 MX MXPA02006214A patent/MXPA02006214A/en active IP Right Grant
- 2000-12-19 CN CN00818611A patent/CN1425157A/en active Pending
- 2000-12-19 JP JP2001547248A patent/JP2003518287A/en active Pending
- 2000-12-19 CA CA002395645A patent/CA2395645A1/en not_active Abandoned
- 2000-12-22 TW TW089127713A patent/TW541466B/en not_active IP Right Cessation
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5867579A (en) * | 1994-10-27 | 1999-02-02 | Mitsubishi Corporation | Apparatus for data copyright management system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9164842B2 (en) | 2003-03-20 | 2015-10-20 | Arm Limited | Error recovery within integrated circuit |
US9448875B2 (en) | 2003-03-20 | 2016-09-20 | Arm Limited | Error recovery within integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
KR20020091061A (en) | 2002-12-05 |
MXPA02006214A (en) | 2003-01-28 |
CA2395645A1 (en) | 2001-06-28 |
TW541466B (en) | 2003-07-11 |
CN1425157A (en) | 2003-06-18 |
EP1240583A2 (en) | 2002-09-18 |
JP2003518287A (en) | 2003-06-03 |
WO2001046800A2 (en) | 2001-06-28 |
AU2278601A (en) | 2001-07-03 |
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