WO2001036990A3 - Wafer level interposer - Google Patents

Wafer level interposer Download PDF

Info

Publication number
WO2001036990A3
WO2001036990A3 PCT/US2000/042200 US0042200W WO0136990A3 WO 2001036990 A3 WO2001036990 A3 WO 2001036990A3 US 0042200 W US0042200 W US 0042200W WO 0136990 A3 WO0136990 A3 WO 0136990A3
Authority
WO
WIPO (PCT)
Prior art keywords
interposer
wafer
assembly
testing
wafer level
Prior art date
Application number
PCT/US2000/042200
Other languages
French (fr)
Other versions
WO2001036990A2 (en
Inventor
Jerry D Kline
Cecil E Smith Jr
Original Assignee
Micro Asi Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micro Asi Inc filed Critical Micro Asi Inc
Publication of WO2001036990A2 publication Critical patent/WO2001036990A2/en
Publication of WO2001036990A3 publication Critical patent/WO2001036990A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0416—Connectors, terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Abstract

An apparatus and method for manufacture and testing of semiconductor chips (14) is disclosed. The invention comprises the use of an interposer (22) having a plurality of electrical contact pads (26) on each surface connected by a plurality of conductors (32, 34). After assembly of the interposer (22) to a semiconductor wafer (12), the wafer-interposer assembly (10) is attached to a testing unit (46) wherein the semiconductor chips (14) on the wafer (12) are tested. After testing, the interposer-wafer assembly (10) is singulated into a plurality of chip assemblies (62), each chip assembly (62) comprising a silicon chip (64) and the permanently attached interposer (66).
PCT/US2000/042200 1999-11-16 2000-11-16 Wafer level interposer WO2001036990A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/440,751 US6392428B1 (en) 1999-11-16 1999-11-16 Wafer level interposer
US09/440,751 1999-11-16

Publications (2)

Publication Number Publication Date
WO2001036990A2 WO2001036990A2 (en) 2001-05-25
WO2001036990A3 true WO2001036990A3 (en) 2002-01-10

Family

ID=23750034

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/042200 WO2001036990A2 (en) 1999-11-16 2000-11-16 Wafer level interposer

Country Status (2)

Country Link
US (2) US6392428B1 (en)
WO (1) WO2001036990A2 (en)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2101293C (en) * 1992-08-05 2004-06-29 David A. Nicholas Articulating endoscopic surgical apparatus
JP2001091540A (en) * 1999-09-27 2001-04-06 Hitachi Ltd Probe structure
US6392428B1 (en) * 1999-11-16 2002-05-21 Eaglestone Partners I, Llc Wafer level interposer
US6812048B1 (en) 2000-07-31 2004-11-02 Eaglestone Partners I, Llc Method for manufacturing a wafer-interposer assembly
US6537831B1 (en) 2000-07-31 2003-03-25 Eaglestone Partners I, Llc Method for selecting components for a matched set using a multi wafer interposer
US6815712B1 (en) * 2000-10-02 2004-11-09 Eaglestone Partners I, Llc Method for selecting components for a matched set from a wafer-interposer assembly
JP2002110856A (en) * 2000-10-03 2002-04-12 Sony Corp Manufacturing method of semiconductor device
US6686657B1 (en) * 2000-11-07 2004-02-03 Eaglestone Partners I, Llc Interposer for improved handling of semiconductor wafers and method of use of same
US6529022B2 (en) * 2000-12-15 2003-03-04 Eaglestone Pareners I, Llc Wafer testing interposer for a conventional package
US6524885B2 (en) * 2000-12-15 2003-02-25 Eaglestone Partners I, Llc Method, apparatus and system for building an interposer onto a semiconductor wafer using laser techniques
US6673653B2 (en) 2001-02-23 2004-01-06 Eaglestone Partners I, Llc Wafer-interposer using a ceramic substrate
DE10216874A1 (en) * 2002-04-17 2003-07-10 Infineon Technologies Ag Semiconductor chip and process for laying down information on it forms wafer level package with contacts and has optically readable identification on each chip
US6969909B2 (en) 2002-12-20 2005-11-29 Vlt, Inc. Flip chip FET device
US7038917B2 (en) * 2002-12-27 2006-05-02 Vlt, Inc. Low loss, high density array interconnection
US20040193989A1 (en) * 2003-03-28 2004-09-30 Sun Microsystems, Inc. Test system including a test circuit board including through-hole vias and blind vias
US7131047B2 (en) 2003-04-07 2006-10-31 Sun Microsystems, Inc. Test system including a test circuit board including resistive devices
JP2006210402A (en) * 2005-01-25 2006-08-10 Matsushita Electric Ind Co Ltd Semiconductor device
US20080018350A1 (en) * 2006-07-21 2008-01-24 Clinton Chao Test probe for integrated circuits with ultra-fine pitch terminals
US20140055159A1 (en) * 2012-02-21 2014-02-27 Nexus Technology Interposer with Edge Probe Points
US20130257423A1 (en) * 2012-04-03 2013-10-03 Isentek Inc. Hybrid magnetic sensor
US9230682B2 (en) * 2012-12-26 2016-01-05 Broadcom Corporation Method and system for automated device testing
US20190013251A1 (en) 2017-07-10 2019-01-10 International Business Machines Corporation Non-destructive testing of integrated circuit chips
TWI827809B (en) * 2019-04-04 2024-01-01 丹麥商卡普雷斯股份有限公司 Method for measuring an electric property of a test sample, and multilayer test sample
JP2021012041A (en) * 2019-07-03 2021-02-04 デクセリアルズ株式会社 Inspection tool for inspecting electrical characteristics
KR20220033655A (en) 2020-09-09 2022-03-17 삼성전자주식회사 semiconductor package
US20230078663A1 (en) * 2021-09-09 2023-03-16 Kla Corporation Method for Determining Material Parameters of a Multilayer Test Sample

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3848188A (en) * 1973-09-10 1974-11-12 Probe Rite Inc Multiplexer control system for a multi-array test probe assembly
US5059899A (en) * 1990-08-16 1991-10-22 Micron Technology, Inc. Semiconductor dies and wafers and methods for making
US5095267A (en) * 1990-03-19 1992-03-10 National Semiconductor Corporation Method of screening A.C. performance characteristics during D.C. parametric test operation
EP0520841A1 (en) * 1991-06-27 1992-12-30 Motorola, Inc. Composite flip chip semi-conductor device and method for making and burning-in the same
US5206582A (en) * 1988-05-18 1993-04-27 Hewlett-Packard Company Control system for automated parametric test equipment
EP0702402A1 (en) * 1994-09-13 1996-03-20 STMicroelectronics S.r.l. Manufacturing method for integrated circuits and semiconductor wafer so obtained
EP0918354A2 (en) * 1997-11-20 1999-05-26 Texas Instruments Incorporated Wafer-scale assembly of chip-size packages

Family Cites Families (118)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3939588A (en) 1974-06-24 1976-02-24 Hockaday Robert C Lettering guide apparatus
US4577214A (en) 1981-05-06 1986-03-18 At&T Bell Laboratories Low-inductance power/ground distribution in a package for a semiconductor chip
US4628411A (en) 1984-03-12 1986-12-09 International Business Machines Corporation Apparatus for directly powering a multi-chip module from a power distribution bus
US4617730A (en) 1984-08-13 1986-10-21 International Business Machines Corporation Method of fabricating a chip interposer
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US5829128A (en) 1993-11-16 1998-11-03 Formfactor, Inc. Method of mounting resilient contact structures to semiconductor devices
US5476211A (en) 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
US4688151A (en) 1986-03-10 1987-08-18 International Business Machines Corporation Multilayered interposer board for powering high current chip modules
US4868712A (en) 1987-02-04 1989-09-19 Woodman John K Three dimensional integrated circuit package
US5016138A (en) 1987-10-27 1991-05-14 Woodman John K Three dimensional integrated circuit package
JP3041342B2 (en) 1988-10-07 2000-05-15 株式会社フェローテック Magnetic bearing device
US5399898A (en) 1992-07-17 1995-03-21 Lsi Logic Corporation Multi-chip semiconductor arrangements using flip chip dies
US5299730A (en) 1989-08-28 1994-04-05 Lsi Logic Corporation Method and apparatus for isolation of flux materials in flip-chip manufacturing
US5489804A (en) 1989-08-28 1996-02-06 Lsi Logic Corporation Flexible preformed planar structures for interposing between a chip and a substrate
US4998885A (en) 1989-10-27 1991-03-12 International Business Machines Corporation Elastomeric area array interposer
US5123850A (en) 1990-04-06 1992-06-23 Texas Instruments Incorporated Non-destructive burn-in test socket for integrated circuit die
US5065227A (en) 1990-06-04 1991-11-12 International Business Machines Corporation Integrated circuit packaging using flexible substrate
US5905382A (en) 1990-08-29 1999-05-18 Micron Technology, Inc. Universal wafer carrier for wafer level die burn-in
US5060052A (en) 1990-09-04 1991-10-22 Motorola, Inc. TAB bonded semiconductor device having off-chip power and ground distribution
US5148266A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5132613A (en) * 1990-11-30 1992-07-21 International Business Machines Corporation Low inductance side mount decoupling test structure
JP2509027B2 (en) 1991-10-16 1996-06-19 三菱電機株式会社 Semiconductor device
US5222014A (en) 1992-03-02 1993-06-22 Motorola, Inc. Three-dimensional multi-chip pad array carrier
US5483421A (en) 1992-03-09 1996-01-09 International Business Machines Corporation IC chip attachment
JP3219844B2 (en) 1992-06-01 2001-10-15 東京エレクトロン株式会社 Probe device
US5915752A (en) 1992-07-24 1999-06-29 Tessera, Inc. Method of making connections to a semiconductor chip assembly
DE69330450T2 (en) 1992-08-05 2001-11-08 Fujitsu Ltd Three-dimensional multichip module
US5544017A (en) 1992-08-05 1996-08-06 Fujitsu Limited Multichip module substrate
US5477160A (en) * 1992-08-12 1995-12-19 Fujitsu Limited Module test card
KR970010656B1 (en) 1992-09-01 1997-06-30 마쯔시다 덴기 산교 가부시끼가이샤 Semiconductor test device, semiconductor test circuit chip and probe card
US5382898A (en) 1992-09-21 1995-01-17 Cerprobe Corporation High density probe card for testing electrical circuits
US5371654A (en) 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
US5384691A (en) 1993-01-08 1995-01-24 General Electric Company High density interconnect multi-chip modules including embedded distributed power supply elements
US5327325A (en) 1993-02-08 1994-07-05 Fairchild Space And Defense Corporation Three-dimensional integrated circuit package
US5654588A (en) 1993-07-23 1997-08-05 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where the wafer uses a segmented conductive top-layer bus structure
US5594273A (en) 1993-07-23 1997-01-14 Motorola Inc. Apparatus for performing wafer-level testing of integrated circuits where test pads lie within integrated circuit die but overly no active circuitry for improved yield
US5399505A (en) 1993-07-23 1995-03-21 Motorola, Inc. Method and apparatus for performing wafer level testing of integrated circuit dice
US5570032A (en) 1993-08-17 1996-10-29 Micron Technology, Inc. Wafer scale burn-in apparatus and process
US5897326A (en) 1993-11-16 1999-04-27 Eldridge; Benjamin N. Method of exercising semiconductor devices
US5832601A (en) 1993-11-16 1998-11-10 Form Factor, Inc. Method of making temporary connections between electronic components
US6246247B1 (en) 1994-11-15 2001-06-12 Formfactor, Inc. Probe card assembly and kit, and methods of using same
US5878486A (en) 1993-11-16 1999-03-09 Formfactor, Inc. Method of burning-in semiconductor devices
US6064213A (en) 1993-11-16 2000-05-16 Formfactor, Inc. Wafer-level burn-in and test
US5806181A (en) 1993-11-16 1998-09-15 Formfactor, Inc. Contact carriers (tiles) for populating larger substrates with spring contacts
US5798652A (en) 1993-11-23 1998-08-25 Semicoa Semiconductors Method of batch testing surface mount devices using a substrate edge connector
EP0658937A1 (en) 1993-12-08 1995-06-21 Hughes Aircraft Company Vertical IC chip stack with discrete chip carriers formed from dielectric tape
US5800184A (en) 1994-03-08 1998-09-01 International Business Machines Corporation High density electrical interconnect apparatus and method
FR2720190B1 (en) 1994-05-20 1996-08-02 Matra Marconi Space France Method for connecting the output pads of an integrated circuit chip, and multi-chip module thus obtained.
US5657206A (en) 1994-06-23 1997-08-12 Cubic Memory, Inc. Conductive epoxy flip-chip package and method
US5798286A (en) * 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US5518964A (en) * 1994-07-07 1996-05-21 Tessera, Inc. Microelectronic mounting with multiple lead deformation and bonding
US5532612A (en) 1994-07-19 1996-07-02 Liang; Louis H. Methods and apparatus for test and burn-in of integrated circuit devices
JPH0846136A (en) 1994-07-26 1996-02-16 Fujitsu Ltd Semiconductor device
US5517515A (en) * 1994-08-17 1996-05-14 International Business Machines Corporation Multichip module with integrated test circuitry disposed within interposer substrate
US6577148B1 (en) 1994-08-31 2003-06-10 Motorola, Inc. Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer
TW273635B (en) 1994-09-01 1996-04-01 Aesop
US5579207A (en) 1994-10-20 1996-11-26 Hughes Electronics Three-dimensional integrated circuit stacking
US5802713A (en) 1995-01-20 1998-09-08 Fairchild Space And Defense Corportion Circuit board manufacturing method
US5491612A (en) 1995-02-21 1996-02-13 Fairchild Space And Defense Corporation Three-dimensional modular assembly of integrated circuits
US5801446A (en) 1995-03-28 1998-09-01 Tessera, Inc. Microelectronic connections with solid core joining units
US5635010A (en) 1995-04-14 1997-06-03 Pepe; Angel A. Dry adhesive joining of layers of electronic devices
US5765279A (en) 1995-05-22 1998-06-16 Fujitsu Limited Methods of manufacturing power supply distribution structures for multichip modules
US5600257A (en) 1995-08-09 1997-02-04 International Business Machines Corporation Semiconductor wafer test and burn-in
US5637920A (en) 1995-10-04 1997-06-10 Lsi Logic Corporation High contact density ball grid array package for flip-chips
US5834946A (en) * 1995-10-19 1998-11-10 Mosaid Technologies Incorporated Integrated circuit test head
US6046600A (en) 1995-10-31 2000-04-04 Texas Instruments Incorporated Process of testing integrated circuit dies on a wafer
US5838060A (en) 1995-12-12 1998-11-17 Comer; Alan E. Stacked assemblies of semiconductor packages containing programmable interconnect
US5796746A (en) 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US5764071A (en) * 1996-01-05 1998-06-09 International Business Machines Corporation Method and system for testing an electronic module mounted on a printed circuit board
US5635101A (en) * 1996-01-22 1997-06-03 Janke George A Deicing composition and method
US5942246A (en) 1996-02-16 1999-08-24 The Liposome Company, Inc. Etherlipid containing multiple lipid liposomes
US5936847A (en) 1996-05-02 1999-08-10 Hei, Inc. Low profile electronic circuit modules
US5917242A (en) 1996-05-20 1999-06-29 Micron Technology, Inc. Combination of semiconductor interconnect
US5759047A (en) 1996-05-24 1998-06-02 International Business Machines Corporation Flexible circuitized interposer with apertured member and method for making same
US6133070A (en) 1996-05-27 2000-10-17 Dai Nippon Printing Co., Ltd. Circuit member for semiconductor device, semiconductor device using the same, and method for manufacturing them
US5748452A (en) 1996-07-23 1998-05-05 International Business Machines Corporation Multi-electronic device package
US6050829A (en) 1996-08-28 2000-04-18 Formfactor, Inc. Making discrete power connections to a space transformer of a probe card assembly
US5707881A (en) 1996-09-03 1998-01-13 Motorola, Inc. Test structure and method for performing burn-in testing of a semiconductor product wafer
US5789807A (en) 1996-10-15 1998-08-04 International Business Machines Corporation On-chip power distribution for improved decoupling
US5949246A (en) 1997-01-28 1999-09-07 International Business Machines Test head for applying signals in a burn-in test of an integrated circuit
US5844803A (en) 1997-02-17 1998-12-01 Micron Technology, Inc. Method of sorting a group of integrated circuit devices for those devices requiring special testing
US5838072A (en) 1997-02-24 1998-11-17 Mosel Vitalic Corporation Intrachip power distribution package and method for semiconductors having a supply node electrically interconnected with one or more intermediate nodes
US5950070A (en) 1997-05-15 1999-09-07 Kulicke & Soffa Investments Method of forming a chip scale package, and a tool used in forming the chip scale package
KR100278219B1 (en) 1997-06-18 2001-01-15 클라크 3세 존 엠. Method of making flip chip and bga interconnections
US6082610A (en) 1997-06-23 2000-07-04 Ford Motor Company Method of forming interconnections on electronic modules
US6137299A (en) 1997-06-27 2000-10-24 International Business Machines Corporation Method and apparatus for testing integrated circuit chips
JP3028791B2 (en) 1997-08-06 2000-04-04 日本電気株式会社 How to mount chip components
US5892287A (en) 1997-08-18 1999-04-06 Texas Instruments Semiconductor device including stacked chips having metal patterned on circuit surface and on edge side of chip
US6069026A (en) 1997-08-18 2000-05-30 Texas Instruments Incorporated Semiconductor device and method of fabrication
US6080494A (en) 1997-08-29 2000-06-27 Texas Instruments Incorporated Method to manufacture ball grid arrays with excellent solder ball adhesion for semiconductor packaging and the array
US5794175A (en) * 1997-09-09 1998-08-11 Teradyne, Inc. Low cost, highly parallel memory tester
US6083773A (en) 1997-09-16 2000-07-04 Micron Technology, Inc. Methods of forming flip chip bumps and related flip chip bump constructions
US5927193A (en) * 1997-10-16 1999-07-27 International Business Machines Corporation Process for via fill
RU2133523C1 (en) 1997-11-03 1999-07-20 Закрытое акционерное общество "Техно-ТМ" Three-dimensional electron module
US6002178A (en) 1997-11-12 1999-12-14 Lin; Paul T. Multiple chip module configuration to simplify testing process and reuse of known-good chip-size package (CSP)
US6432744B1 (en) 1997-11-20 2002-08-13 Texas Instruments Incorporated Wafer-scale assembly of chip-size packages
JP3188876B2 (en) * 1997-12-29 2001-07-16 インターナショナル・ビジネス・マシーンズ・コーポレ−ション Method, test head and test apparatus for testing product chip
US5977640A (en) 1998-06-26 1999-11-02 International Business Machines Corporation Highly integrated chip-on-chip packaging
US5854507A (en) 1998-07-21 1998-12-29 Hewlett-Packard Company Multiple chip assembly
US6313522B1 (en) 1998-08-28 2001-11-06 Micron Technology, Inc. Semiconductor structure having stacked semiconductor devices
US6049467A (en) 1998-08-31 2000-04-11 Unisys Corporation Stackable high density RAM modules
US6154371A (en) 1998-09-30 2000-11-28 Cisco Technology, Inc. Printed circuit board assembly and method
US6242932B1 (en) * 1999-02-19 2001-06-05 Micron Technology, Inc. Interposer for semiconductor components having contact balls
US6218910B1 (en) * 1999-02-25 2001-04-17 Formfactor, Inc. High bandwidth passive integrated circuit tester probe card assembly
US6373268B1 (en) * 1999-05-10 2002-04-16 Intel Corporation Test handling method and equipment for conjoined integrated circuit dice
US6242279B1 (en) 1999-06-14 2001-06-05 Thin Film Module, Inc. High density wire bond BGA
US6303992B1 (en) 1999-07-06 2001-10-16 Visteon Global Technologies, Inc. Interposer for mounting semiconductor dice on substrates
US6319829B1 (en) 1999-08-18 2001-11-20 International Business Machines Corporation Enhanced interconnection to ceramic substrates
US6392428B1 (en) * 1999-11-16 2002-05-21 Eaglestone Partners I, Llc Wafer level interposer
US6281046B1 (en) 2000-04-25 2001-08-28 Atmel Corporation Method of forming an integrated circuit package at a wafer level
US6483043B1 (en) * 2000-05-19 2002-11-19 Eaglestone Partners I, Llc Chip assembly with integrated power distribution between a wafer interposer and an integrated circuit chip
US6537831B1 (en) * 2000-07-31 2003-03-25 Eaglestone Partners I, Llc Method for selecting components for a matched set using a multi wafer interposer
US6483330B1 (en) * 2000-09-11 2002-11-19 Eaglestone Partners I, Llc Method for selecting components for a matched set using wafer interposers
US6529022B2 (en) 2000-12-15 2003-03-04 Eaglestone Pareners I, Llc Wafer testing interposer for a conventional package
US6524885B2 (en) 2000-12-15 2003-02-25 Eaglestone Partners I, Llc Method, apparatus and system for building an interposer onto a semiconductor wafer using laser techniques
US6440771B1 (en) 2001-03-23 2002-08-27 Eaglestone Partners I, Llc Method for constructing a wafer interposer by using conductive columns

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3848188A (en) * 1973-09-10 1974-11-12 Probe Rite Inc Multiplexer control system for a multi-array test probe assembly
US5206582A (en) * 1988-05-18 1993-04-27 Hewlett-Packard Company Control system for automated parametric test equipment
US5095267A (en) * 1990-03-19 1992-03-10 National Semiconductor Corporation Method of screening A.C. performance characteristics during D.C. parametric test operation
US5059899A (en) * 1990-08-16 1991-10-22 Micron Technology, Inc. Semiconductor dies and wafers and methods for making
EP0520841A1 (en) * 1991-06-27 1992-12-30 Motorola, Inc. Composite flip chip semi-conductor device and method for making and burning-in the same
EP0702402A1 (en) * 1994-09-13 1996-03-20 STMicroelectronics S.r.l. Manufacturing method for integrated circuits and semiconductor wafer so obtained
EP0918354A2 (en) * 1997-11-20 1999-05-26 Texas Instruments Incorporated Wafer-scale assembly of chip-size packages

Also Published As

Publication number Publication date
US6825678B2 (en) 2004-11-30
WO2001036990A2 (en) 2001-05-25
US20020097063A1 (en) 2002-07-25
US6392428B1 (en) 2002-05-21

Similar Documents

Publication Publication Date Title
WO2001036990A3 (en) Wafer level interposer
US5585282A (en) Process for forming a raised portion on a projecting contact for electrical testing of a semiconductor
US7287326B2 (en) Methods of forming a contact pin assembly
EP1045438A3 (en) Probe card for testing semiconductor device, and semiconductor device test method
WO1997040532A3 (en) Molded flex circuit ball grid array and method of making
AU2001268630A1 (en) Systems for testing integraged circuits during burn-in
EP0841695A3 (en) High planarity, low CTE base and method of making the same
EP0841698A3 (en) Wafer level contact sheet and method of assembly
EP1408338A3 (en) Method for making a probe card with multiple contact tips for testing integrated circuits
WO1996038858A3 (en) Method and probe card for testing semiconductor devices
SG99365A1 (en) Reliable metal bumps on top of i/o pads with test probe marks
EP0813238A3 (en) Flip-Chip Semiconductor device with test structure and method of manufacturing the same
US5781022A (en) Substrate having self limiting contacts for establishing an electrical connection with a semiconductor die
WO2003041157A3 (en) Large area silicon carbide devices and manufacturing methods therefor
TW357423B (en) Substrate for burn-in test of an IC chip and method of manufacturing a known good die utilizing the substrate the invention relates to a substrate for burn-in test of an IC chip and method of manufacturing a known good die using the substrate
US5568057A (en) Method for performing a burn-in test
TW334607B (en) Method for high speed testing a semiconductor device
WO2004102653A8 (en) Semiconductor device and interposer
EP0799424B1 (en) Method and apparatus for semiconductor die testing
EP1098363A3 (en) Testing integrated circuits
US5581195A (en) Semiconductor chip holding device
EP0840133A3 (en) Probe card integrated with dummy components equivalent to parasitic components coupled to bare chip sealed in package
US6531774B1 (en) Chip scale electrical test fixture with isolation plate having a recess
WO1997016866A3 (en) Chip interconnection carrier and methods of mounting spring contacts to semiconductor devices
US6384618B1 (en) Chip scale electrical test fixture with isolation plate having an angled test hole

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): CN JP KR

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): CN JP KR

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

122 Ep: pct application non-entry in european phase