AUTOMATIC DATA RATE ADAPTATION FOR DISCRETE MULTIMODE TRANSCEIVERS
CROSS-REFERENCES TO RELATED APPLICATIONS This application claims priority from U.S. Provisional Application
60/161,743 entitled "Techniques for Automatic Data Rate Adaptation for Scalable ADSL Modems" and filed on October 26, 1999. That application is incorporated herein by reference for all purposes.
FIELD OF THE INVENTION The present invention relates generally to the field of digital subscriber line ("DSL") communications systems, and in particular to scalable asymmetric ADSL modems.
BACKGROUND OF THE INVENTION
DSL, and specifically ADSL (Asymmetrical Digital Subscriber Line) and related (e.g., xDSL) communication technologies are rapidly becoming the channels of choice for broadband communications, particularly among Internet users seeking high speed access to the Internet from their home, offices, or other locations where telephone lines are available. One reason for DSL's popularity is that it provides a much faster speed compared to the traditional analog modem (e.g. V.90) and uses the same existing telephone network infrastructure. For example, ADSL, a discrete multitone (DMT) based technology, is relatively fast, having a downstream (toward the subscriber) bandwidth ranging from 1.5 to 8 Mbps.
As indicated by its name, DMT is a multiple carrier modulation scheme where the frequency band in each transmission direction consists of a number channels to carry digital data. In the case of ADSL, it is asymmetric in that it has around 250 downstream channels and 30 upstream channels. The 250 downstream channels are at a frequency above the voice band, leaving POTS (Plain Old Telephone Service) for analog and regular telephone services.
Detailed technical specifications of ADSL are given in both North America ANSI T1.413 and international ITU-T G.99x standards. Briefly, it uses 255 channels of 4.3125 kHz each, totaling a 1.1 MHz frequency band. Each channel uses a
line-coding scheme known as QAM (Quadrature Amplitude Modulation) to transmit a variable number of bits based on the channel's signal to noise ratio (SNR).
Specifically, there is different attenuation, noise, and crosstalk over the entire 1.1 MHz band. As a result, each DMT channel has a different transmission quality and is quantified by the received SNR. During the modem initialization process, each ADSL transceiver on either side of the line will generate a random pattern for the other one to measure the received SNR, with which the receiver will determine how many bits to transmit for each QAM channel (called bit loading) and pass this information back to the transmitter side. This channel quality measurement and bit loading determination/exchange process is called handshaking.. Thus, the DSL devices in the handshaking process determine noise levels and a line gain profile for each subchannel and then agree on the number of bits per second that each subchannel can support, based on the actual line gain profile.
A conventional ADSL communication device will use all the subchannels that are found to be useful, per ADSL standards. While this is the optimum and full use of the bandwidth, sometimes it is disadvantageous. For example, if the user is running an application that requires no full bandwidth operation, the communication device would be wasting computing effort maintaining and processing bit streams on all of the subchannels that are not all needed. Even in the case where a large bandwidth is needed, it might still be disadvantageous if the computing resources available to the user are exhausted by just the communications processes.
Therefore, there is a need to resolve the aforementioned disadvantages of conventional DSL communication devices, and the present invention meets that need.
SUMMARY OF THE INVENTION
In one embodiment of a scalable ADSL Modem (SAM) according to the present invention, the SAM scales its bit rate performance according to the computing resources available to the SAM. The ADSL modem can be host-based or DSP-based. In the host-based ADSL modem, the host processor of the computer to which the modem is connected does some of the processing needed to send and receive data using the modem. In a DSP-based modem, a digital signal processor (DSP) does the processing instead. The available host processing power can vary greatly, depending on what power processor is used in the host and what user applications are running on the processor.
Advantageously, in the novel SAM described herein, as available computing power available from the processor to perform ADSL functions varies, the SAM can vary the transmission bit rates sent to and from the SAM.
A scalable ADSL modem (SAM) concept that selectively processes a subset of the total available subchannels according to the available computing resources has been disclosed in US Patents Nos. 6,065,060, 6,073,179, 6,092,122, and 6,128,335. In these patents, they disclose a technique to use only a subset of available DMT subchannels by having the receiver to inform the bit loading decision to the remote transmitter based on various other factors including the available computing resources, in addition to the received SNR. As a result, an ADSL modem can achieve connectivity at a flexible computing power.
With the SAM concept, it would be desirable to either maximize the transmission rate at a specified available processing power, or minimize the processing power for a specified transmission rate. Furthermore, the original SAM concept only allows the receiver to flexibly determine the transmission of the remote transmitter using the defined handshaking. It does not, however, allow the transmitter to determine the bit rate according to its processing power since it is determined by the remote side. It is the purposes and scope of this patent application to disclose technique to achieve optimum computing/transmission rate performance and for both transmission and receiving directions.
A further understanding of the nature and advantages of the invention herein may be realized by reference to the remaining portions of the specification and the attached drawings. In the drawings, like reference numbers indicate identical or functionally similar elements.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of an ADSL communication network having a Digital Communication Equipment (DCE) for implementing the present invention.
Fig. 2 is a schematic diagram of an ADSL communication network having a DCE and showing exemplary features of the DCE.
Fig. 3 is a flow diagram illustrating a scheme for maximizing the data rate at a specified available computing resource in accordance with a first embodiment of the present invention.
Fig. 4 is a flow diagram illustrating a scheme for minimizing the computing load at a specified data rate in accordance with an alternate embodiment of the present invention.
Fig. 5 is a plot of processing time versus values of the number of tones for several CPU types.
Fig. 6 is a plot of processing time versus values of the receive bits per DMT symbol for several CPU types.
DESCRIPTION OF THE SPECIFIC EMBODIMENTS Fig. 1 is a schematic diagram of an ADSL access network 100 having a
SAM (scalable ADSL modem) 114 for scaling its bit rate performance according to available resources.
As used herein, the term "bit rate" refers to the speed at which a modem communicates data bits through a given communication channel to a remotely located modem. Among other components, ADSL access network 100 includes a DSLAM (DSL Access multiplexor) or access node 144 within a central office 106, a two-wire phone line 140, and a remote user ADSL modem 114. In addition to ADSL modem 114, analog modem 120 can be connected to the same phone line. ADSL modem 114 is connected to a computing device (e.g. a personal computer) 116 via a high speed link 128. Communication link 128 may be a PCI bus in the personal computer and modem 114 is embodied in a PCI network interface card (NIC).'
In addition to user applications, computing device 116 also provides processing power to modem 114. In one embodiment, computing device 116 is a conventional personal computer or computer workstation with sufficient memory and processing capability to handle high-level data computations. For example, a personal computer having a Pentium® III available from Intel® or an AMD-K6® processor available from Advanced Micro Devices may be employed. Of course, the processing power may be obtained from a dedicated processor, such as a DSP (Digital Signal Processor) or the like.
Other components of ADSL access network 100 include a splitter 132, which is communicatively coupled to modem 114. ' Splitter 132 is communicably connected to a second splitter 138 through phone line 140. The purpose of the splitter is to separate voice band signals (0 to 4 kHz) from ADSL signals (above 4 kHz). Typically, phone line 140 is Untwisted Twisted Pair (UTP) telephone wiring, running from a telephone central office to a
customer's premises, so that communication may exist in either direction between modem 114 and modem 142.
Splitters 132, 138 are conventional and well-known circuits. They consist of filters to separate a DMT signal occupying various subchannels from a lower end 4 kHz analog POTS signal. Splitter 132 is co-located at the customer's premises. After separating a 4 kHz POTS signal, for example, splitter 132 forwards the signal to a voice-band modem 120 or to other similar analog type devices 122. On the other hand, splitter 142 is located at a Central Office (CO) 106. Splitter 142 directs the 4 kHz POTS signal to a central office switch (not shown). ADSL access network 100 further include Internet 104, a corporate database server 108, and an on-demand video 156 service all of which are communicatively coupled to access node 144 via a router 160. A phone switch 162 for routing analog phone calls is coupled to splitter 138.
As shown, CO 106 is a conventional central office that provides ADSL network connectivity to various services and networks, namely, on-demand video 156 service, corporate database server 108, and the Internet 104. In one embodiment, CO 106 contains access node 144 which contains a plurality of ADSL modems including modem 142 and other modems (not shown). Modem 142 functions to communicate with remote ADSL modem 114 through splitters 138, 132. Among other functionality, access node 144 multiplexes the data outputs from the various modems within the access node to a single high speed line for Internet access.
It would be apparent to one of ordinary skill in the art that other alternatives and embodiments of ADSL network 100 are possible, access node 144 need not be located within CO 106. In fact, access node 144 can be located closer to modem 114 in which case a high speed link such as an optical fiber line is used to connect to the central office. Alternatively, access node 144 can be integrated with data switches and servers as one single piece of equipment in the central office.
Modem 114 is an ADSL modem that is fully compliant with the ADSL ANSI T1.413 or ITU-T G.992-G.996 standards. According to one embodiment of the present invention, modem 114 automatically scales its own bit rate performance according to the available computing resources. Advantageously, this functionality of modem 114 is particularly useful when a user wishes to engage in a data session that is bandwidth intensive. For example, the user1 may wish to engage in a video streaming session over the Internet 104. Although not shown, it should be noted that other computing networks may be accessed by modem 114, as the functionality of the present
invention is applicable to a wide variety of computing networks. Such networks may include LANs (Local Area Networks), Intranets, WANs (Wide Area Networks) and the like.
With a traditional modem, the video streaming session typically occurs at the maximum possible bit rate, constrained only by the capabilities of the communication channel and the specified maximum bit rate of the modem. Therefore, a traditional modem does not correlate the bit rate to the available processing power. Unlike a traditional modem, modem 114 correlates the bit rate performance to the available processing power. In operation, a user wishing to utilize the functionality of modem 114 during a video streaming session, for example, initiates the step of determining the amount of processing power available from computing device 116 for allocation to the video streaming process. This step is performed by an initialization routine (not shown) residing within computing device 116. In the present embodiment, the initialization routine is a software program residing in a conventional storage medium (whether volatile or not), such as a hard or floppy disk within the computing device 116. It will be apparent to one of ordinary skill in the art that the initialization routine could be part of a nonvolatile portion of an integrated circuit, or embedded in the nonvolatile storage of a
DSP, for example. Depending on the type of computing device 116, it is well understood that the available processing power will vary. In particular, a computing device having a
Pentium® III processor which runs at a clock speed of 500 MHz will vary in processing power relative to a computing device having an AMD-K6® processor, running at a clock speed of 433 MHz, for example. In fact, two similar type computing devices may vary in processing power depending on the type of applications being run and the computing resources required by such applications. Herein lies the advantage of the present invention. If the user upgrades from one computing device to a more powerful computing device, modem 114 automatically scales up its bit rate performance to correspond to the processing power of the new computing device. Once the amount of available power has been determined, the computing device 116 next calibrates the computation time separately for communicating data in the receiving and transmission directions. Specifically, the computation time or processing power for processing data bits and tones of each iteration for a particular loop is calibrated by the aforementioned initialization routine. The results are illustrated in Figs.
5 and 6 for different types of processors. It should be noted that the step of determining a computation time is platform dependent. For example, a Pentium® III driven computer device will have a different computation time compared to an AMD-K6® driven processor. Advantageously, the initialization routine is automatic and need be run only once by the user. In this manner, the present invention maximizes efficiency and saves time by avoiding repetitive tasks and steps associated with traditional modems.
After the initialization routine has been completed, modems 114 and 142 perform a handshaking procedure to determine the optimal communication parameters for sending the data bits. In particular, modems 114 and 142 determine a bit loading profile, concerning, for example, which subchannels are usable and the intended bit rate for each subchannel. See the "Bit Loading Profile Establishment" section, below. Upon completion of the handshaking process, modem 114 coordinates with computing device 116 to establish a bit rate for the video streaming session. More specifically, modem 114 uses the computation time that was calibrated, to correlate its bit rate performance to the processing power available. In this manner, modem 114 of the present invention always ensures that its bit rate performance is automatically scaled according to the available processing power.
Modem 114 is an ATU-R (ADSL Transmission Unit - Remote side) which is remote or "downstream" from CO 106As used herein, the term "downstream" refers to the location of a modem such that the data stream is toward the customer (away from CO
106) while the term "upstream" signifies a data stream flowing toward CO 106 (away from the subscriber).
Fig. 2 is a schematic block diagram of an ADSL access network 200 having an ADSL modem 214 and illustrating the components of modem 214 according to one embodiment of the present invention.
Among other circuitry, modem 214 includes a processing circuitry 210, a memory 212, a DAC (Digital to Analog Converter) 208 and an ADC (Analog to Digital Converter) 216. Other circuitry include an initialization routine 218, and an on-board data pump 220, which contains DMT transmit and receive cores 222 and 224. Except for initialization routine 218 and data pump 220, it should be noted that the structure and operation of the modem 214 is similar to conventional transceiver devices, and only those aspects which are necessary to an understanding of the present invention are herein described. Modems 214 and 206 are connected by a phone line 228, and modem 206 is
connected to the Internet 204, a corporate database server 208 as well as an on-demand video 256 service, for example.
In operation, upon detecting a user request for ADSL line connection, the initialization routine 218 responds by determining the amount of processing power available from processing circuitry 210. Following the determination of the amount of processing power, initialization routine 218 calibrates the processing load for communicating information within phone line 228 in both the receiving and a transmission directions. In the present embodiment, initialization routine 218 is a microcode routine stored within memory 212, for example. Preferably, initialization routine 218 executes whenever the modem 214 is powered up. In particular, a startup code (not shown) may call initialization routine 218 to execute the routine during the power up process, for example. Details regarding the calibration of the processing load are further discussed with reference to the following sections: "Physical and Transport Layers" and the "ADSL Computation Model" section, below. When the processing load has been determined, the processing circuitry 210 begins to inform the modem 214 to generate the connection request signaling to the remote modem 206. Afterwards, ADSL data pump 220 initiates a "handshaking" process to determine a bit loading profile for the data session.
The bit rate for each subchannel is determined initially by subchannel SNR (Signal to Noise Ratio) analysis. Specifically, modem 214 informs modem 206 about the quality of the transmission; modem 214 supplies modem 206 with information or a control signal to effectuate a transmission only in selected subchannels. In particular, in one embodiment, modem 206 is provided with SNR information for subchannels outside the passband that is artificially contrived so as suggest to the remote modem that these subchannels are not usable.
During the initialization process (and at all subsequent times) modem 206 is induced to use such subchannels during the ensuing data transmission. This is accomplished by transmitting SNR information that is interpreted by modem 206 as zero for all channels other than the selected channels. Because not all of the subchannels are used, ADC 216 can optionally filter the received subchannels so that only a subset of the received subchannels are temporarily stored in memory 212. Thereafter, processing circuitry 210 coordinates with the DMT receiver core 224 to begin processing the data within the memory 212.
In this manner, the downstream (towards modem 214) transmission is limited to a certain number of subchannels within the signal processing capabilities of modem 214. Therefore, advantageously, the present invention allows the user to the bit rate performance of modem 214 by selecting a subset of the best subchannels (for example, the channels that have the best receive SNR or loading).
On receiving the downstream data, DMT receiver core 224 monitors and measures the SNR of the subchannels falling within the frequency range passed by the ADC 216, and further extracts the original data stream from the numerous subcarriers. In the present embodiment, DMT receiver core 224 includes a DSP (not shown) and an on- board program ROM (or other suitable memory) for storing executable microcode routines for performing bit, energy and SNR measurement of the carriers in the subchannels. The user of this system can expand the functionality and performance (i.e., data throughput rate and modem features of such a system) by upgrading DMT receiver core 224, initialization routine 218, ADC 216, and its filters, or the processing circuitry 210.
Advantageously, the present embodiment uses a separate DMT receiver core 224 for scaling a bit rate performance by allowing the user to select the number of tones based on the available processing time.. It will be apparent to one of ordinary skill in the art that DMT receiver core 224 (and data pump 220) may be implemented as software residing on a host computing device, for example, which is external to modem 214. In addition, although the preceding description is about how the modem 214 initiates a request to establish a data link, it will be apparent to those of ordinary skill in the art that modem 214 can also respond to a request from the modem 206 to establish a data link. The process for establishing the data link, is nevertheless, the same as the process described above, with DAC 208 and DMT transmitter core 222 performing functions opposite those being performed by ADC 216 and DMT receiver core 224, respectively.
Physical Medium Dependent (PMD and Transport Convergence (TO Layers To understand how to adapt the data rate according to the available computing resources, the PMD and TC layers of ADSL data pump 220, as well as a mathematical computation model for the present embodiment, is described in detail here. In general, the data pump of an ADSL modem can be thought of as comprising two layers, the
first being the ADSL-TC (ADSL Transport Convergence) layer and the second being the ADSL-PMD (ADSL Physical Medium Dependent) layer.
The ADSL-TC layer includes a framer/deframer, a CRC (Cyclic Redundancy Check) unit, a scrambler/descrambler, a Reed Solomon encoder/decoder and an interleaver/deinterleaver. The processing speeds for those blocks are functions of the total number of bits loaded to each ADSL symbol. The ADSL-PMD layer includes a tone shuffler/deshuffler, a QAM encoder/decoder, a sealer, a Frequency Domain Equalizer (FEQ) unit, a FFT/IFFT (Fast Fourier Transform) unit, a timing recovery unit and a TEQ (Time Domain Equalizer) unit. The processing power needed for the FFTTFFT unit, the timing recovery unit and the TEQ unit are constants for a given implementation, but the processing power for the other ADSL-PMD layer components vary according to the number of active tones. Given the above, rate adaptation involves those variable factors.
One process for adapting bit rates starts with measuring or calibrating the processing load required to perform the ADSL-PMD functions for each active tone. This processing load is computation platform dependent. For example, different PCs (e.g., Intel Pentium® or AMD K6® driven processors) capable of running at different clock speeds will yield different CPU loads. This calibration is. done during the software initialization stage. With this automatic calibration of computation time factors, the accuracy of the processing load can be automatically maintained throughout a wide range of different processor and computation platform types.
Similarly, the computation load to perform the ADSL-TC functions at different bit rates is calculated. For a given loop with specific received SNR characteristics, the subcarriers can be sorted from highest to lowest SNR. This establishes a relationship between bit rates and the number of active tones we need to use. Of course, sorting by SNR requires that the SNR be known for each subcarrier, which may limit adaptation to the receiving direction. Other techniques, described below, allow for rate adaptation in both the receiving and the transmitting direction.
ADSL Computation Model
The ADSL data pump 220 performs ADSL symbol modulation and demodulation. According to the T1.413 ADSL standards (as well as all T1.413 derived standards, such as G.992.1 and G.992.2), each ADSL symbol duration is Tsymb0ι = 250*(68/69) sec. Therefore, the processing load for the ADSL data pump 220 can be
defined as the percentage of processing time spent for each ADSL symbol and normalized by Tsymboi. That is, the processing load can be defined as Ttotaι / Tsymb0ι x 100%, where Tlotaι is the total processing time of a DMT symbol.
The total time spent for each ADSL symbol, T aι (Equ. 1), is the sum of several components shown in further detail in Equations 2 and 3.
Ttotal — TRx otal + Tτχ,total + Tsys,OH, (EqU. 1)
TRχ,totai = TRX MD + JΛ ,rc + JAc.o / (Equ. 2)
Tτx,wtai - TTX.PMD + Tjx c + TX,OH, (Equ. 3)
In Equations 1-3,
is the total computation time for receiving, Tτ
Xιtotai is the total computation time for transmission, T$
ys,o
H is the system overhead time, and
RX.
PMD is the computation time of the ADSL-PMD layer related functions on the receiver side, which include a TEQ (Time Domain Equalization), a FFT, timing recovery, a descaler, an FEQ (Frequency Domain Equalization), sheer, a QAM decoder, and a tone deshuffler. From the computing characteristics in ADSL-PMD mentioned earlier, T
RX PMD is proportional to the number of active Rx tones, as shown in Equation 4, where N
Λ ,/0«e is the number of active tones in receiver side. For a specific processor type, c
Rx one and Cfa
one are constants.
TRX.P D = 0 Rχιt0ne X ΝR .tone + QRx.tone (EqU. 4)
Both constants, as well as other constants mentioned in the following sections, are measured and determined before the handshaking for the ADSL line connection starts.
TRX C is the processing time of the ADSL-TC layer related functions on the receiver side, which include a deframer, a deinterleaver, an RS (Reed Solomon) decoder, a descrambler, a CRC check, and a demux frame. From the computing characteristics in
ADSL-TC mentioned earlier, TRX C is proportional to the number of Rx bits carried by each DMT symbol and TRX.TC can be expressed as: RX C = ctRxMt x Ni M + CRXMI (Equ. 5)
In Equation 5, NRX^U is the number of bits in the receiver side. For the fast path (one of two data paths defined in the ADSL standards), if the parity bytes are proportional to the raw data rate (which is generally true in the products of major ACCESS NODE vendors), cRx.bu and CRX^U are constants for a specific processor type. For the interleave path (the other data path defined in the ADSL standards), CRX UI and CRX^U vary with different assignment of R (parity bytes per RS codeword), S (DMT symbols per RS codeword), and D (interleave depth). In practice, however, experiments show that the assignments of R, S
and D with respect to the different data rate in major DSLAMs roughly make ^bu and CftcWr constants. T^OH is the overhead time in the receiver side. For a specific processor type, it is a constant.
TTX.PMD is the processing time of the ADSL-PMD layer related functions in the transmitter side, which includes a sealer, a QAM encoder, and a tone shuffler. TTXIPMD is proportional to the number of active Tx tones. It can be expressed as shown in Equation 6.
TTX.PMD = O^Tx.tone χNτX,tone + Cτx,tone (Equ. 6)
In Equation 6, Nτx,tone is the number of active tones in the transmitter side. For a specific processor type, τχΛone and Cτχ,t0 e are constants for both fast and interleave paths. TTX C is the processing time of the ADSL-TC layer related functions in the transmitter side, which include a framer, an interleaver, a RS encoder, a scrambler, a CRC generator, and mux frame. TTx,τc is proportional to the number of transmission bits carried by a DMT symbol. It can be expressed as shown in Equation 7. TTX.TC = arx.bit x NTx.bit + CTχ,bu (Equ. 7)
NTXM is the number of bits in the transmitter side. Similar to those discussed in TRX C, both ciτχ,bit nd Cτx,bn can be treated as constants in fast and interleave paths. TTX,OH is the overhead time in the transmitter side. For;, a specific processor type, it is a constant. Tsys.oH is the overall system overhead time in the ADSL modem. For a specific processor type, it is a constant.
Maximum Bit Rate for a Given Processing Load
Referring now to Fig. 3, a flow diagram illustrates a scheme 300 for maximizing transferring data bits through subchannels of a communication channel in accordance with a first embodiment of the present invention. Using the computation model of Equations 1 to 6, the scheme 300 automatically adapts a bit rate performance based on a specified processing load.
Initially, the scheme 300 for determining a maximum bit rate for a given processing load, involves the step of calibrating the constants in the ADSL Computation Model, as described in the "Constant Calibration" section below. The various constants are calibrated by an initialization routine run once for each processor. After the constants are calibrated, the method specifies the step of determining an amount of processing time
available, as shown at block 302. This determination is typically based on the computing performance rating of the processor.
At block 303, a bit loading profile is obtained. As specified in the "Bit Loading Profile Establishment" section described below, obtaining the bit loading profile for the transmitting section involves the use of methodology other than those established by the ADSL standards. Next, block 304 shows the step of determining a computation time required to process the data received from each subchannel. This is specified in the "Ttotai. Rχ>totai, and TTX)totai Determination" section below. As shown at block 306, scheme 300 includes the step of selecting a subset of the best subchannels. For example, the largest bit tones from the available tones are selected.
Specifically, after obtaining the bit loading profile at block 303, the number of bits that can be loaded within each subchannel is known: bitst - fltone). Thereafter, the scheme involves the steps of sorting the subchannels according to their bit loading values in the descending order; from the ordered sequence, setting each subcarrier as an active tone at a time; and calculating the accumulated computation time as shown at block 307, which includes the time for both the ADSL-TC and ADSL-PMD layers.-
The scheme further includes the step of repeating the preceding step until the accumulated computation time reaches the specified available processing time; that is, at decision block 308, if the accumulated computation time does not reach the available processing time, the step returns to block 306 until the available processing time is reached. Since this process selects the subcarriers with the higher bit loading first, it maximizes the bit rate for a given available processing time.
Minimum Processing Load For a Given Bit Rate Fig. 4 is a flow diagram illustrating a scheme 400 for transferring data bits through subchannels of a communication channel according to an alternate embodiment of the present invention.
Using the computation model of Fig. 2, the scheme 400 enables the minimization of computing load for a specified bit rate. Initially, scheme 400 involves the step of calibrating the constants in the ADSL Computation Model. See the "Constant
Calibration" section below. For a given processor, the step of calibrating the constants need be done only once. Next, scheme 400 comprises the step of specifying a bit rate, as shown at block 402. In this case, the user need specify only the desired bit rate.
Thereafter, at block 404, a bit loading profile for each of the transmit and receive
directions, as per the "Bit Loading Profile Establishment" section below, is determined. Block 406 illustrates the step of determining a computation time required to process the data received from each subchannel. Block 408 shows the step of selecting a subset of the subchannels to minimize processor utilization at a given bit rate. Specifically, after obtaining the bit loading profile, the number of bits that can be loaded to each subchannel is known: bitsi = f(tonej). Thereafter, the process involves the steps of sorting the subchannels according to their bit loading values in the descending order; from the ordered sequence, setting each subcarrier as an active tone at a time; and calculating the accumulated bit loading as shown at block 409. At decision block 410, the process further comprises the step of repeating the preceding step until the accumulated bit loading reaches the specified bit loading. Since this process selects the subcarriers with the higher bit loading first, it minimizes the subcarriers to achieve the required bit rate, thus, minimizing the processing load.
Various Detailed Algorithms
The following descriptions explain detail the techniques to obtain the computation constants and bit loading profiles required for the above rate adaptations.
I. Constant Calibration The constant factors
CRXM> TRX.OH, a
Tx,tone, C
Tx,tone,
&τx,bit> Cτχ,bu, TTX.OH, and Ts
ys,OH) mentioned above can each be calibrated by an initialization routine run once for a given processor. One such routine includes the steps of setting up the ADSL data pump in a loop back mode, where the signal output at an ADSL-PMD transmitter end (software end or digital end) is routed back to the corresponding beginning of the ADSL-PMD receiver (software beginning or digital beginning); and measuring the time period of TRχ,totai, TR
X.
PMD, and T
RX.
TC with different active receiver tones and bits. According ,to the set of measured T
RXIPMD results, the method includes the step of computing ccgx one and
from Equ. 4 using the least mean square error (MSE) analysis or other standard statistical techniques. For the set of measured T
RX, TC (with different bits per ADSL symbol), the method comprises, computing ^
bu and C
RXM
I for a fast path, and separately computing Rx,bu and Cj t for the interleave path. The computations are done from Equ. 5 using
least mean square error (MSE) analysis or other comparable statistical techniques. To obtain TRX.OH , the method includes the step of averaging Tj .totai - TRX.PMD - TRX
C).
To obtain the factors of aTx,wne, CTx,tone, CCTXML CTx,bu and TTX,OH, the preceding steps, discussed above are implemented, except that the time period is measured on the transmitter side. As for Tsys,oH, it is a constant value which is independent of both the bit loading per symbol and the number of active tones. When the ADSL data pump is not executed, standard software techniques (e.g., elapse time measurement) are used to measure Tsys,oH-
Fig. 5 is a graph showing values of the "processing time" plotted against values of the "number of tones" for several CPU types.
Fig. 6 is a graph showing values of the "processing time" plotted against values of the "receive bits per DMT symbol" for several CPU types. These are actual measurements for ADSL-PMD and ADSL-TC layers in one implementation.
II. T,ola TRX]lnl ,. and TTT ^ Determination
When the goal is to maximize the bit rates based on the available computing resources, the available computation time for both transmitting and receiving must be determined. One method for determining the computation time is as follows.
First, Ttotai is directly determined from the given system specification or via a specified processing load percentage (i.e., T,olaι = CPU load percentage x Tsymb0ι ). Hence, T^totai + TTx,totai = T,otaι - TSys.oH can then be determined.
Tτx,totai can then be determined from either (1) a percentage specified for the summation of the transmission and reception computations, or (2) an estimated time from the specified transmission rate. In the latter case, TTx,totai is estimated from Equ. (3) in the "ADSL Computation Model," from the constants calibrated and from the bit rates specified. T^o^/ can then be determined from the remaining available time.
III. Bit Loading Profile Establishment
As noted, advantageously, a first embodiment of present invention allows a receiver (i.e. local transceiver) to flexibly determine the transmission rate of a transmitter (i.e. remote tranceiver) in a receiving direction (toward the receiver). In addition, the transmission rate at which the receiver transmits to the remote transmitter in a transmitting direction (toward the transmitter) may be flexibly obtained. Further, unlike
conventional communication devices, these transmission rates are correlated to the processing power available to the tranceivers.
To flexibly determine the transmission rate in a receiving direction, for example, a bit loading profile must be obtained by the receiver. As used herein, a bit loading profile contains information that indicates which subchannels are usable and the intended bit rate for each subchannel. That is, the bit loading profile provides the bit rate per tone for each tone. According to ADSL standards, the bit loading profile may be obtained during a handshaking procedure. During the procedure, the transmitter sends a random pattern to the receiver and based on the pattern, the receiver determines which subchannels are usable for the intended transmission. The receiver then forwards to the transmitter, a bit loading profile containing information as to which subchannels are usable. The transmitter can then utilize the bit loading profile for transmitting information to the receiver.
Therefore, the transmitter cannot determine a bit loading profile in the transmitting direction without obtaining a profile from the receiver. Herein lies a further advantage of present invention. In a further embodiment, the present inventions permits the transmitter to determine a bit loading profile in a transmitting direction without input from the remote receiver. The following are methods for obtaining a bit loading profile in the transmitting direction in accordance with the present invention.
Method 1
For a given loop, the method involves the step of initiating the handshaking phase; and thereafter, obtaining a rough estimate of the loop condition from an AGC (automatic gain control) setting placed within the loop.. Based on the rough estimate, a predefined bit loading profile can be used. Although this method is simple, it is not as accurate as other methods described herein.
Method 2
Because the loop for a given ADSL connection does not change, a bit loading profile is measured for the first time and stored for later rate adaptation use. The method involves the step of initiating the standard ADSL handshaking phase for a first time. From, this step, the bit loading results can be sent from the receiver to the remote transmitter. For example, modem 114 receives and stores a bit loading profile from receiver 14 during the first handshaking. Thereafter, the stored bit loading table can be
used to perform the required rate adaptation in subsequent line connections. Although this method is a little more involved, it is more accurate. Moreover, the step of initiating the handshaking phase for a first time need be performed only once, or repeated if there is a significant change in the loop condition.
Method 3
As phone loops and inside home wiring may vary due to various reasons, method 2 can be generalized to store a series of bit loading profiles. When a receiving bit loading profile is received, the receiver uses a stored bit loading profile that matches closest to its received bit loading profile for its transmission side computation.
While the above is a complete description of exemplary specific embodiments of the invention, additional embodiments are also possible. Thus, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims along with their full scope of equivalents.