WO2000069023A3 - Method for correcting dc offsets in a receiver - Google Patents

Method for correcting dc offsets in a receiver Download PDF

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Publication number
WO2000069023A3
WO2000069023A3 PCT/US2000/012805 US0012805W WO0069023A3 WO 2000069023 A3 WO2000069023 A3 WO 2000069023A3 US 0012805 W US0012805 W US 0012805W WO 0069023 A3 WO0069023 A3 WO 0069023A3
Authority
WO
WIPO (PCT)
Prior art keywords
offset
receiver
offsets
correcting
reducing
Prior art date
Application number
PCT/US2000/012805
Other languages
French (fr)
Other versions
WO2000069023A2 (en
Inventor
Zoran Zvonar
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Priority to DE60012504T priority Critical patent/DE60012504T2/en
Priority to DK00928949T priority patent/DK1177602T3/en
Priority to JP2000617521A priority patent/JP4540857B2/en
Priority to EP00928949A priority patent/EP1177602B1/en
Publication of WO2000069023A2 publication Critical patent/WO2000069023A2/en
Publication of WO2000069023A3 publication Critical patent/WO2000069023A3/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/0212Channel estimation of impulse response
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/0224Channel estimation using sounding signals
    • H04L25/0228Channel estimation using sounding signals with direct estimation from sounding signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/024Channel estimation channel estimation algorithms
    • H04L25/0242Channel estimation channel estimation algorithms using matrix methods
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/024Channel estimation channel estimation algorithms
    • H04L25/025Channel estimation channel estimation algorithms using least-mean-square [LMS] method

Abstract

A method for reducing DC offset from a receiver signal (34). The method includes jointly (i.e., simultaneously) estimating such DC offset and channel impulse response (51 and 53), and reducing the DC offset in accordance with the estimated DC offset and the estimate of the channel impulse response (52).
PCT/US2000/012805 1999-05-12 2000-05-11 Method for correcting dc offsets in a receiver WO2000069023A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE60012504T DE60012504T2 (en) 1999-05-12 2000-05-11 CORRECTION OF THE EQUIVALENT SOFTENCE OF A RECEIVER
DK00928949T DK1177602T3 (en) 1999-05-12 2000-05-11 Method for correcting DC offsets in a receiver
JP2000617521A JP4540857B2 (en) 1999-05-12 2000-05-11 Method for correcting DC offset in receiver
EP00928949A EP1177602B1 (en) 1999-05-12 2000-05-11 Method for correcting dc offsets in a receiver

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/310,612 1999-05-12
US09/310,612 US6504884B1 (en) 1999-05-12 1999-05-12 Method for correcting DC offsets in a receiver

Publications (2)

Publication Number Publication Date
WO2000069023A2 WO2000069023A2 (en) 2000-11-16
WO2000069023A3 true WO2000069023A3 (en) 2001-05-25

Family

ID=23203326

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/012805 WO2000069023A2 (en) 1999-05-12 2000-05-11 Method for correcting dc offsets in a receiver

Country Status (6)

Country Link
US (2) US6504884B1 (en)
EP (1) EP1177602B1 (en)
JP (1) JP4540857B2 (en)
DE (1) DE60012504T2 (en)
DK (1) DK1177602T3 (en)
WO (1) WO2000069023A2 (en)

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Also Published As

Publication number Publication date
WO2000069023A2 (en) 2000-11-16
US6504884B1 (en) 2003-01-07
EP1177602A2 (en) 2002-02-06
US6717995B2 (en) 2004-04-06
DK1177602T3 (en) 2004-12-06
DE60012504D1 (en) 2004-09-02
JP4540857B2 (en) 2010-09-08
US20030099310A1 (en) 2003-05-29
EP1177602B1 (en) 2004-07-28
DE60012504T2 (en) 2005-09-01
JP2002544693A (en) 2002-12-24
EP1177602A4 (en) 2003-03-05

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