WO2000068883A2 - Display scaling, based on software or hardware depending on direction - Google Patents

Display scaling, based on software or hardware depending on direction Download PDF

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Publication number
WO2000068883A2
WO2000068883A2 PCT/US2000/012074 US0012074W WO0068883A2 WO 2000068883 A2 WO2000068883 A2 WO 2000068883A2 US 0012074 W US0012074 W US 0012074W WO 0068883 A2 WO0068883 A2 WO 0068883A2
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WO
WIPO (PCT)
Prior art keywords
display
memory
image
pixel
circuit
Prior art date
Application number
PCT/US2000/012074
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French (fr)
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WO2000068883A3 (en
Inventor
Steven C. Lemke
Original Assignee
Palm, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Palm, Inc. filed Critical Palm, Inc.
Priority to CA002370356A priority Critical patent/CA2370356A1/en
Priority to AU48177/00A priority patent/AU4817700A/en
Publication of WO2000068883A2 publication Critical patent/WO2000068883A2/en
Publication of WO2000068883A3 publication Critical patent/WO2000068883A3/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformation in the plane of the image
    • G06T3/40Scaling the whole image or part thereof

Definitions

  • This invention relates to the field of scaling images.
  • the invention relates to a low-cost solution to providing a zoom feature in a computer display.
  • a number of techniques exist for zooming a display screen Many of these techniques rely on a costly hardware horizontal line buffer.
  • a horizontal line buffer is able to hold an entire line of pixels for duplication on subsequent rows; however, this hardware-based solution is not suited for use in a handheld computer where cost and design constraints may prevent the introduction of additional circuitry.
  • the Motorola DRAGONB ALLTM includes a display controller for driving a LCD display; however, the display controller cannot be reprogrammed to provide zooming functionality.
  • a typical handheld computer has a relatively slow processor compared to the 400 MHz, and higher, clock speeds now common in desktop computers.
  • handheld computers operate on battery power so that both the speed and energy constraints limit the usefulness of software based solutions.
  • Some embodiments of the invention include hardware-software combinations that facilitate a low cost zoom feature for a computer.
  • the hardware By using the hardware to zoom the image in one direction, while the software zooms the image in the other direction, the need for a vertical line buffer in the display controller is avoided. Additionally, neither the hardware costs nor the software resources used are large. A software only solution can consume too many processor cycles and too much battery power to be efficient on a low cost computer such as a handheld device.
  • the computer includes a processor coupled to a memory controller and a display controller.
  • the display controller is coupled to the display circuit by way of the pixel replication circuit. This allows the pixels to be replicated, or zoomed, in one direction by the hardware based pixel replication circuit as they are sent to the display circuit.
  • the memory controller is coupled to a memory.
  • the memory includes a display memory.
  • an additional memory access controller is present.
  • the memory access controller provides a mapping between addresses provided by the memory and another address in memory.
  • the functions of the memory access controller are included directly in the memory controller.
  • the replication mode can be enabled and disabled.
  • software running on the processor can signal to enable or disable replication to the display controller.
  • the display controller can then signal the current mode to the pixel replication circuit.
  • the replication mode can affect the way software running on the processor writes to the display memory. In this example, the pixel replication mode is enabled.
  • the software running on the processor signals to the memory controller to store an image in the display memory.
  • the image is stored in the display memory such that when the display controller transfers the image from the display memory to the pixel replication circuit, the image has already been replicated, or zoomed, in a first direction, e.g. vertical.
  • the pixel replication circuit replicates, or zooms, the pixels in a second direction, e.g. horizontal, as the image is transferred from the pixel replication circuit to the display circuit.
  • a set of application program interface (API) calls of the operating system running on the processor are modified.
  • the set includes the API calls that modify the display memory.
  • the modifications cause a write operation to a first row of the display memory to be repeated on one or more subsequent rows. The repeated write operations take place in the corresponding location in the subsequent rows.
  • API calls that read from the display memory can be modified to ensure that only rows with image data are accessed, rather than accessing the rows with duplicate data.
  • the modifications can be made to the software and/or to the memory controller, or memory access controller, if present.
  • write address requests are remapped to different locations. This is to allow for several empty rows between the actual rows of image data in the display memory. When the display controller requests access to the empty rows, the memory controller can map those requests to the corresponding row of image data. The result is that the pixel replication circuit is provided each row of the image multiple times.
  • the pixel replication circuit When the replication mode is enabled, the pixel replication circuit sends each pixel received from the display controller to the display circuit at least twice. The combined result is that the image is zoomed in two directions.
  • Fig. 1 illustrates a handheld computer including one embodiment of the invention.
  • Fig. 2 illustrates the arrangement of the display memory according to one embodiment of the invention.
  • Fig. 3 illustrates the arrangement of the display memory according to one embodiment of the invention.
  • Fig. 4 illustrates the use of a pixel replication circuit on a row of pixels according to one embodiment of the invention.
  • Clara, California, are designed to run at the 160 pixel by 160 pixel resolution of the display.
  • the 160 by 160 pixel region might appear in the center, or a corner, of the higher resolution display surrounded by a border. It would be relatively hard to read text and images because they would appear at half of the height and width they did in the legacy display.
  • One step is to provide a method for allowing new applications to signal that they are capable of using the high resolution display. For example, they might include a flag in the compiled application file, or an instruction in the program might send such a signal. If new applications make use of the signal, then those applications that do not send the signal are the applications that need to have the display zoomed.
  • the next step is to modify the operating system, display drivers, application program interfaces (APIs) for writing to the display and/or the hardware of the computer platform to support a zoomed display.
  • APIs application program interfaces
  • APIs can be added to allow the zoomed display to be scrolled so that the entire zoomed display can be viewed. For example, if a 320 pixel by 320 pixel display is zoomed by a factor of two, it will be twice as wide and twice as high as the 320 pixel by 320 pixel screen. By allowing the zoomed display to be scrolled, the entire 640 pixel by 640 pixel zoomed display can be viewed on the smaller screen.
  • Figure 1 illustrates a hand held computer including one embodiment of the invention.
  • the handheld computer can include handheld computers such as the PalmTM Connected Organizer from 3Com Corporation, Santa Clara, California.
  • the following description lists the elements of Figure 1, their corresponding interconnections and then describes the elements.
  • Figure 1 includes a handheld computer 100.
  • the handheld computer 100 includes an integrated processor 102, a pixel replication circuit 114, a display circuit 1 16, and a memory 112.
  • the handheld computer 100 can also include a memory access controller 110.
  • the integrated processor 102 includes a processor 104, a display controller 106, and a memory controller 108.
  • the display circuit 116 includes a LCD display 118.
  • An address and data bus 120 couples the processor 104, the display controller 106, the memory controller 108, and the memory 112. If a memory access controller 110 is present, the memory access controller 110 is coupled between the memory 112 and the address and data bus 120.
  • the display controller 106 is coupled to the display circuit 116 by display circuit control lines 122.
  • the display controller 106 is coupled to the pixel replication circuit 1 14 by pixel lines 124.
  • the display controller 106 is also coupled to the pixel replication circuit 114 by the enable replication line 126.
  • the pixel replication circuit 114 is coupled to the display circuit 116 by the pixel lines 128.
  • the handheld computer 100 could be a handheld computer such as the PalmTM Connected Organizer from 3Com Corporation, Santa Clara, California, or some other type of handheld computer. Additionally, other types of computers, such as personal computers, could use embodiments of the invention to provide enhanced zoom capabilities at low cost.
  • the integrated processor 102 is a computer processor that includes support components for a computer.
  • the DragonBallTM processor from Motorola Inc., Schaumburg, Illinois, is used as the integrated processor 102.
  • the integrated processor 102 can be replaced with separate components to provide the functions of the integrated processor 102.
  • the integrated processor 102 has a common address and data bus 120 for internal communication between components and external communication with the memory 112.
  • User applications and software are able to execute on the processor 104.
  • the applications and software that run on the processor 104 include: operating systems, organizer programs, expense programs, to-do-list programs, scheduling programs, e-mail programs, synchronization programs, display processing programs, and other types of programs.
  • the display controller 106 operates to transfer a region of the memory 112 to the display circuit 116 as changes are made. This region of the memory 112 is also called the display memory. Programs operating on the processor 104 can display information on the LCD display 118 by writing information to the display memory of the memory 112. When the LCD display 118 is updated by the display controller 106, the new information will be displayed.
  • the memory controller 108 supports access to the memory 112. This may include mapping different banks within the memory 112 to specific addresses or simply changing the communications used on the address and data bus 120 to a suitable format for use in communicating with the memory 112.
  • the memory access controller 110 is an optional component that can be used to further control access to the memory 112.
  • the memory access controller 110 could be used to detect accesses by the display controller 106 to read the display memory out of the memory 112 and maps the address to a different location in the display memory in some embodiments of the invention.
  • the functionality of the memory controller 108 and the memory access controller 110 can be combined.
  • the memory controller 108 is programmable, memory access control features of the memory access controller 110 can be incorporated into the memory controller 108.
  • the enable replication line 126 controls whether or not the pixel replication circuit 114 zooms the image. If multiple zoom factors are supported, the enable replication line 126 can control the zoom factor.
  • the pixel replication circuit 1 14 passes data on the pixel lines 124 out to the pixel lines 128 without modifying the data.
  • the pixel replication circuit 114 will replicate pixel data received over the pixel lines 124 while transmitting the pixel data out over the pixel lines 128.
  • the display circuit control lines 122 are used by the display controller 106 to control the display circuit 116. In some embodiments, the display circuit control lines 122 are coupled to the pixel replication circuit 114.
  • the application program interface (API) routines that modify the display memory of the memory 112 are modified to support the zoom function in a first direction. If individual programs operating on the handheld computer 100 directly modify the display memory, then it may be necessary to modify the screen drawing routines of those programs. In some embodiments, the API routines of the operating system are modified to support the zoom function. Additionally, a new API routine can be added to the operating system, if needed, to allow a program running on the handheld computer 100 to signal whether or not the zoom function should be enabled. If the software API for screen drawing routines perform the zoom in a first direction, the pixel replication circuit 1 14 can perform the zoom in the other direction.
  • API application program interface
  • the pixel replication circuit 1 14 provides horizontal replication. The effect is a display zoomed by a factor of two in both directions.
  • the memory access controller 110 can be modified to provide every line of the display memory to the display controller 106 twice.
  • the display memory includes the image at normal height, but the memory access controller 110 provides each line of the image to the display controller 106 two or more times.
  • the pixel replication circuit 114 receives an image zoomed vertically that can be zoomed horizontally before being sent to the display circuit 116. These embodiments further reduce processing time because the image data does not need to be written to the display memory multiple times.
  • the display memory includes blank rows to simplify the design of the memory access controller 110.
  • the software can be modified to write to the display memory to leave blank rows.
  • FIG. 2 illustrates the arrangement of the display memory according to one embodiment of the invention. This could be the configuration of the display memory for the handheld computer 100 according to the embodiments of the invention where the memory access controller 1 10 is not used.
  • Figure 2 includes the memory 112.
  • the memory 112 includes a display memory 200.
  • the display memory 200 includes a row 202 and a row 204.
  • the row 202 includes a pixel 206.
  • the row 204 includes a pixel 208.
  • the display memory 200 is a region of the memory 112 that is transferred periodically to the display circuit 116 by the display controller 106. If the LCD display 118 is a 320 pixel by 320 pixel display, but the images are 160 pixels by 160 pixels, a zoom factor of two would allow the entire LCD display 118 to be used while displaying the smaller images.
  • the image to be zoomed is 160 pixels wide by 160 pixels high.
  • Figure 2 shows how the image can be stored in the memory 112 to support a zoomed image at low cost.
  • the pixels are indicated by their coordinate location.
  • the pixel 206 is shown by its corresponding coordinate location, [0,0].
  • the value of the pixel 206 could be represented by a single bit for black and white displays, or the value might be represented by multiple bits, such as a two bit value for a gray-scale lookup table, an eight bit value for a color lookup table, or a 24 bit value for photo-realistic color.
  • the row 202 includes the 160 pixels comprising the of the first row of the image.
  • the row 204 is a copy of the first row in another location in the display memory 200.
  • the display controller 106 reads all 320 lines of the display memory 200, it will send 320 lines to the pixel replication circuit 1 14. If the enable replication line 126 is active, the pixel replication circuit 114 will double the width of all of the lines by replicating each pixel before sending it to the display circuit 116. Other magnification factors are similarly possible. For example, for a zoom factor n, n - 1 additional copies of each row can be stored in the display memory 200 and the pixel replication circuit 114 can make n — l copies of each pixel before transmitting the pixels to the display circuit 116.
  • three additional copies of each row can be stored in the display memory 200 for a total of 640 rows.
  • the display controller 106 sends the 640 rows out to the pixel replication circuit, three additional copies of each pixel will be sent to the display circuit 116 to produce a 640 pixel by 640 pixel display from the 160 pixel by 160 pixel image.
  • the pixel replication circuit 114 can handle the replication in the second direction with minimal buffering of pixel values from a single row.
  • a pixel value width latch, or register is used.
  • a small buffer capable of holding pixel values for approximately half of the pixels in the row can be used. For larger magnification factors, larger buffers approaching the row size may be necessary.
  • the size of the buffer is r(n -l) given by the formula — , where r is the row size, and n is the zoom factor. n
  • the remaining step is to modify software that writes to the display memory
  • the display memory is row oriented and so the software should zoom the image in the vertical direction and the pixel replication circuit 114 can zoom the image in the horizontal direction. It is possible for the reverse to take place with software zooming the image horizontally while the pixel replication circuit 114 zooms the image vertically.
  • the modifications to the software running on the processor 104 include modifying write operations to the row 202 so that the write operation is repeated in the corresponding location of row 204. For example, if the pixel 206 has its value set written to one, black, then the software will also write a one into the corresponding pixel location in row 204 (e.g., pixel 208).
  • additional write operations can be performed by the software in subsequent rows at the corresponding location. No additional computation is needed other than computing the destination address. For example, when a single pixel change is made to the display memory, a mask is created to prevent modification of the surrounding pixels when writing the byte data including the changed pixel to the display memory. The subsequent writes do not require recomputation of the mask.
  • the changes to the drivers and APIs affect existing applications that were not developed for the higher resolution display. However, it may also be possible to use these changes for new applications to provide a display zoom option. Thus, once an application signals that it is aware of the higher resolution display, the changes described are not implemented for drawing operations from that program. Because existing applications do not send the signal, the drawing operations will occur as described providing a zoomed display.
  • Fig. 3 illustrates the arrangement of the display memory according to one embodiment of the invention. This could be the configuration of the display memory for the handheld computer 100 according to the embodiments of the invention where the memory access controller 110 is not used. As noted, the functionality of the memory access controller 110 can be incorporated into the memory controller 108 in some embodiments of the invention. In the following discussion, references to the memory access controller 110 also refers to a memory controller 108 capable of supporting the described functions.
  • Figure 3 includes the memory 1 12.
  • the memory 1 12 includes the display memory 300.
  • the display memory 300 includes the row 302 and the empty row 304.
  • the display memory 300 is a region of the memory 112 that is transferred periodically to the display circuit 116 by the display controller 106. If the LCD display 118 is a 320 pixel by 320 pixel display, but the images are 160 pixels by 160 pixels, a zoom factor of two would allow the entire LCD display 118 to be used while displaying the smaller images.
  • the image to be zoomed is 160 pixels wide by 160 pixels high.
  • Figure 3 shows how the image can be stored in the memory 112 to support a zoomed image at low cost.
  • the pixels are indicated by their coordinate location and an additional unused portion of the display memory 300 is denoted by the term "PAD" indicating that the row is padded out.
  • the row is padded out to the least greatest power of two in bytes greater than the minimum number of bytes. For example, with an image width of 160 pixels, and two bits of data for the value of each pixel, requires a minimum of
  • the padding can be zeroes, or any other data as the contents of the padding will not be displayed.
  • the padding allows the memory access controller 1 10 to be simplified.
  • padding is not used and the memory access controller uses counters to map memory requests from the display controller 106 to the correct location.
  • additional empty rows can be maintained and the mapping functions of the memory access controller can be modified to map requests for empty rows to the corresponding row with information. For example, if the zoom factor is n, then each row with pixel data will be followed by n - 1 blank rows. The memory access controller 110 will map accesses to the blank rows by the display controller 106 to the corresponding row with pixel data.
  • the function of the pixel replication circuit 114 is the same in these embodiments as in the embodiments that lack the memory access controller 1 10.
  • the display memory 300 is organized differently than the display memory 200 to support the zoom feature.
  • the software that writes to the display memory 300 may need modification to support the configuration of the screen memory. For example, the first row of the image, row 302, is written at the start of the display memory 300; however, it is followed by the empty row 304, not the second row of the image. For this reason. the display memory 320 will have 320 rows for an image with 160 rows.
  • padding of the rows to a power of two may be desirable to reduce the memory hardware overhead associated with this embodiment. For example, if each pixel is two bits, so that 40 bytes of memory are used for each row, there could be 24 additional bytes of padding to make the row 64 bytes, or 2 6 wide.
  • software accessing the display memory 300 should be adjusted so that a memory access for the first pixel of a row of the image is not made into the padding, or empty space, of a previous row. This adjustment can be made in the drivers.
  • the software does not need to be modified and the memory access controller 110 supports modified read and write operations for all addresses in the display memory.
  • the memory access controller 110 allows the display memory 300 to be accessed as if it were a 160 by 160 pixel display memory.
  • the memory access controller 110 may perform a different set of mappings to requests coming from the display controller 106.
  • Figure 4 illustrates the use of a pixel replication circuit on a row of pixels according to one embodiment of the invention.
  • the pixel replication circuit 114 can operate on both the display memory 200 and the display memory 300 without modification.
  • the pixel replication circuit 114 is used to complete the zoom in the remaining direction of the image as the display memory 200 or the display memory 300 is transferred to the display circuit 116 by the display controller 106.
  • the pixel lines 124 are used to transmit a row of pixels at a time from the display controller 106 to the pixel replication circuit 114. Any padding present in the display memory 300 need not be transmitted. Alternatively, the pixel replication circuit 114 can ignore any padding.
  • the enable replication line 126 is set to enabled in Figure 4. If multiple magnification factors are supported, the zoom factor can be provided over the enable replication line 126.
  • the pixel replication circuit 114 produces an output comprising pixels values sent over the pixel lines 128 to the display circuit 116.
  • the output on the pixel lines 128 will contain the pixel 400A followed by at least one copy, e.g. pixel 400B, of pixel 400A.
  • the copy will have the same pixel value as the original. For example, if pixel 400A is a black pixel, then the pixel 400B will be a black pixel. Because each of the pixels in an row sent over the pixel lines 124 is replicated at least once, the output row sent to the display circuit 116 is at least twice as wide as the starting row. This means that the image has now been zoomed in one direction. If the image was previously zoomed in the other direction, the result is an image zoomed in two directions.
  • the pixel replication circuit 114 may include some buffer memory for temporarily storing a portion of the pixel data received over the pixel lines 124 while the pixels are being replicated. However, a horizontal line buffer is not needed. Typically, for a zoom factor of two, a latch, or register, is all that is needed to hold each pixel as it is clocked out twice to the display circuit. In other embodiments, a larger buffer is used. The pixel replication circuit 114 will maintain the pixel delivery timing with the display circuit 116.
  • a zoom factor is selected.
  • An image is zoomed in the display memory in one direction.
  • the zoom is based on the zoom factor.
  • the image is transferred to the display, the image is zoomed in the other direction based on the zoom factor.
  • Some embodiments of the invention are designed for use in handheld computers. Some embodiments of the invention support zoom capabilities. Some embodiments of the invention allow applications targeted for a first display resolution to be used on a display with a higher resolution without modification.

Abstract

A method of providing a zoom feature for a handheld computer is described. The method uses a combination of software and hardware to provide the display zoom without using significant processor resources, or adding dedicated zooming hardware to the display. The method includes storing the image for the display in a memory and using the processor and the memory controller to store the image so that when it is retrieved by the display controller, for transfer to the display circuit, it is already zoomed in a fist direction. The method also includes using a pixel replication circuit to provide the replication of pixels in the other direction. The pixel replication cicuit takes a row of pixels and doubles each pixel in the row. This combination allows for the consumption of relatively little processing resources and does not require extensive additional hardware. In some embodiments, the operating system software and other software that writes to the display memory is modified so that write operations occur multiple times to provide the zoom effect. In other embodiments, the display software is modified to leave empty rows in the display memory. A memory access controller can map a request by the display controller for pixel data from an empty row onto the corresponding row with pixel data.

Description

METHOD AND APPARATUS FOR PROVIDING SCALING OF A
DISPLAY
BACKGROUND OF THE INVENTION
Field of the Invention This invention relates to the field of scaling images. In particular, the invention relates to a low-cost solution to providing a zoom feature in a computer display.
Description of the Related Art
A number of techniques exist for zooming a display screen. Many of these techniques rely on a costly hardware horizontal line buffer. A horizontal line buffer is able to hold an entire line of pixels for duplication on subsequent rows; however, this hardware-based solution is not suited for use in a handheld computer where cost and design constraints may prevent the introduction of additional circuitry.
For example, the Motorola DRAGONB ALL™ includes a display controller for driving a LCD display; however, the display controller cannot be reprogrammed to provide zooming functionality.
Solutions that solely use software to zoom the display may require more processing power than handheld computers can support. A typical handheld computer has a relatively slow processor compared to the 400 MHz, and higher, clock speeds now common in desktop computers. Similarly, handheld computers operate on battery power so that both the speed and energy constraints limit the usefulness of software based solutions.
If prior techniques are used, the hardware and software processing costs are too great to cost effectively provide a zoom feature. Accordingly, what is needed is a method and apparatus for providing a zoom feature on a low-cost, handheld computer.
SUMMARY OF THE INVENTION
Some embodiments of the invention include hardware-software combinations that facilitate a low cost zoom feature for a computer. By using the hardware to zoom the image in one direction, while the software zooms the image in the other direction, the need for a vertical line buffer in the display controller is avoided. Additionally, neither the hardware costs nor the software resources used are large. A software only solution can consume too many processor cycles and too much battery power to be efficient on a low cost computer such as a handheld device.
In some embodiments, the computer includes a processor coupled to a memory controller and a display controller. The display controller is coupled to the display circuit by way of the pixel replication circuit. This allows the pixels to be replicated, or zoomed, in one direction by the hardware based pixel replication circuit as they are sent to the display circuit. The memory controller is coupled to a memory. The memory includes a display memory.
In some embodiments, an additional memory access controller is present. The memory access controller provides a mapping between addresses provided by the memory and another address in memory. In some embodiments, the functions of the memory access controller are included directly in the memory controller.
In some embodiments, the replication mode can be enabled and disabled. In these embodiments, software running on the processor can signal to enable or disable replication to the display controller. The display controller can then signal the current mode to the pixel replication circuit. Additionally, the replication mode can affect the way software running on the processor writes to the display memory. In this example, the pixel replication mode is enabled.
In some embodiments, the software running on the processor signals to the memory controller to store an image in the display memory. The image is stored in the display memory such that when the display controller transfers the image from the display memory to the pixel replication circuit, the image has already been replicated, or zoomed, in a first direction, e.g. vertical.
In some embodiments, the pixel replication circuit replicates, or zooms, the pixels in a second direction, e.g. horizontal, as the image is transferred from the pixel replication circuit to the display circuit.
In some embodiments, a set of application program interface (API) calls of the operating system running on the processor are modified. The set includes the API calls that modify the display memory. In some embodiments, the modifications cause a write operation to a first row of the display memory to be repeated on one or more subsequent rows. The repeated write operations take place in the corresponding location in the subsequent rows. These modifications allow the image to be stored in the display memory replicated, or zoomed, in a first direction. Similarly, API calls that read from the display memory can be modified to ensure that only rows with image data are accessed, rather than accessing the rows with duplicate data.
In other embodiments, the modifications can be made to the software and/or to the memory controller, or memory access controller, if present. In these embodiments, write address requests are remapped to different locations. This is to allow for several empty rows between the actual rows of image data in the display memory. When the display controller requests access to the empty rows, the memory controller can map those requests to the corresponding row of image data. The result is that the pixel replication circuit is provided each row of the image multiple times.
When the replication mode is enabled, the pixel replication circuit sends each pixel received from the display controller to the display circuit at least twice. The combined result is that the image is zoomed in two directions.
BRIEF DESCRIPTION OF THE FIGURES
Fig. 1 illustrates a handheld computer including one embodiment of the invention.
Fig. 2 illustrates the arrangement of the display memory according to one embodiment of the invention.
Fig. 3 illustrates the arrangement of the display memory according to one embodiment of the invention.
Fig. 4 illustrates the use of a pixel replication circuit on a row of pixels according to one embodiment of the invention.
DETAILED DESCRIPTION
A. Introduction
It is common for applications targeted for a specific computer platform to have embedded standard values, e.g. display size, etc. So for example, applications targeted for the Palm™ Connected Organizer from 3Com Corporation, Santa
Clara, California, are designed to run at the 160 pixel by 160 pixel resolution of the display.
If a higher resolution device is later added to the platform, the older applications would not be able to take advantage of the higher resolutions. For example, if the screen resolution is doubled to 320 by 320 pixels, existing applications will only appear on a 160 by 160 pixel region of the new display.
For example, the 160 by 160 pixel region might appear in the center, or a corner, of the higher resolution display surrounded by a border. It would be relatively hard to read text and images because they would appear at half of the height and width they did in the legacy display.
Without recompiling, and perhaps also rewriting, the applications, a method for enabling the existing applications to take advantage of the higher resolution display may be useful.
One step is to provide a method for allowing new applications to signal that they are capable of using the high resolution display. For example, they might include a flag in the compiled application file, or an instruction in the program might send such a signal. If new applications make use of the signal, then those applications that do not send the signal are the applications that need to have the display zoomed. The next step is to modify the operating system, display drivers, application program interfaces (APIs) for writing to the display and/or the hardware of the computer platform to support a zoomed display.
In many environments, this would be done with a vertical line buffer, or through modifications of the display controller. However, in a handheld computer, these solutions may be too expensive from a cost, performance, and time to market standpoint. Therefore, some embodiments of the invention are designed to minimize hardware costs and software performance costs in handheld computers. Also, it may be possible to allow new applications to make explicit use of the zoom feature through additional APIs. In these embodiments, APIs can be added to allow the zoomed display to be scrolled so that the entire zoomed display can be viewed. For example, if a 320 pixel by 320 pixel display is zoomed by a factor of two, it will be twice as wide and twice as high as the 320 pixel by 320 pixel screen. By allowing the zoomed display to be scrolled, the entire 640 pixel by 640 pixel zoomed display can be viewed on the smaller screen.
B. System
Figure 1 illustrates a hand held computer including one embodiment of the invention. In some embodiments, the handheld computer can include handheld computers such as the Palm™ Connected Organizer from 3Com Corporation, Santa Clara, California. The following description lists the elements of Figure 1, their corresponding interconnections and then describes the elements.
The following paragraph lists the elements of Figure 1. Figure 1 includes a handheld computer 100. The handheld computer 100 includes an integrated processor 102, a pixel replication circuit 114, a display circuit 1 16, and a memory 112. Optionally, the handheld computer 100 can also include a memory access controller 110. The integrated processor 102 includes a processor 104, a display controller 106, and a memory controller 108. The display circuit 116 includes a LCD display 118.
The following paragraph describes the connections between the elements of Figure 1. An address and data bus 120 couples the processor 104, the display controller 106, the memory controller 108, and the memory 112. If a memory access controller 110 is present, the memory access controller 110 is coupled between the memory 112 and the address and data bus 120. The display controller 106 is coupled to the display circuit 116 by display circuit control lines 122. The display controller 106 is coupled to the pixel replication circuit 1 14 by pixel lines 124. The display controller 106 is also coupled to the pixel replication circuit 114 by the enable replication line 126. The pixel replication circuit 114 is coupled to the display circuit 116 by the pixel lines 128. The following describes the uses of the elements of Figure 1. The handheld computer 100 could be a handheld computer such as the Palm™ Connected Organizer from 3Com Corporation, Santa Clara, California, or some other type of handheld computer. Additionally, other types of computers, such as personal computers, could use embodiments of the invention to provide enhanced zoom capabilities at low cost.
The integrated processor 102 is a computer processor that includes support components for a computer. In some embodiments, the DragonBall™ processor from Motorola Inc., Schaumburg, Illinois, is used as the integrated processor 102. In other embodiments, the integrated processor 102 can be replaced with separate components to provide the functions of the integrated processor 102.
The integrated processor 102 has a common address and data bus 120 for internal communication between components and external communication with the memory 112. User applications and software are able to execute on the processor 104. The applications and software that run on the processor 104 include: operating systems, organizer programs, expense programs, to-do-list programs, scheduling programs, e-mail programs, synchronization programs, display processing programs, and other types of programs.
The display controller 106 operates to transfer a region of the memory 112 to the display circuit 116 as changes are made. This region of the memory 112 is also called the display memory. Programs operating on the processor 104 can display information on the LCD display 118 by writing information to the display memory of the memory 112. When the LCD display 118 is updated by the display controller 106, the new information will be displayed. The memory controller 108 supports access to the memory 112. This may include mapping different banks within the memory 112 to specific addresses or simply changing the communications used on the address and data bus 120 to a suitable format for use in communicating with the memory 112.
The memory access controller 110 is an optional component that can be used to further control access to the memory 112. For example, the memory access controller 110 could be used to detect accesses by the display controller 106 to read the display memory out of the memory 112 and maps the address to a different location in the display memory in some embodiments of the invention. In some embodiments, the functionality of the memory controller 108 and the memory access controller 110 can be combined. For example, if the memory controller 108 is programmable, memory access control features of the memory access controller 110 can be incorporated into the memory controller 108. The enable replication line 126 controls whether or not the pixel replication circuit 114 zooms the image. If multiple zoom factors are supported, the enable replication line 126 can control the zoom factor. When the enable replication line 126 is set to disabled, the pixel replication circuit 1 14 passes data on the pixel lines 124 out to the pixel lines 128 without modifying the data. When the enable replication line 126 is set to enabled, the pixel replication circuit 114 will replicate pixel data received over the pixel lines 124 while transmitting the pixel data out over the pixel lines 128.
The display circuit control lines 122 are used by the display controller 106 to control the display circuit 116. In some embodiments, the display circuit control lines 122 are coupled to the pixel replication circuit 114.
In some embodiments, the application program interface (API) routines that modify the display memory of the memory 112 are modified to support the zoom function in a first direction. If individual programs operating on the handheld computer 100 directly modify the display memory, then it may be necessary to modify the screen drawing routines of those programs. In some embodiments, the API routines of the operating system are modified to support the zoom function. Additionally, a new API routine can be added to the operating system, if needed, to allow a program running on the handheld computer 100 to signal whether or not the zoom function should be enabled. If the software API for screen drawing routines perform the zoom in a first direction, the pixel replication circuit 1 14 can perform the zoom in the other direction. For example, if the software screen drawing routines write every row of an image to the display memory twice, then a screen that is twice the normal height is created. The pixel replication circuit 1 14 provides horizontal replication. The effect is a display zoomed by a factor of two in both directions.
In other embodiments, the memory access controller 110, or the memory controller 108, can be modified to provide every line of the display memory to the display controller 106 twice. In this embodiment, the display memory includes the image at normal height, but the memory access controller 110 provides each line of the image to the display controller 106 two or more times. The pixel replication circuit 114 receives an image zoomed vertically that can be zoomed horizontally before being sent to the display circuit 116. These embodiments further reduce processing time because the image data does not need to be written to the display memory multiple times. However, in some embodiments where the memory access controller 110 is used, the display memory includes blank rows to simplify the design of the memory access controller 110. In these embodiments, the software can be modified to write to the display memory to leave blank rows.
C. Software-Hardware Zoom without a Memory Access Controller
Figure 2 illustrates the arrangement of the display memory according to one embodiment of the invention. This could be the configuration of the display memory for the handheld computer 100 according to the embodiments of the invention where the memory access controller 1 10 is not used.
The following paragraph lists the elements of Figure 2. Figure 2 includes the memory 112. The memory 112 includes a display memory 200. The display memory 200 includes a row 202 and a row 204. The row 202 includes a pixel 206. The row 204 includes a pixel 208. The following describes the uses of the elements of Figure 2. The display memory 200 is a region of the memory 112 that is transferred periodically to the display circuit 116 by the display controller 106. If the LCD display 118 is a 320 pixel by 320 pixel display, but the images are 160 pixels by 160 pixels, a zoom factor of two would allow the entire LCD display 118 to be used while displaying the smaller images.
In this example, the image to be zoomed is 160 pixels wide by 160 pixels high. Figure 2 shows how the image can be stored in the memory 112 to support a zoomed image at low cost. The pixels are indicated by their coordinate location. For example, the pixel 206 is shown by its corresponding coordinate location, [0,0]. The value of the pixel 206 could be represented by a single bit for black and white displays, or the value might be represented by multiple bits, such as a two bit value for a gray-scale lookup table, an eight bit value for a color lookup table, or a 24 bit value for photo-realistic color. The row 202 includes the 160 pixels comprising the of the first row of the image. The row 204 is a copy of the first row in another location in the display memory 200.
Because all of the rows of the image are duplicated in the following row, when the display controller 106 reads all 320 lines of the display memory 200, it will send 320 lines to the pixel replication circuit 1 14. If the enable replication line 126 is active, the pixel replication circuit 114 will double the width of all of the lines by replicating each pixel before sending it to the display circuit 116. Other magnification factors are similarly possible. For example, for a zoom factor n, n - 1 additional copies of each row can be stored in the display memory 200 and the pixel replication circuit 114 can make n — l copies of each pixel before transmitting the pixels to the display circuit 116. Thus for a zoom factor of four, three additional copies of each row can be stored in the display memory 200 for a total of 640 rows. As the display controller 106 sends the 640 rows out to the pixel replication circuit, three additional copies of each pixel will be sent to the display circuit 116 to produce a 640 pixel by 640 pixel display from the 160 pixel by 160 pixel image.
The pixel replication circuit 114 can handle the replication in the second direction with minimal buffering of pixel values from a single row. In some embodiments, a pixel value width latch, or register, is used. In other embodiments, a small buffer capable of holding pixel values for approximately half of the pixels in the row can be used. For larger magnification factors, larger buffers approaching the row size may be necessary. In some embodiments, the size of the buffer is r(n -l) given by the formula — , where r is the row size, and n is the zoom factor. n The remaining step is to modify software that writes to the display memory
200 to zoom the image in a first direction. In this example, the display memory is row oriented and so the software should zoom the image in the vertical direction and the pixel replication circuit 114 can zoom the image in the horizontal direction. It is possible for the reverse to take place with software zooming the image horizontally while the pixel replication circuit 114 zooms the image vertically. The modifications to the software running on the processor 104 include modifying write operations to the row 202 so that the write operation is repeated in the corresponding location of row 204. For example, if the pixel 206 has its value set written to one, black, then the software will also write a one into the corresponding pixel location in row 204 (e.g., pixel 208). When larger zoom factors are used, additional write operations can be performed by the software in subsequent rows at the corresponding location. No additional computation is needed other than computing the destination address. For example, when a single pixel change is made to the display memory, a mask is created to prevent modification of the surrounding pixels when writing the byte data including the changed pixel to the display memory. The subsequent writes do not require recomputation of the mask.
The changes to the drivers and APIs affect existing applications that were not developed for the higher resolution display. However, it may also be possible to use these changes for new applications to provide a display zoom option. Thus, once an application signals that it is aware of the higher resolution display, the changes described are not implemented for drawing operations from that program. Because existing applications do not send the signal, the drawing operations will occur as described providing a zoomed display.
D. Software-Hardware Zoom with a Memory Access Controller
Fig. 3 illustrates the arrangement of the display memory according to one embodiment of the invention. This could be the configuration of the display memory for the handheld computer 100 according to the embodiments of the invention where the memory access controller 110 is not used. As noted, the functionality of the memory access controller 110 can be incorporated into the memory controller 108 in some embodiments of the invention. In the following discussion, references to the memory access controller 110 also refers to a memory controller 108 capable of supporting the described functions.
The following lists the elements of Figure 3. Figure 3 includes the memory 1 12. The memory 1 12 includes the display memory 300. The display memory 300 includes the row 302 and the empty row 304. The following describes the uses of the elements of Figure 3. The display memory 300 is a region of the memory 112 that is transferred periodically to the display circuit 116 by the display controller 106. If the LCD display 118 is a 320 pixel by 320 pixel display, but the images are 160 pixels by 160 pixels, a zoom factor of two would allow the entire LCD display 118 to be used while displaying the smaller images.
In this example, the image to be zoomed is 160 pixels wide by 160 pixels high. Figure 3 shows how the image can be stored in the memory 112 to support a zoomed image at low cost. The pixels are indicated by their coordinate location and an additional unused portion of the display memory 300 is denoted by the term "PAD" indicating that the row is padded out.
Typically, the row is padded out to the least greatest power of two in bytes greater than the minimum number of bytes. For example, with an image width of 160 pixels, and two bits of data for the value of each pixel, requires a minimum of
160 pixels = 40 bytes . Therefore, at least 26 bytes, or 64, should be pixel Sbits used with the latter 24 bytes comprising the padding. The padding can be zeroes, or any other data as the contents of the padding will not be displayed. The padding allows the memory access controller 1 10 to be simplified.
Using a power of two allows the memory access controller to use a mask on the rth bit of memory access requests. For example, if / = 6, then an address request from the display controller 106 for " ...0000111 1 " will be unchanged by the memory access controller 110. In contrast, when the display controller 106 finishes requesting the last bit in the current row (e.g. the row 302) at
"...00011111", the next request for "...00100000" will have the th bit masked.
The result being that instead of accessing an empty row (e.g. the empty row 304), the request will be mapped to the corresponding location in the corresponding row
"...00000000". The mapping operation of the memory access controller 110 can be implemented as follows: if (display controller read) then mapped address = requested address AND NOT mask else mapped address = requested address end if In this embodiment, the mask is only enabled if the display controller 106 is reading from the display memory. The mask is a vector of bits with the z'th bit set to one, e.g. "...00100000" for i = 6. So for example, if the display controller 106 requests a read operation from the address "...00100000", then the mapped address = "...00100000" AND NOT "...00100000" = "...00000000" because the display controller is reading. If another program attempted to read from "...00100000", the mapped address would be "...00100000".
In some embodiments, padding is not used and the memory access controller uses counters to map memory requests from the display controller 106 to the correct location. For larger zoom factors, additional empty rows can be maintained and the mapping functions of the memory access controller can be modified to map requests for empty rows to the corresponding row with information. For example, if the zoom factor is n, then each row with pixel data will be followed by n - 1 blank rows. The memory access controller 110 will map accesses to the blank rows by the display controller 106 to the corresponding row with pixel data.
The function of the pixel replication circuit 114 is the same in these embodiments as in the embodiments that lack the memory access controller 1 10. In these embodiments, the display memory 300 is organized differently than the display memory 200 to support the zoom feature.
The software that writes to the display memory 300 may need modification to support the configuration of the screen memory. For example, the first row of the image, row 302, is written at the start of the display memory 300; however, it is followed by the empty row 304, not the second row of the image. For this reason. the display memory 320 will have 320 rows for an image with 160 rows.
Additionally, padding of the rows to a power of two may be desirable to reduce the memory hardware overhead associated with this embodiment. For example, if each pixel is two bits, so that 40 bytes of memory are used for each row, there could be 24 additional bytes of padding to make the row 64 bytes, or 26 wide. Thus, software accessing the display memory 300 should be adjusted so that a memory access for the first pixel of a row of the image is not made into the padding, or empty space, of a previous row. This adjustment can be made in the drivers. In some embodiments, the software does not need to be modified and the memory access controller 110 supports modified read and write operations for all addresses in the display memory. In this embodiment, the memory access controller 110 allows the display memory 300 to be accessed as if it were a 160 by 160 pixel display memory. The memory access controller 110 may perform a different set of mappings to requests coming from the display controller 106.
E. Pixel Replication Circuit
Figure 4 illustrates the use of a pixel replication circuit on a row of pixels according to one embodiment of the invention. The pixel replication circuit 114 can operate on both the display memory 200 and the display memory 300 without modification. The pixel replication circuit 114 is used to complete the zoom in the remaining direction of the image as the display memory 200 or the display memory 300 is transferred to the display circuit 116 by the display controller 106.
The pixel lines 124 are used to transmit a row of pixels at a time from the display controller 106 to the pixel replication circuit 114. Any padding present in the display memory 300 need not be transmitted. Alternatively, the pixel replication circuit 114 can ignore any padding.
The enable replication line 126 is set to enabled in Figure 4. If multiple magnification factors are supported, the zoom factor can be provided over the enable replication line 126. The pixel replication circuit 114 produces an output comprising pixels values sent over the pixel lines 128 to the display circuit 116.
If the pixel lines 124 contain a pixel 400A, then the output on the pixel lines 128 will contain the pixel 400A followed by at least one copy, e.g. pixel 400B, of pixel 400A. The copy will have the same pixel value as the original. For example, if pixel 400A is a black pixel, then the pixel 400B will be a black pixel. Because each of the pixels in an row sent over the pixel lines 124 is replicated at least once, the output row sent to the display circuit 116 is at least twice as wide as the starting row. This means that the image has now been zoomed in one direction. If the image was previously zoomed in the other direction, the result is an image zoomed in two directions.
The pixel replication circuit 114 may include some buffer memory for temporarily storing a portion of the pixel data received over the pixel lines 124 while the pixels are being replicated. However, a horizontal line buffer is not needed. Typically, for a zoom factor of two, a latch, or register, is all that is needed to hold each pixel as it is clocked out twice to the display circuit. In other embodiments, a larger buffer is used. The pixel replication circuit 114 will maintain the pixel delivery timing with the display circuit 116.
F. Conclusion
In some embodiments of the invention, a zoom factor is selected. An image is zoomed in the display memory in one direction. The zoom is based on the zoom factor. As the image is transferred to the display, the image is zoomed in the other direction based on the zoom factor.
Accordingly, a method and apparatus for providing scaling of a display has been described. Some embodiments of the invention are designed for use in handheld computers. Some embodiments of the invention support zoom capabilities. Some embodiments of the invention allow applications targeted for a first display resolution to be used on a display with a higher resolution without modification.
The foregoing descriptions of various embodiments of the invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise forms disclosed. Many modifications and equivalent arrangements will be apparent.

Claims

CLAIMSWhat is claimed is:
1. A method of pixel replication in a computer, the computer including a processor, the processor coupled to a memory controller and a display controller, the display controller coupled to a pixel replication circuit and a display circuit, the pixel replication circuit coupled to the display circuit, the memory controller coupled to a memory, the memory including a display memory, the method comprising: enabling a replication mode; storing an image in the display memory using the processor and the memory controller, the image stored in the display memory such that when the display controller transfers the image from the display memory to the pixel replication circuit, the image has been replicated in a first direction of the image; and using the pixel replication circuit to replicate the image in a second direction of the image as the image is transferred from the pixel replication circuit to the display circuit.
2. The method of claim 1, wherein the storing an image in the display memory using the processor and the memory controller further comprises using the processor to execute a program to provide line replication of the image in the display memory in the first direction of the image.
3. The method of claim 2, wherein the display memory is comprised of a sequence of lines in the first direction of the image, and the using the processor to execute the program to provide line replication of the image in the display memory in the first direction of the image comprises repeating a write operation of data to a line in the sequence of lines of at least one subsequent line in the sequence of lines in a corresponding location in the at least one subsequent line.
4. The method of claim 1 , wherein the storing an image in the display memory using the processor and the memory controller further comprises using the memory controller to modify a write operation to the display memory such that an address associated with the write operation is altered.
5. The method of claim 4, wherein the image has a size in the first direction, and the display memory is comprised of a sequence of lines in the first direction of the image, the sequence of lines including at least twice as many lines as the size of the image, the sequence of lines including data corresponding to the image on a subset lines in the sequence of lines, and wherein the using the memory controller to modify the write operation to the display memory comprises adjusting the address associated with the write operation to a line in the subset of lines including data corresponding to the image.
6. The method of claim 5, further comprising modifying the memory controller such that a read operation by the display controller in the display memory is altered such that a request for a first address in a first line in the sequence of lines is mapped to a second address in a second line in the subset of lines including data corresponding to the image.
7. The method of claim 1, wherein the display memory is comprised of a sequence of lines in the first direction, and wherein each of the sequence of lines is comprised of a plurality of pixels, and the using the pixel replication circuit to replicate the image in a second direction of the image as the image is transferred from the pixel replication circuit to the display circuit comprises: transferring each of the sequence of lines from the display memory to the pixel replication circuit using the display controller and the memory controller; replicating each of the pixels in each of the sequences of lines at least once during transmission of each of the sequence of lines from the pixel replication circuit to the display circuit.
8. The method of claim 1 , wherein the first direction of the image comprises a vertical direction and the second direction of the image comprises a horizontal direction.
9. The method of claim 1, wherein the first direction of the image comprises a horizontal direction and the second direction of the image comprises a vertical direction.
10. The method of claim 1 , wherein the enabling a replication mode includes sending a signal from the display controller to the pixel replication circuit, the message indicating that the replication mode is active.
11. A method of pixel replication in a computer, the computer including a processor, the processor coupled to a memory and a display controller, the display controller coupled to a pixel replication circuit and a display circuit, the pixel replication circuit coupled to the display circuit, the memory including a display memory, the method comprising: enabling a replication mode; using the processor to execute a program to provide line replication in memory of the display memory in a first direction; and using the pixel replication circuit to replicate pixels in a second direction as a plurality of pixels is transferred to the display circuit.
12. The method of claim 11 , wherein the screen memory is comprised of a sequence of lines, and the lines include a sequence of pixels, each of the sequence of pixels having a corresponding pixel value, and the plurality of lines, and the using the processor to execute the program to provide line replication in memory of the display memory in the first direction further comprises: writing a plurality of pixel values to a subsequence of pixels in the sequence of pixels in a line in the sequence of lines; writing the plurality of pixel values to the subsequence pixels in the sequence of pixels in at least one subsequent line in the sequence of lines.
13. The method of claim 12, wherein a replication factor includes a magnification factor, and the writing the plurality pixel values to the subsequence pixels in the sequence of pixels in at least one subsequent line in the sequence of lines comprises writing the plurality pixel values to the magnification factor minus one lines subsequent to the line in the sequence of lines.
14. The method of claim 11 , wherein the using the pixel replication circuit to replicate pixels in the second direction as the plurality of pixels is transferred to the display further comprises: receiving the plurality of pixels from the display circuit; and sending each of the plurality of pixels to the display at least twice.
15. The method of claim 4, wherein the sending each of the plurality of pixels to the display at least twice comprises sending a second plurality of pixels to the display, the second plurality of pixels including each of the plurality of pixels interleaved with copies of the plurality of pixels.
16. An apparatus for pixel replication, the apparatus comprising: a first input for receiving a plurality of pixel values; a second input one of enabled or disabled; and an output for sending a second plurality of pixel values to a display circuit.
17. An apparatus of claim 16, wherein the second input is disabled and the second plurality of pixel values is the same as the first plurality of pixel values.
18. An apparatus of claim 16, wherein the second input is enabled and the second plurality of pixel values includes each of the first plurality of pixels twice.
19. An apparatus for pixel replication in a computer, the computer including a processor, the processor coupled to a memory controller and a display controller, the display controller coupled to a pixel replication circuit and a display circuit, the pixel replication circuit coupled to the display circuit, the memory controller coupled to a memory, the memory including a display memory, the method comprising: means for enabling a replication mode; means for storing an image in the display memory using the processor and the memory controller, the image stored in the display memory such that when the display controller transfers the image from the display memory to the pixel replication circuit, the image has been replicated in a first direction of the image; and means for using the pixel replication circuit to replicate the image in a second direction of the image as the image is transferred from the pixel replication circuit to the display circuit.
20. The apparatus of claim 19, wherein the means for storing further comprises means for using the processor to execute a program to provide line replication of the image in the display memory in the first direction of the image.
21. The apparatus of claim 19, wherein the first direction of the image comprises a horizontal direction and the second direction of the image comprises a vertical direction.
22. A system for pixel replication in a computer, the system comprising a display circuit; a pixel replication circuit, the pixel replication circuit coupled to the display circuit, the pixel replication circuit capable of replicating a plurality of pixels as the plurality of pixels are transferred from the pixel replication circuit to the display circuit; a display controller, the display controller coupled to the pixel replication circuit; a memory, the memory including a display memory and a program memory; a memory controller, the memory controller coupled to the memory; a processor, the processor coupled to the memory controller and the display controller, the processor executing a program; and the program memory including a first set of instructions for enabling a replication mode and a second set of instructions for storing an image in the display memory, the image stored in the display memory such that when the display controller transfers the image from the display memory to the pixel replication circuit, the image has been replicated in a first direction of the image.
23. The system of claim 22, wherein the processor is capable of executing the first set of instructions and the second set of instructions.
24. The system of claim 22, wherein the pixel replication circuit replicates the plurality of pixels when the replication mode is enabled.
25. A handheld computer having a display with a first resolution, the handheld computer supporting a first type of application designed for the first resolution, and the handheld computer supporting a second type of application designed for a second resolution, the second resolution less than the first resolution, and wherein the second type of application operates on the handheld computer without modification, and the handheld computer zooming output from the second type of application to the first resolution.
26. The handheld computer of claim 25, wherein an application of first type of application sends a signal to the handheld computer indicating the application supports the first resolution.
27. The handheld computer of claim 25, wherein the handheld computer supports a third type of application, the third type of application designed for a third resolution, the third resolution higher than the first resolution, the handheld computer supporting the scrolling of the display to view the entire image.
28. A method of zooming an image, the method comprising: selecting a zoom factor; zooming an image in the display memory in one direction using the zoom factor; zooming the image in the other direction as the image is transferred from the display memory to the display circuit using the zoom factor.
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