WO1999059088A3 - A programmable logic device with macrocell controlled by a pla - Google Patents

A programmable logic device with macrocell controlled by a pla Download PDF

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Publication number
WO1999059088A3
WO1999059088A3 PCT/IB1999/000783 IB9900783W WO9959088A3 WO 1999059088 A3 WO1999059088 A3 WO 1999059088A3 IB 9900783 W IB9900783 W IB 9900783W WO 9959088 A3 WO9959088 A3 WO 9959088A3
Authority
WO
WIPO (PCT)
Prior art keywords
pla
terms
logic
macrocell
programmable logic
Prior art date
Application number
PCT/IB1999/000783
Other languages
French (fr)
Other versions
WO1999059088A2 (en
Inventor
Mark M Aaldering
Original Assignee
Koninkl Philips Electronics Nv
Philips Svenska Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Philips Svenska Ab filed Critical Koninkl Philips Electronics Nv
Publication of WO1999059088A2 publication Critical patent/WO1999059088A2/en
Publication of WO1999059088A3 publication Critical patent/WO1999059088A3/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724Structural details of logic blocks
    • H03K19/17728Reconfigurable logic blocks, e.g. lookup tables

Abstract

A programmable logic device (PLD) includes a macrocell which controls the output path of the logic signals output by one or more logic arrays implementing user logic functions. Complex control terms are implemented and provided to the macrocell by a programmable logic array (PLA), which includes at least one (and typically a plurality) of Sum terms (OR gates) electrically programmably coupled to a plurality of Product terms (AND gates) receiving input logic signals. In a favorable embodiment, the PLD includes a plurality of macrocells coupled via a communication channel to the PLA which generates the control terms. The PLA has the advantage of improving density and flexibility, so that complex control terms may be implemented without the need to implement multiple paths through the user logic arrays, thereby avoiding decreases in speed and poaching of capacity from the user logic arrays.
PCT/IB1999/000783 1998-05-11 1999-04-29 A programmable logic device with macrocell controlled by a pla WO1999059088A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7568098A 1998-05-11 1998-05-11
US09/075,680 1998-05-11

Publications (2)

Publication Number Publication Date
WO1999059088A2 WO1999059088A2 (en) 1999-11-18
WO1999059088A3 true WO1999059088A3 (en) 2000-01-20

Family

ID=22127320

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB1999/000783 WO1999059088A2 (en) 1998-05-11 1999-04-29 A programmable logic device with macrocell controlled by a pla

Country Status (1)

Country Link
WO (1) WO1999059088A2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0252654A2 (en) * 1986-07-02 1988-01-13 Advanced Micro Devices, Inc. Memory device with programmable output structures
US4847612A (en) * 1988-01-13 1989-07-11 Plug Logic, Inc. Programmable logic device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0252654A2 (en) * 1986-07-02 1988-01-13 Advanced Micro Devices, Inc. Memory device with programmable output structures
US4847612A (en) * 1988-01-13 1989-07-11 Plug Logic, Inc. Programmable logic device

Also Published As

Publication number Publication date
WO1999059088A2 (en) 1999-11-18

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