WO1999017184A1 - Ordinateur portatif muni d'un dispositif de gestion de l'energie - Google Patents

Ordinateur portatif muni d'un dispositif de gestion de l'energie Download PDF

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Publication number
WO1999017184A1
WO1999017184A1 PCT/GB1998/002431 GB9802431W WO9917184A1 WO 1999017184 A1 WO1999017184 A1 WO 1999017184A1 GB 9802431 W GB9802431 W GB 9802431W WO 9917184 A1 WO9917184 A1 WO 9917184A1
Authority
WO
WIPO (PCT)
Prior art keywords
temperature
voltage
computer system
signal
power supply
Prior art date
Application number
PCT/GB1998/002431
Other languages
English (en)
Inventor
Richard Alan Dayan
Robert Sachsenmaier
Original Assignee
International Business Machines Corporation
Ibm United Kingdom Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corporation, Ibm United Kingdom Limited filed Critical International Business Machines Corporation
Publication of WO1999017184A1 publication Critical patent/WO1999017184A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/263—Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/20—Cooling means
    • G06F1/206—Cooling means comprising thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the invention relates to computers which are capable of being battery powered and in particular to management of power consumption in such computers .
  • Computers intended for both battery and external powered operation generally include power management to reduce power consumption during battery operation.
  • Such management typically shuts down resources such as hard disk storage when they are not actually in use.
  • Such management can cause performance degradation when the resource is needed but this loss of performance is traded for extended battery operation.
  • the disk drive it must, if powered down, come up to speed before is can be accessed imposing a usage delay.
  • processors become more powerful from a computing standpoint they also generally require more operating power. As operating power requirements increase they increase heat buildup problems and lower operating time for a given capacity battery. Fans are sometimes used to help with the cooling problems but they also create a battery drain for the computer when in battery-powered mode.
  • processors for computers are typically optimized for a particular operating voltage they are capable of operating over a range of voltage. Also, while processors are generally designed to operate over a narrow voltage range they can be designed for operation over a broader range with little loss of performance at the peak performance point .
  • the present invention provides a computer system as claimed in claim 1 or claim 5.
  • the present invention recognizes that, by so using CPU devices processed to extend the operating voltage range that they are selectively switched off the performance peak to a lower voltage operating point it is possible to exercise added control over power consumption for both battery preservation and heat control purposes while retaining the potential for full performance operation.
  • the processor operating voltage is reduced in response to the computer being placed in battery-powered mode, with the reduction of voltage the clock frequency may also be reduced to support the operation at the reduced voltage. While the lower clock rate reduces performance, it is generally a modest tradeoff for the increase in operating time under battery power and a lower rate of heat build-up.
  • Fig. 1. is a pictoral representation of a portable computer system suitable for incorporating the invention
  • Fig. 2 is a diagram of a computer system showing system elements involved in the presently preferred implementation for the invention
  • Fig. 3 is a diagrammatic representation of a voltage versus clock- speed for a processor suboptimized in performance for a wider operating voltage range (not to scale) ;
  • Fig. 4 is a state diagram indicating the changes occurring when the system moves among the various voltage states according to the invention.
  • Fig. 5-8 are flow charts describing logic for creating control signals to control processor voltage according to the invention.
  • Fig. 9 is a circuit diagram of an exemplary voltage selection circuit for use with the invention. Description of the Preferred Embodiment
  • a computer system 10 powerable by a battery and suitable for incorporating the invention includes a connector 12 for receiving alternative external power from a power source 14 such as a transformer power supply (shown) or a docking station (not shown) .
  • a power source 14 such as a transformer power supply (shown) or a docking station (not shown) .
  • a processor unit (CPU) 20 is connected to a RAM module 22, a ROM module 24 and a hard drive 26 using a control bus 28, a data bus 30 and an address bus 32 as is well known for general purpose computing systems. Also connected to busses 28, 30 and 32 is a register 34 for storing status data or flags for controlling system operation according to the invention.
  • a thermal sensor 40 applies its output signal T to an analog-to-digital converter 42 which supplies a digital temperature signal Td to a storage location of register 34.
  • This signal Td serves to indicate the level of temperature inside the computer system 10 and, according to a preferred implementation for the invention three ranges are recognized. The first range is below the normal or spec level and the second is between spec and danger level, which level is set at a temperature where continued operation would result in damage. The third is above the danger level and requires drastic action to avoid damage.
  • the connector 14 for external power connects to a charging circuit 50 which is also connected to a battery 52 which is the main internal power source for the computer system 10.
  • the charging circuit 50 provides for charging of the battery 52 when external power is connected and supplies power to the DC to DC regulator 54.
  • a logic signal F p9 is produced to be on if external power is present and off if external power is absent.
  • the DC to DC regulator 54 for a preferred embodiment provides three levels of voltage V Bl , v s2 and v s3 (highest to lowest respectively in Fig. 3) for energizing the CPU 20. These voltages are supplied to a voltage selector 56 which selects a voltage Vs, which is applied to the CPU 20. 58.
  • the voltage selector 56 has three control input signals C vl , C v2 and C v3 which are produced as will be described below to control CPU clock rate (or correspondingly period) and operating voltage according to one embodiment for the invention.
  • the signals C vl , C v2 and C v3 are also applied to the clock 58 which provides at its output respective uniform clock rates respective of the signal which is in the on state.
  • the selected voltages and clock rates are coordinated as is indicated in Fig. 3 to correspond to the three selected operating points indicated there .
  • FIG. 3 there is a showing (not to scale) of operating voltages V Bl , V s2 and V s3 for a CPU and corresponding clock rates Rl, R2 and R3 for reliable operation.
  • the present invention recognizes that the energy required by the CPU tends to vary as the square of the operating voltage and, consequently, a drop in applied voltage can reduce power consumption and heating significantly.
  • the state diagram of Fig. 4 indicates the incidents that trigger transitions from one voltage mode state to another.
  • the states recognized are preferably includes High voltage modes 60 and 62, medium voltage mode 64, low voltage mode 66 and recoverable shut down or hibernate mode 68 m which the current memory contents are stored on the hard disk 26 (Fig. 2) and the system is turned off.
  • the transitions among the states are triggered by changes to power source and thermal sensor temperature level as is indicated on the transition paths of the Fig. 4.
  • Logic for the transitions indicated m Fig. 4 is implemented, preferably, by computer programs stored on hard drive 26 and executed by CPU 20. This logic is described below with reference to Figs. 5 8. Note that whenever the operating system enters a logic sequence for power management as shown m Figs. 5-8 it first completes all l/o operations and suspends all tasks so that any system changes initiated do not trigger an error.
  • a power up process often referred to as power on self test or POST which does system initialization.
  • POST power on self test
  • a periodic interrupt (200) is programmed for temperature checking and the sensor signal is read (202) each time the interrupt occurs.
  • the interrupt may also be triggered by the detector when crossing the predefined level defining temperature points Tw and Ts as is well known using logic in the detector (not shown) .
  • the temperature level is tested (204) against a predefined upper level Ts and if below against a predefined lower warning level Tw (206) . If below the warning level no action is taken (208) but, if above, the fan is signalled on (210) and the stored fan state flag is updated (212) . If the temperature at 204 is above the Ts level C v3 is tested (214) to determine if the processor voltage is at the lowest level V 3 .
  • the logic for processing power source changes is keyed to a periodic interrupt or a interrupt triggered at the charging circuit 50 similar to the temperature monitoring.
  • a voltage selector suitable for implementing the invention includes field effect transistors 501, 502 and 503 which are connected to output the voltage Vs for the processor 20 and have respectively as inputs the voltages V sl , V s2 and V s3 .
  • Control inputs for transistors 501, 502 and 503 respectively are control signals C vl , C v2 and C v3 . Only one of the control signal is in the on state at a time and the voltage at the corresponding transistor becomes Vs the voltage supplied to the processor 20. Accordingly the voltage applied to processor is adjusted according to the invention based upon the state of the temperature of the system, the power source and the fan (if any) state.

Abstract

On décrit un système informatique dont le processeur peur fonctionner à des niveaux de tension sélectivement variables. La faculté de commuter la tension d'exploitation en fonction des conditions du système (comme le fonctionnement par batterie ou la détection d'une températures atteignant des niveaux indésirables) offre à l'utilisateur final des options de fonctionnement améliorées. La commutation sélective à des niveaux de tension plus bas permet d'augmenter sensiblement l'autonomie de fonctionnement par batterie et d'éviter un endommagement thermique des composants. Pour obtenir ces améliorations, le rendement est diminué du fait de la baisse des fréquences d'horloge qui permet d'assurer un rendement correct aux niveaux de tension inférieurs.
PCT/GB1998/002431 1997-09-29 1998-08-12 Ordinateur portatif muni d'un dispositif de gestion de l'energie WO1999017184A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US93953797A 1997-09-29 1997-09-29
US08/939,537 1997-09-29

Publications (1)

Publication Number Publication Date
WO1999017184A1 true WO1999017184A1 (fr) 1999-04-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1998/002431 WO1999017184A1 (fr) 1997-09-29 1998-08-12 Ordinateur portatif muni d'un dispositif de gestion de l'energie

Country Status (1)

Country Link
WO (1) WO1999017184A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010096576A (ko) * 2000-03-09 2001-11-07 포만 제프리 엘 요구되는 배터리 수명에 근거한 전력 관리 방법, 시스템및 컴퓨터 프로그램 제품
US9043627B2 (en) 2003-08-15 2015-05-26 Apple Inc. Methods and apparatuses for controlling the temperature of a data processing system
US9274574B2 (en) 2005-08-25 2016-03-01 Apple Inc. Methods and apparatuses for determining throttle settings to satisfy a system power constraint

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0283720A (ja) * 1988-09-21 1990-03-23 Mitsubishi Electric Corp 電力制御回路
EP0712064A1 (fr) * 1994-10-11 1996-05-15 Digital Equipment Corporation Commande d'horloge de fréquence variable pour systèmes d'ordinateur utilisant un microprocesseur
EP0785496A1 (fr) * 1996-01-16 1997-07-23 Compaq Computer Corporation Gestion thermique d'ordinateurs

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0283720A (ja) * 1988-09-21 1990-03-23 Mitsubishi Electric Corp 電力制御回路
EP0712064A1 (fr) * 1994-10-11 1996-05-15 Digital Equipment Corporation Commande d'horloge de fréquence variable pour systèmes d'ordinateur utilisant un microprocesseur
EP0785496A1 (fr) * 1996-01-16 1997-07-23 Compaq Computer Corporation Gestion thermique d'ordinateurs

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 014, no. 283 (P - 1063) 19 June 1990 (1990-06-19) *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010096576A (ko) * 2000-03-09 2001-11-07 포만 제프리 엘 요구되는 배터리 수명에 근거한 전력 관리 방법, 시스템및 컴퓨터 프로그램 제품
US9043627B2 (en) 2003-08-15 2015-05-26 Apple Inc. Methods and apparatuses for controlling the temperature of a data processing system
US9317090B2 (en) 2003-08-15 2016-04-19 Apple Inc. Methods and apparatuses for operating a data processing system
US10775863B2 (en) 2003-08-15 2020-09-15 Apple Inc. Methods and apparatuses for controlling the temperature of a data processing system
US9274574B2 (en) 2005-08-25 2016-03-01 Apple Inc. Methods and apparatuses for determining throttle settings to satisfy a system power constraint
US9671845B2 (en) 2005-08-25 2017-06-06 Apple Inc. Methods and apparatuses for dynamic power control

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