WO1999012189A3 - Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices - Google Patents

Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices Download PDF

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Publication number
WO1999012189A3
WO1999012189A3 PCT/US1998/017981 US9817981W WO9912189A3 WO 1999012189 A3 WO1999012189 A3 WO 1999012189A3 US 9817981 W US9817981 W US 9817981W WO 9912189 A3 WO9912189 A3 WO 9912189A3
Authority
WO
WIPO (PCT)
Prior art keywords
making
dielectric constant
low dielectric
nanospheres
component
Prior art date
Application number
PCT/US1998/017981
Other languages
French (fr)
Other versions
WO1999012189A2 (en
Inventor
Michael R Ayers
Original Assignee
Michael R Ayers
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Michael R Ayers filed Critical Michael R Ayers
Priority to AU93736/98A priority Critical patent/AU9373698A/en
Publication of WO1999012189A2 publication Critical patent/WO1999012189A2/en
Publication of WO1999012189A3 publication Critical patent/WO1999012189A3/en

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02307—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a liquid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31695—Deposition of porous oxides or porous glassy oxides or oxide based porous glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
    • H01L2221/1005—Formation and after-treatment of dielectrics
    • H01L2221/1042—Formation and after-treatment of dielectrics the dielectric comprising air gaps
    • H01L2221/1047—Formation and after-treatment of dielectrics the dielectric comprising air gaps the air gaps being formed by pores in the dielectric

Abstract

A process is provided for making an insulation layer for use in microelectronic devices, whereby capacitive coupling and propagation delay in the microelectronic devices are reduced. This invention can include the formation of a stable solution of spherical particles consisting of a ceramic core (10) and a non-polar coating (20). This solution can be applied to a microelectronic substrate, and dried to form a continuous, porous layer. Novel methods are disclosed for bonding these particles together into an integral layer. Porous layers formed by the process of this invention possess a very low dielectric constant, and can be produced using equipment and techniques common and available to those skilled in the art of microelectronic fabrication.
PCT/US1998/017981 1997-09-04 1998-08-31 Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices WO1999012189A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU93736/98A AU9373698A (en) 1997-09-04 1998-08-31 Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/923,490 US5801092A (en) 1997-09-04 1997-09-04 Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices
US08/923,490 1997-09-04

Publications (2)

Publication Number Publication Date
WO1999012189A2 WO1999012189A2 (en) 1999-03-11
WO1999012189A3 true WO1999012189A3 (en) 1999-05-06

Family

ID=25448769

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/017981 WO1999012189A2 (en) 1997-09-04 1998-08-31 Method of making two-component nanospheres and their use as a low dielectric constant material for semiconductor devices

Country Status (4)

Country Link
US (1) US5801092A (en)
AU (1) AU9373698A (en)
TW (1) TW385522B (en)
WO (1) WO1999012189A2 (en)

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US6770572B1 (en) * 1999-01-26 2004-08-03 Alliedsignal Inc. Use of multifunctional si-based oligomer/polymer for the surface modification of nanoporous silica films
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US6287987B1 (en) 1999-04-30 2001-09-11 Lsi Logic Corporation Method and apparatus for deposition of porous silica dielectrics
US6881604B2 (en) * 1999-05-25 2005-04-19 Forskarpatent I Uppsala Ab Method for manufacturing nanostructured thin film electrodes
US6440560B1 (en) 1999-07-26 2002-08-27 International Business Machines Corporation Nanoparticles formed with rigid connector compounds
US6277766B1 (en) * 2000-02-03 2001-08-21 Michael Raymond Ayers Method of making fullerene-decorated nanoparticles and their use as a low dielectric constant material for semiconductor devices
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US7834349B2 (en) * 2000-03-29 2010-11-16 Georgia Tech Research Corporation Silicon based nanospheres and nanowires
US6720240B2 (en) * 2000-03-29 2004-04-13 Georgia Tech Research Corporation Silicon based nanospheres and nanowires
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US6533855B1 (en) 2001-02-13 2003-03-18 Novellus Systems, Inc. Dispersions of silicalite and zeolite nanoparticles in nonpolar solvents
US6780499B2 (en) * 2001-05-03 2004-08-24 International Business Machines Corporation Ordered two-phase dielectric film, and semiconductor device containing the same
US20030148019A1 (en) * 2001-11-19 2003-08-07 Hwang Byung Keun Compositions and methods for forming dielectric layers using a colloid
US20030119057A1 (en) * 2001-12-20 2003-06-26 Board Of Regents Forming and modifying dielectrically-engineered microparticles
US7147894B2 (en) * 2002-03-25 2006-12-12 The University Of North Carolina At Chapel Hill Method for assembling nano objects
DE10235225B3 (en) * 2002-08-01 2004-01-22 Albert-Ludwigs-Universität Freiburg Process for carrying out chemical reactions involving compounds adsorbed on fluorinated carrier materials via fluorine-fluorine interactions, fluorinated carrier material and the use of the carrier material
US7153754B2 (en) * 2002-08-29 2006-12-26 Micron Technology, Inc. Methods for forming porous insulators from “void” creating materials and structures and semiconductor devices including same
DE10336747A1 (en) * 2003-08-11 2005-03-17 Infineon Technologies Ag Semiconductor component used as a power transistor comprises a layer structure with a semiconductor chip, a support for the chip and an electrically insulating layer made from nano-particles of an electrically insulating material
US7531209B2 (en) * 2005-02-24 2009-05-12 Michael Raymond Ayers Porous films and bodies with enhanced mechanical strength
JP4991706B2 (en) * 2005-06-06 2012-08-01 ダウ グローバル テクノロジーズ エルエルシー Lithium rechargeable electrochemical cell
US7825037B2 (en) * 2005-10-17 2010-11-02 Stc.Unm Fabrication of enclosed nanochannels using silica nanoparticles
US9156004B2 (en) 2005-10-17 2015-10-13 Stc.Unm Fabrication of enclosed nanochannels using silica nanoparticles
US10060904B1 (en) 2005-10-17 2018-08-28 Stc.Unm Fabrication of enclosed nanochannels using silica nanoparticles
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Also Published As

Publication number Publication date
TW385522B (en) 2000-03-21
US5801092A (en) 1998-09-01
WO1999012189A2 (en) 1999-03-11
AU9373698A (en) 1999-03-22

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