WO1999009715A1 - Data switching apparatus - Google Patents

Data switching apparatus Download PDF

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Publication number
WO1999009715A1
WO1999009715A1 PCT/GB1998/002138 GB9802138W WO9909715A1 WO 1999009715 A1 WO1999009715 A1 WO 1999009715A1 GB 9802138 W GB9802138 W GB 9802138W WO 9909715 A1 WO9909715 A1 WO 9909715A1
Authority
WO
WIPO (PCT)
Prior art keywords
data
operable
destination
control
control information
Prior art date
Application number
PCT/GB1998/002138
Other languages
French (fr)
Inventor
Ian David Johnson
Michael Collins
Paul Howarth
Original Assignee
Power X Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Power X Limited filed Critical Power X Limited
Priority to AU84509/98A priority Critical patent/AU8450998A/en
Publication of WO1999009715A1 publication Critical patent/WO1999009715A1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports

Definitions

  • This invention relates to data switching apparatus for use in computer-controlled digital data transmission systems .
  • data switching apparatus for a digital data transmission system, which apparatus includes user interface means operable to connect external users to the apparatus , routing means operable to determine from control information received with data from a source user the destination to which the accompanying data is to be sent and including means for separating the data from the said control information, the routing means also being operable to receive data information to be passed to a destination user associated with that routing means, a switching matrix operable to enable connections between source and destination users, and master control means to which the control information is applied to request a connection through the switching matrix to the destination user to control the operation of the switching matrix.
  • Figure 1 is a schematic block diagram of apparatus according to an embodiment of the invention.
  • Figure 2 is a schematic block diagram of part of the apparatus of Figure 1.
  • control information necessary to identify a number of factors including the destination to which the data is to be sent.
  • thick lines are used to denote data paths whilst thin lines denote paths used for control information.
  • the data switching apparatus to be described below, by way of example, is a 32-port system.
  • FIG. 1 shows a general outline of the data switching apparatus at 10.
  • Data and control information is applied to the switching apparatus from external application nodes or users 11, by way of user application logic 12 within one of 32 routers 13.
  • the data is separated from the control information and received into a buffer lk , the output of which is connected to a serialiser/deserialiser 15, hereinafter referred to as a "serdes".
  • the control information is applied to a router control 16, which has outputs connected to both the buffer 14 and the serdes 15.
  • Each router 13 has the data output of its serdes 15 connected to a separate one of the 32 ports of a single switching matrix 17, whilst the control output of the router control 16 of each is applied to a master control 18, common to the switching apparatus as a whole.
  • the switching matrix in this particular example is a multi-planar, non-blocking memory-less switch which enables the simultaneous interconnection of all ports of the matrix.
  • the matrix may be configured with multiple paths between ports to provide increased performance through the matrix.
  • FIG 2 shows the master control 18 of Figure 1 in greater detail.
  • Each router 13 is connected to the master control 18 via a common router interface 20, which accepts the routing requests from the router control 16. Since a number of requests will be received from different ones of the routers and it may not be possible to satisfy all of these requests simultaneously (such as if two routing requests require the same port) , it is necessary to deal with these in some form of order and this is determined by a scheduling unit 21. This in turn controls the configuration of the matrix 17 by way of a matrix interface 22. Also received from each router along with the routing requests is information indicating the requested priority of the data to be passed.
  • a priority selector 23 takes into account the number of routing requests of each priority level that need to be satisfied and, based on configuration information previously set up and in conjunction with router interface 20 and scheduling unit 21 , helps to determine the order in which the requested routings are set up.
  • one application node 11 wishes to send data to another node it sends the data, together with control information, over a channel link to the application logic 12.
  • the control information identifies the source of the data, its required destination and also the priority which the user puts on the data transfer.
  • the user application logic 12 checks the integrity of the received data and control information, separates the data from the control information and passes the data to the data buffer 14.
  • the router control 16 ensures that the data is formed into correctly-sized packets for onward transmission and the control information is passed to the master control 18 to request a matrix connection. In the master control 18 the routing request is considered to ensure that there is no conflict with the available resources of the system.
  • the router interface unit 20 On receiving a number of routing requests, these are stored in the router interface unit 20 and a set of such requests is passed to the scheduling unit 21. This determines which requests will be allowed to establish connections within the matrix, with information from the priority selector 23- When appropriate, the requested route is set up through the matrix to the destination user. The routers 13 to which the source and destination users are connected are advised that the connection will be set up.
  • the router control 16 now initiates the flow of data from the data buffer 14 into the matrix in serial form via the serdes 15- Data now flows from the data buffer through the matrix to the serdes of the destination router, where it is converted into parallel form and, via the application logic 12, is passed to the destination node or user 11.
  • the data switching apparatus is able to reduce delays and increase switching speed within the switching matrix. This leads to a more efficient use of the matrix and more rapid transfer of information.

Abstract

Data switching apparatus for a digital data transmission system includes user interface means (12) operable to connect external users (11) to the apparatus. Routing means (13) is operable to determine, from control information received with data from a source user, the destination to which the data should be sent. The routing means (13) includes means for separating the control information from the data. A switching matrix (17) is operable to set up connection between the source user and the destination user and master control means (18) operable to control the operation of the switching matrix (17).

Description

DATA SWITCHING APPARATUS
This invention relates to data switching apparatus for use in computer-controlled digital data transmission systems .
Many types of data switching apparatus are known, all having their own particular features and systems. In all cases the intention is to allow data switching and transmission to be achieved as rapidly as the system will allow.
It is an object of the present invention to provide data switching apparatus which is faster and more efficient than has previously been possible.
According to the present invention there is provided data switching apparatus for a digital data transmission system, which apparatus includes user interface means operable to connect external users to the apparatus , routing means operable to determine from control information received with data from a source user the destination to which the accompanying data is to be sent and including means for separating the data from the said control information, the routing means also being operable to receive data information to be passed to a destination user associated with that routing means, a switching matrix operable to enable connections between source and destination users, and master control means to which the control information is applied to request a connection through the switching matrix to the destination user to control the operation of the switching matrix.
The invention will now be described with reference to the accompanying drawings, in which:-
Figure 1 is a schematic block diagram of apparatus according to an embodiment of the invention; and
Figure 2 is a schematic block diagram of part of the apparatus of Figure 1.
Together with any data to be passed from one user to another is control information, necessary to identify a number of factors including the destination to which the data is to be sent. In the drawings, thick lines are used to denote data paths whilst thin lines denote paths used for control information. The data switching apparatus to be described below, by way of example, is a 32-port system.
Referring now to Figure 1, this shows a general outline of the data switching apparatus at 10. Data and control information is applied to the switching apparatus from external application nodes or users 11, by way of user application logic 12 within one of 32 routers 13. In each router 13 the data is separated from the control information and received into a buffer lk , the output of which is connected to a serialiser/deserialiser 15, hereinafter referred to as a "serdes". The control information is applied to a router control 16, which has outputs connected to both the buffer 14 and the serdes 15.
Each router 13 has the data output of its serdes 15 connected to a separate one of the 32 ports of a single switching matrix 17, whilst the control output of the router control 16 of each is applied to a master control 18, common to the switching apparatus as a whole.
The switching matrix in this particular example is a multi-planar, non-blocking memory-less switch which enables the simultaneous interconnection of all ports of the matrix. The matrix may be configured with multiple paths between ports to provide increased performance through the matrix.
Figure 2 shows the master control 18 of Figure 1 in greater detail. Each router 13 is connected to the master control 18 via a common router interface 20, which accepts the routing requests from the router control 16. Since a number of requests will be received from different ones of the routers and it may not be possible to satisfy all of these requests simultaneously (such as if two routing requests require the same port) , it is necessary to deal with these in some form of order and this is determined by a scheduling unit 21. This in turn controls the configuration of the matrix 17 by way of a matrix interface 22. Also received from each router along with the routing requests is information indicating the requested priority of the data to be passed. A priority selector 23 takes into account the number of routing requests of each priority level that need to be satisfied and, based on configuration information previously set up and in conjunction with router interface 20 and scheduling unit 21 , helps to determine the order in which the requested routings are set up.
One mode of operation of the data switching apparatus detailed above will now be described. When one application node 11 wishes to send data to another node it sends the data, together with control information, over a channel link to the application logic 12. The control information identifies the source of the data, its required destination and also the priority which the user puts on the data transfer. The user application logic 12 checks the integrity of the received data and control information, separates the data from the control information and passes the data to the data buffer 14. The router control 16 ensures that the data is formed into correctly-sized packets for onward transmission and the control information is passed to the master control 18 to request a matrix connection. In the master control 18 the routing request is considered to ensure that there is no conflict with the available resources of the system. On receiving a number of routing requests, these are stored in the router interface unit 20 and a set of such requests is passed to the scheduling unit 21. This determines which requests will be allowed to establish connections within the matrix, with information from the priority selector 23- When appropriate, the requested route is set up through the matrix to the destination user. The routers 13 to which the source and destination users are connected are advised that the connection will be set up. The router control 16 now initiates the flow of data from the data buffer 14 into the matrix in serial form via the serdes 15- Data now flows from the data buffer through the matrix to the serdes of the destination router, where it is converted into parallel form and, via the application logic 12, is passed to the destination node or user 11.
Because of the separation of data and control information, the data switching apparatus is able to reduce delays and increase switching speed within the switching matrix. This leads to a more efficient use of the matrix and more rapid transfer of information.
Nothing has been said about the form of the various individual units making up the switching apparatus, as these already exist in various forms well known to those skilled in the data switching field.

Claims

1. Data switching apparatus for a digital data transmission system, which apparatus includes user interface means operable to connect external users to the apparatus, routing means operable to determine from control information received with data from a source user the destination to which the accompanying data is to be sent and including means for separating the data from the said control information, the routing means also being operable to receive data to be passed to a destination user associated with that routing means, a switching matrix operable to set up connections between source and destination users, and master control means to which the control information is applied to request a connection through the switching matrix to the destination user to control the operation of the switching matrix.
2. Apparatus as claimed in Claim 1 in which the switching matrix is operable to set up simultaneous multiple connections between any required source and destination users.
3- Apparatus as claimed in Claim 2 in which the switching matrix comprises a multiplanar matrix, each plane of which is operable to provide a plurality of interconnections.
4. Apparatus as claimed in any one of Claims 1 to 3 in which the master control includes means operable to control the priority given to each element of data passing through the apparatus.
5. Data switching apparatus substantially as herein described with reference to the accompanying drawings.
PCT/GB1998/002138 1997-08-19 1998-07-17 Data switching apparatus WO1999009715A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU84509/98A AU8450998A (en) 1997-08-19 1998-07-17 Data switching apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9717412A GB2328590B (en) 1997-08-19 1997-08-19 Data switching apparatus
GB9717412.2 1997-08-19

Publications (1)

Publication Number Publication Date
WO1999009715A1 true WO1999009715A1 (en) 1999-02-25

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Family Applications (1)

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PCT/GB1998/002138 WO1999009715A1 (en) 1997-08-19 1998-07-17 Data switching apparatus

Country Status (3)

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AU (1) AU8450998A (en)
GB (1) GB2328590B (en)
WO (1) WO1999009715A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6757246B2 (en) 2001-08-14 2004-06-29 Pts Corporation Method and apparatus for weighted arbitration scheduling separately at the input ports and the output ports of a switch fabric
US6990072B2 (en) 2001-08-14 2006-01-24 Pts Corporation Method and apparatus for arbitration scheduling with a penalty for a switch fabric
US7525978B1 (en) 2005-04-15 2009-04-28 Altera Corporation Method and apparatus for scheduling in a packet buffering network

Citations (3)

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Publication number Priority date Publication date Assignee Title
US4679190A (en) * 1986-04-28 1987-07-07 International Business Machines Corporation Distributed voice-data switching on multi-stage interconnection networks
EP0468498A2 (en) * 1990-07-26 1992-01-29 Nec Corporation Routing system capable of effectively processing routing information
US5355372A (en) * 1992-08-19 1994-10-11 Nec Usa, Inc. Threshold-based load balancing in ATM switches with parallel switch planes related applications

Family Cites Families (3)

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Publication number Priority date Publication date Assignee Title
US5173689A (en) * 1990-06-25 1992-12-22 Nec Corporation Self-distributed logical channel node failure restoring system
FR2698463B1 (en) * 1992-11-26 1995-01-20 Cit Alcatel Cell processing device for asynchronous time communication network equipment.
CA2151852A1 (en) * 1994-08-31 1996-03-01 Albert Kai-Sun Wong Dynamic atm network access control using an availability parameter at each port in a network path

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4679190A (en) * 1986-04-28 1987-07-07 International Business Machines Corporation Distributed voice-data switching on multi-stage interconnection networks
EP0468498A2 (en) * 1990-07-26 1992-01-29 Nec Corporation Routing system capable of effectively processing routing information
US5355372A (en) * 1992-08-19 1994-10-11 Nec Usa, Inc. Threshold-based load balancing in ATM switches with parallel switch planes related applications

Also Published As

Publication number Publication date
AU8450998A (en) 1999-03-08
GB2328590A (en) 1999-02-24
GB9717412D0 (en) 1997-10-22
GB2328590B (en) 2002-05-15

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