WO1995022448A2

WO1995022448A2 - Preparation of embossing shims

Info

Publication number: WO1995022448A2
Application number: PCT/GB1995/000330
Authority: WO
Inventors: Timothy George Ryan; Thomas Grierson Harvey; Duncan Edward Laidler; Graeme Mcrobbie
Original assignee: Imperial Chemical Industries Plc
Priority date: 1994-02-17
Filing date: 1995-02-16
Publication date: 1995-08-24
Also published as: GB9402994D0; AU1669795A; WO1995022448A3

Abstract

A method for producing a shim for embossing a desired structure into an article which method comprises: (a) forming a master pattern having a contoured metalised surface which conforms to the desired structure; (b) electroforming a layer of a first metal onto the metalised surface to form a metal master; (c) releasing the metal master from the master pattern; (d) electroforming another layer of a second metal, which may be the same or different from the first metal, onto that surface of the metal master which was in contact with the contoured metalised surface to form a shim; and thereafter (e) releasing the shim from the metal master. Alternative processes for preparing master patterns capable of use in the shim production method in which the required structures are transferred onto wafers of silicon and silica.

Description

Preparation of Embossing Shims

This invention relates to a method of preparing shims for use in the embossing of materials, particularly plastics.

Optical communication networks rely on optical components such as splitters, couplers and other passive and active polymer waveguide devices. However, the cost and difficulty of manufacture of such optical components has inhibited their widespread use.

Neyer et al, Paper WeP 7.4, ECOC Conference, Toronto, 1993 disclose that optical components can be prepared by the injection moulding of a suitable polymer into a high precision metal mould. The mould is formed by electroplating a silicon microstructure into which is etched the required structures. It is stated that in order to accurately replicate the structures during moulding, the mould has to be heated to a temperature in excess of the glass transition temperature of the suitable polymer and thereafter slowly cooled to the deforming temperature after injection.

Due to the need to heat and cool the mould, it is evident that the disclosed process is relatively unsuited to the mass manufacture of such components. Furthermore, the use of injection moulding requires that the polymer to be used can be injection moulded and that injection moulding occurs at a temperature at which degradation of that polymer is not a significant problem.

As an alternative to injection moulding, it is possible to emboss suitable polymeric materials. However, the wear on the shims used in the embossing process require their frequent replacement in order that the desired structures are embossed to a consistently high standard. Although the metal moulds disclosed by Neyer et al could be utilised as embossing shims, the complexity of the process used in their preparation would be a deterrent for their use as such. The present invention therefore provides an easier method of repeatedly producing embossing shims which may then be used in an embossing process to produce the desired optical components.

Accordingly, in a first aspect, present invention provides a method for producing a shim for embossing a desired structure into an article, preferably a polymeric article, which method comprises

(a) forming a master pattern having a contoured metalised surface which conforms to the desired structure; (b) electroforming a layer of a first metal onto the metalised surface to form a metal master; (c) releasing the metal master from the master pattern; (d) electroforming an other layer of a second metal, which may be the same or different from the first metal, onto that surface of the metal master which was in contact with the contoured metalised surface to form a shim; and thereafter

(e) releasing the shim from the metal master

5 The master pattern may be prepared using etching techniques similar to those used by Neyer et al to produce the precision metal moulds

Typically, the master pattern may be prepared using the following routes In a first route, a wafer of silicon, or quartz, of sufficiently large diameter to accommodate the desired structures is first cleaned, usually using acetone or IPA Residual 10 water is then removed, for example by baking the wafer in an oven at about 150°C for in excess of 2 hours To improve the adhesion of the subsequent photoresist layer it is preferred that the wafer is then primed, for example by placing it in a vapour bath containing HMDSO for a suitable time

A photoresist coating is then spun onto the optionally primed wafer to an 15 appropriate thickness, for example 3μ, such that the resist coating will not be totally consumed in the subsequent etching process The photoresist is usually a positive resist, for example Shipley 1400-31 Typical spin speeds are of the order of 3000 rpm and of duration of about 30 seconds After spinning the photoresist is softbaked according to the manufacturers instructions for the aforementioned Shipley 1400-31 this may be achieved in 2060 seconds at 90°C on a hotplate or 30 minutes at 90°C in an oven

The photoresist coating is then masked using the appropriate photomask and then illuminated to expose the photoresist coating The exposed image may then be developed with a suitable chemical solution using one or more techniques such as immersion, puddle and spray development Preferably, a double puddle technique is used 25 A post development bake is then preferably performed to consolidate the image, for example 30 minutes at 90^βC in an oven, and thereafter the developed imaged can be transferred into the wafer by etching

Typically, the etching process is a reactive ion etching (RIE) process Preferably, the reactive ions are supplied by tπfluoromethane (CHF₃) which is used at a rate of 8 seem 30 under a pressure of 8 mTorr at a substrate bias voltage of 500V and power of 100 W to give an optimum combination of a high etch rate, approximately 1 8μ per hour, and low wall roughness

After etching, the remaining photoresist coating is removed using an appropriate stripper, for example Shipley 1400-31 can be removed by immersion into a bath of Shipley 35 1165 stripper at 70°C, an aqueous solution of potassium hydroxide and IPA, acidified hydrogen peroxide; acetone or by further UV illumination followed by immersion in aqueous developer solution or by using an oxygen plasma.

The first route requires a relatively thick photoresist layer to be applied. This is because the etching process, in particular the RIE process, removes at least some of the photoresist in addition to etching the wafer. However, it is desirable to use a thinner layer of photoresist in order to achieve a better definition of the etched image with the attendant benefit of improved performance of the optical component.

The preparation of a master pattern using a thinner layer of photoresist is described in a second route. In the second route, a thinner layer of photoresist is applied, e.g. less than 3μ and typically of the order of 0.5μ. The layer of the photoresist, e.g. Shipley 1400-17, is applied by spinning as before. However, by subsequent slow heating, for example at a rate of 1 °C per minute, to an annealing temperature, e.g. 200°C, and at which temperature it is held for a suitable period of time, e.g. 30 minutes, the photoresist layer can be annealed such that it is more resistant to the etching process and those features which are formed in it are maintained even though rapid heating to a temperature in excess of 120^βC can cause the photoresist to deform and even melt. After transfer of the image by the etching process, the annealed photoresist can be more easily removed for example by using oxygen plasma. A third route, which also provides a layer of photoresist of similar thickness as applied through the second route, is to use a priming layer and to deposit a layer of metal on to the wafer prior to the priming layer. The layer of metal thus acts as a shield against the subsequent etching process. Suitable metals include chromium and aluminium or alloys of such metals for example a nickel/chromium alloy having a ratio of nickel to chromium of 90:10 on a weight basis. The layer of metal typically has a thickness of about 200 πm. The photoresist is applied, preferably as a thin layer of about 0.5μ, as before. After exposing and developing the photoresist, it is subjected to a hardbake at a higher temperature, e.g. 110^βC, and for a longer time, e.g. 40 minutes than that used in the optional post development bake. The image is transferred into the metal layer by immersion into an appropriate metal etch solution, e.g. ammonium citrate and nitric acid for chromium, orthophosphoric acid for aluminium and hydrochloric acid for nickel/chromium alloy. Thereafter, the wafer may be etched by for example using an RIE process. A suitable RIE process for use with chromium or nickel/chromium alloy employs a 2:1 volume mixture of SF_β:0₂ at a total rate of 15 seem under 50 mTorr pressure using 100 V DC bias and 75W. A fourth preferred route is to coat the wafer with a layer of silica using a process such as plasma chemical vapour deposition, flame hydrolysis deposition or thermal oxide growth. The thickness of the silica layer depends on the specific structures to be produced, for example a layer 7.5μ thick can be used in the preparation of a single mode waveguide splitter designed for a refractive index difference of 0.004 and an absolute index of 1.445. The silica layer can be patterned using photoresist and/or metal layer techniques as 5 previously described in conjunction with an etching process, in particular an RIE process. The surface roughness of the structures transferred into the wafers significantly effects the optical losses incurred in the final optical component. The degree of surface roughness is in turn determined by the conditions under which the etching process is operated, and in particular when an RIE process is used the gases, flow rates, pressure,

10 power, DC bias and substrate temperature. Where a wafer having a silica layer is used it is desirable after forming the desired structures to increase the temperature of the silica to close to its melting point so that the surface becomes slightly mobile and thereby flows to reduce or eliminate minor imperfections.

In a further aspect of the present invention, it has now be found that the surface of

15 the silica layer may be doped to a desired depth with a melting point depressant, e.g. phosphorus, to form a surface composition which has a melting point which is lower than that of the silica layer such that minor imperfections can be eliminated at lower temperatures thereby reducing the risk of damaging the complete wafer. The surface composition can be formed by placing the silica coated wafer into a furnace at an elevated temperature, e.g.

20 1100^βC, with an appropriate source of the dopant, e.g. phosphorus pentoxide. A flow of gas is caused to pass over thedopaπt and onto the wafer thereby carrying some of the dopant onto the surface of the wafer. When sufficient of the dopant has been transferred the source of the dopant is removed and the temperature of the furnace increased, e.g. to about 1180°C until such time as the dopant has penetrated sufficiently into the surface.

25 As will later be described, a shim which can be used to emboss more than one structure at one time, e.g. a waveguide and associated optical fibre alignment groove, may be produced from a composite which has itself been formed by joining together component parts each one of which separately carries a representation of a particularly structure. However, it is also possible to prepare such a shim using a wafer, hereinafter termed as multi-structured

30 wafer, onto which more than one type of structure has been etched.

A multi-structured wafer may be formed by a variety of routes, for example as described by Neyer et al. However, it is preferred that such a multi-structured wafer is formed from a silica on silicon wafer prepared using one of the following processes.

In a first process, a thin uniform layer of silica is applied, preferably by thermal

35 growth, onto a silicon wafer. The photoresist may then be applied, exposed and developed as previously described and then the image transferred into the silica layer. Suitable methods of transferring the image include wet etching using for example ammonium fluoride with hydrogen fluoride or the RIE process using for example trifluoromethane. After the image has been transferred, the photoresist is removed to expose areas of the underlying silicon to subsequent attack, preferably by a chemical etchant solution. Typically, such solutions are aqueous solutions of potassium hydroxide or potassium hydroxide and IPA, for example 57.6% w/w potassium hydroxide solution or 27% potassium hydroxide and 23% IPA solution. Etching is usually conducted at about 80^CC, preferably 84°C when using potassium hydroxide solution, for a period of about 100 minutes, preferably 65 minutes for potassium hydroxide.

After the underlying silicon has been attacked, the remaining silica is removed from the surface to leave a first structure for forming for example the optical fibre alignment grooves. In this manner the depth of the first structure can be controlled to within 0.2μ accuracy. A further thin uniform layer of silica is then applied to a desired depth, typically of about 7.5μ, preferably by chemical vapour deposition although flame hydrolysis deposition or thermal oxide growth can also be used.

A first photoresist is then applied to the silica layer and may then be exposed and developed as before to produce an image for forming a second structure. In order to remove the silica from the area not containing the image of the second structure a double expose and develop technique is preferably used. Typically in such a technique, after the initial exposure using the first photomask defining the image of the second structure and development of that image, the photoresist is exposed for a second time using a second photomask which is designed to protect the image of the second structure. The wafer is then subjected to a post development bake as previously described.

Preferably, an intermediate bake is also performed on the wafer for example at a temperature of 90°C for 1 minute after the initial development and before the second exposure of the photoresist. Such an intermediate bake is useful in preventing adherence of the photoresist layer to the second photomask. After the post development bake, the second structure may be formed in the silica layer using an etching process, e.g. the RIE process as previously described. Fortuitously, under the same conditions, the etch rate for silicon is significantly lower than that for silica. Consequently, the silicon acts as a stop layer thereby allowing more than sufficient time for the removal of the necessary silica. Where necessary, the alignment of the image for the second structure with the first structure may be achieved by providing the wafer with aligning features which may be suitably aligned with matching features on the second photomask.

In a second process, a silicon wafer is again coated with a thin layer of silica preferably by plasma enhanced chemical vapour deposition, although flame hydrolysis or thermal oxide growth may also be used. Thereafter a layer of metal, e.g. chromium, aluminium or nickel/chromium alloy is coated onto the surface of the wafer. The wafer is then subjected to an intermediate bake as described previously and thereafter coated with a suitable photoresist, e.g. Shipley 1400-17. The coated wafer is then soft baked and then exposed using a first photomask which defines both the first and second structures. This significantly improves the accuracy of alignment of these structures and therefore this technique is preferred where extremely precise alignment is required, e.g. in the preparation of monofunctional waveguides which can have widths of approximately 1 μ.

The image is then developed and then the photoresist hardbaked. Thereafter the image may be transferred into the metal layer by the metal etching techniques previously described. The photoresist is then removed and the image transferred into the silica layer preferably using an etching process, e.g. the previously described RIE process. Thereafter, a protective layer, for example of silicon nitride, is deposited on to the wafer in order to protect the structures during the subsequent silicon etching process.

The protected wafer is then coated with photoresist, preferably after being dried and primed. The coated wafer is then softbaked. The photoresist coating is then exposed through a second photomask which protects the photoresist in the area which defines the structures but which allows the remainder of the photoresist to be removed. Suitable alignment means can be provided by the first photoresist during the first exposure so that adequate positioning of the second photomask is achieved. After the second exposure the image may be developed as before.

The image is transferred into the protective layer, preferably using a suitable RIE process as before. For example an RIE process employing carbon tetrafluoride may be adventiously employed where the protective layer is silicon nitride.

A silicon wafer prepared according to the above methods can then be used as a master pattern to fabricate a metal master, preferably of nickel, for use in the subsequent creation of embossing shims.

The preferred metal master, i.e. nickel, can be prepared using an electroforming process. In such a process, the cleaned and dried silicon wafer is initially metalised, for example by evaporating one or more coatings onto the structured surface. Typically, an initial layer of chrome is used on to which is then deposited a second layer of silver. The initial layer is usually of the order of 10 nm in thickness and the second layer is of the order of 60 nm in thickness. The metalised wafer is then used as a cathode.

In the electroforming process it is preferred that the current, temperature and pH are maintained such that a smooth non-grainy and stress-free deposit is formed. Typically, a 5 current of 2 A.dm^*2 can be used such that a deposition rate of about 25 μ per hour is achieved thereby forming a 300 μ thick metal master in about 12 hours. This relatively rigid metal master can then be used to produce shims or further generations of duplicates for other purposes.

After the electroforming process the metal master is removed from the silicon wafer. 10 Usually, the previously deposited metal layers adhere to the metal master but may be removed using a suitable etching solution.

As previously stated, the metal master can be used to emboss a suitable plastics material. However, it is an advantage of the present invention that further copies can be prepared from the metal master which faithfully reproduce the structures contained thereon. 15 These further copies can then be used as embossing shims and can more easily be replaced from the metal master than a new metal master can be formed from a master pattern silicon wafer.

The metal master is first subjected to a passivation process wherein a layer of oxide is grown over the surface. This oxide layer acts as a release layer and prevents the 20 subsequent electroformed metal layer from adhering to the metal master. The previously described electroforming process may be employed to form a further relatively rigid metal master which is of the opposite sex to that from which it has been copied. The further metal master may then used in an electroforming process similar to that previously described but which is used to form a relatively thin and hence flexible copy, typically of a thickness of 25 100μ. This copy, which is the same sex as the metal master produced from the silicon wafer, can then be used as a shim in an embossing process.

As stated above shims can be prepared which are able to emboss more than one structure at a time using a technique requiring the joining together of more than one component from which the shim is to be copied. This technique can also be used to prepare 30 extensive shims, i.e. shims which extend over an extended area so that large scale embossing can be achieved.

In this technique, the master pattern is preferably formed from a composite comprising at least two components, which are suitably aligned and jointed. Each of the components carries a representation of a particular structure which may be the same or 35 different as required. Preferably the components are formed from polymer blocks. Although metal or silicon components could be used the advantage of using polymer blocks is that the polymer block is inherently more resilient than one formed from silicon or metal. Consequently, when two blocks of polymer are abutted one to another there is a natural tendency for any minor misalignments and gaps between the blocks to be accommodated.

The polymer blocks are preferably cast using a metal master to impart the desired structures into the blocks. Preferably, a relatively thick metal master, for example having a thickness of about 1500 μ, which may formed from the silicon wafer using the previously described electroforming process, is used. This allows for reuse of the thick metal master and provides the desired rigidity so that acceptable tolerances are achieved.

Usually, the preparation of optical components is conducted in a clean environment, e.g. Class 100 conditions, to avoid any unnecessary contamination. However, after casting the polymer blocks, it is usually necessary that at least one end each polymer block is treated, e.g. by microtoming, so that a true face is produced and usually such treatment is not able to be conducted in the same clean environment. It is therefore preferred that the polymer block is encapsulated within a suitable polymer which is readily and selectively soluble in a solvent, e.g. a water soluble polymer. After encapsulation the polymer block may be more easily stored prior to and during the subsequent treatment outside of the clean environment. After treatment, the encapsulated polymer block may be returned into the clean environment wherein the encapsulating polymer is removed, e.g. by washing with water when a water soluble polymer is employed.

Two such polymer blocks may then be aligned and joined to form a composite.

As previously indicated it is possible to transfer alignment marks onto the silicon wafer during the etching process. These marks can therefore be transferred onto the polymer blocks and thereafter can assist in the alignment of the blocks.

The alignment process is preferably performed using a reference surface, e.g. flat glass plate, against which the structured surface of each of the polymer blocks can be pressed. A backing plate is used to transmit sufficient pressure through the blocks so that the blocks are retained in position in a direction through the backing plate and reference surface. The pressure may be applied to the backing plate by any suitable means for example either pneumatically or hydraulically. Particularly suitable is a pneumatically inflated bag.

The blocks may then be moved between the reference surface and backing plate by any suitable means, e.g. micropositioners, and accurately positioned using the alignment marks. Once positioned and abutted so that there is no discernible gap between the blocks, the blocks may be fixed into relative position. Suitably, the fixing is achieved by the use of an appropriate resin which may be introduced through the backing plate so as to contact the blocks. After curing the resin, the blocks form a composite which may then be removed from the between the reference surface and the backing plate.

The composite may then be metalised and, using the electroforming process as previously described, a new metal master produced from which shims and/or further composites can be obtained.

Claims

1. A method for producing a shim for embossing a desired structure into an article which method comprises

(a) forming a master pattern having a contoured metalised surface which 5 conforms to the desired structure;

(b) electroforming a layer of a first metal onto the metalised surface to form a metal master;

(c) releasing the metal master from the master pattern;

(d) electroforming an other layer of a second metal, which may be the same 10 or different from the first metal, onto that surface of the metal master which was in contact with the contoured metalised surface to form a shim; and thereafter

(e) releasing the shim from the metal master.

2. A method as claimed in claim 1 wherein the contoured metalised surface comprises one or more coatings.

153. A method as claimed in claim 2 wherein the contoured metalised surface consists of an initial layer of chromium and a second layer of silver.

4. A method as claimed in any one of claims 1 to 3 wherein during electroforming of the metal master the metalised surface acts as a cathode.

5. A method as claimed in any one of claims 1 to 4 wherein the layer of the first metal 20 is smooth non-grainy and stress-free.

6. A method as claimed in any one of claims 1 to 5 wherein the metal master is about 300 μ thick.

7. A method as claimed in any one of claims 1 to 6 wherein the metal master is subjected to a passivation process wherein a layer of oxide is grown over the surface prior to 25 the electroforming of the other layer of the second metal.

8. A method as claimed in any one of claims 1 to 7 wherein the master pattern is formed from at least one block of polymeric material.

9. A process for preparing a master pattern capable of use in the method of claim 8, which process comprises

30 (i) preparing at least two blocks of polymeric material in which the desired structures have been defined;

(ii) abutting the at least two blocks of polymeric material such that the desired structures are in suitable alignment;

(iii) fixing the blocks into their relative positions to form a composite block

35 having a surface in which is defined the desired structures; and thereafter (iv) metalising the surface of the composite block so as to form the master pattern.

10. A method as claimed in any one of claims 1 to 7 wherein the master pattern is formed from at least one wafer comprising silicon or quartz.

11. A process for preparing a master pattern capable of use in the method of claim 10 which process comprises the steps

(i) selecting a wafer of silicon, or quartz, of sufficiently large diameter to accommodate the desired structure;

(ii) cleaning the wafer; (iii) removing residual water to provide a dried wafer;

(iv) optionally priming the dried wafer;

(v) spinning a photoresist coating onto the optionally primed wafer to an appropriate thickness such that the photoresist coating will not be totally consumed in a subsequent etching process to form a photoresist coated wafer; (vi) softbaking the photoresist coated wafer;

(vii) masking the photoresist coating with a photomask defining the desired structures;

(viii) illuminating the exposed areas of the masked photoresist coating to form an exposed image; (ix) developing the exposed image;

(x) optionally performing a post development bake on the developed image to consolidate the image;

(xi) transferring the developed image into the wafer by etching to form an etched surface in which is defined the desired structures; (xii) removing the remaining photoresist coating; and thereafter

(xiii) metalising the etched surface thereby forming the master pattern.

12. A process for preparing a master pattern capable of use in the method of claim 10 which process comprises the steps

(ii) cleaning the wafer;

(iii) removing residual water to provide a dried wafer;

(iv) optionally priming the dried wafer;

(v) spinning a photoresist coating onto the optionally primed wafer to a thickness of less than 3μ to form a photoresist coated wafer; (vi) slowly heating the photoresist coated wafer at such a rate, so as to avoid deforming and/or melting the photoresist coating, to an annealing temperature at which temperature the photoresist coated wafer is held for a suitable period of time thereby annealing the photoresist coating such that it is more resistant to the etching process;

(vii) illuminating the exposed areas of the masked photoresist coating to form an exposed image; (viii) developing the exposed image;

(ix) optionally performing a post development bake on the developed image to consolidate the image;

(x) transferring the developed image into the wafer by etching to form an etched surface in which is defined the desired structures; (xi) removing the remaining photoresist coating; and thereafter

(xii) metalising the etched surface thereby forming the master pattern.

13. A process for preparing a master pattern capable of use in the method of claim 10 which process comprises the steps

(ii) cleaning the wafer;

(iii) removing residual water to provide a dried wafer;

(iv) depositing a metallic layer onto the wafer;

(v) optionally priming the metalised wafer; (vi) spinning a photoresist coating onto the optionally primed metalised wafer to a thickness of less than 3μ to form a photoresist coated wafer;

(vii) masking the photoresist coating;

(x) performing a hard bake on the developed image to consolidate the image;

(xi) transferring the developed image into the metal layer by immersion into a metal etch solution;

(xii) transferring the etched image into the wafer by etching to form an etched surface: (xiii) removing the remaining photoresist coating; and thereafter (xiv) metalising the etched surface to form a master pattern.

14. A process as claimed in claim 13 wherein the metallic layer is chromium, aluminium or an alloy comprising at least one such metal.

15. A process as claimed in either claim 13 or claim 14 wherein the metallic layer has a thickness of about 200 nm.

16. A process for preparing a master pattern capable of use in the method of claim 10 which process comprises the steps

(i) selecting a wafer of silicon of sufficiently large diameter to accommodate the desired structure;

(ii) cleaning the wafer;

(iii) removing residual water to provide a dried wafer;

(iv) coating the silicon with a layer of silica to a desired depth;

(v) optionally doping the surface of the silica layer to a desired depth with a melting point depressant to form a surface composition which has a melting point which is lower than that of the silica layer;

(v) patterning the surface of the silica with the desired structure; and thereafter optionally

(vi) increasing the temperature of the surface of the silica such that the silica becomes slightly mobile and thereby flows to reduce or eliminate minor imperfections in the desired structure; and thereafter

(vii) metalising the surface showing the desired structure thereby forming the master pattern.

17. A process for preparing a master pattern capable of use in the process of claim 10 and which master pattern is a multi-structured wafer onto which more than one type of desired structure has been etched, which process comprises

(i) selecting a wafer of silicon of sufficiently large diameter to accommodate the desired structures;

(iv) coating the silicon with a first thin uniform layer of silica to a desired depth;

(v) applying, exposing and developing a first photoresist layer thereby transferring a first image of a desired first structure into the first layer of silica;

(vi) removing the first photoresist layer; (vii) attacking the first layer of silica and thereby transferring the first image into the silicon;

(viii) removing the remaining silica to leave a desired first structure in the silicon;

(ix) coating the silicon with a second thin layer of silica to a desired depth; (x) applying, exposing and developing a second photoresist layer thereby transferring a second image of a desired second structure into the second layer of silica;

(xi) removing the silica from the second layer not containing the image of second structure; (xii) performing a post development bake on the wafer from step (xi);

(xiii) forming a desired second structure into the second layer of silica; and thereafter

(xiv) metalising the surface showing the desired first and second structures. 19. A process for preparing a master pattern capable of use in the process of claim 10 and which master pattern is a multi-structured wafer onto which more than one type of desired structure has been etched, which process comprises

(iv) coating the silicon with a layer of metal;

(v) subjecting the metalised wafer to an intermediate bake as described previously

(vi) coating the intermediate baked wafer with a layer of photoresist; (vii) subjecting the photoresist coated wafer to a soft bake;

(viii) exposing the photoresist layer using a first photomask which defines a desired first feature;

(ix) developing the exposed photoresist layer;

(x) subjecting the developed photoresist layer to a hard bake; (xi) transferring the image of the desired first feature into the metal layer;

(xii) removing the photoresist and transferring the image of the desired first feature into the silica layer;

(xiii) depositing a protective layer on to the wafer in order to protect the desired first features; (xiv) coating the protected wafer with a second layer of photoresist; (xv) exposing the second photoresist layer through a second photomask which protects the photoresist in an area which defines the desired second feature but which allows the remainder of the photoresist to be removed;

(xvi) transferring the image into the protective layer; and thereafter

(xvii) metalising the surface showing the image.