WO1995010851A1

WO1995010851A1 - Process for the anisotropic etching of monocrystalline materials

Info

Publication number: WO1995010851A1
Application number: PCT/DE1994/001120
Authority: WO
Inventors: Henderikus Offereins
Original assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Priority date: 1993-10-12
Filing date: 1994-09-20
Publication date: 1995-04-20
Also published as: DE4334666C1

Abstract

The invention relates to a process for the anisotropic etching of monocrystalline materials. Whereas additional steps are required in prior art etching processes in order first to determine the exact position of the crystal axes along which the etching mask is directed, their precise determination is unnecessary in the process of the invention. To this end a mask is produced, the aperture area of which is smaller than the basic area on the mask side of the recess to be made. The mask has notches at the edges which are directed outwardly form the mask aperture. The depths of the notches are such that the crystal planes forming the sidewalls of the subsequent recess or boundary surfaces of intermediate structures are established only by their end points. The process is applicable especially to the production of micromechanical components with close tolerances.

Description

DESCRIPTION

METHOD FOR ANISOTROPIC ATZEN MONOCRISTALLINE

MATERIALS

The invention relates to a method for anisotropic etching of monocrystalline materials for the production of micromechanical components with small tolerances.

The anisotropic etching technique is used to produce three-dimensional components with small dimensions (down to the micrometer range) from monocrystalline materials such as B. silicon used. In anisotropic etching, the strong dependence of the etching rate on the crystal direction is used to produce defined structures. For practical applications, in particular the etching rate of the (111) planes, which is lower by a factor of 100-1000 compared to the (100) planes in silicon, and the possibility of etching selectively, i. H. It is important to stop the etching process on highly doped layers or electrochemically at p / n junctions.

Anisotropic etching processes are already used industrially for the production of micromechanical components, such as sensors for mechanical quantities (pressure, force, acceleration) and for thermal and chemical quantities. Micromechanical actuators, such as miniaturized pumps, passive and active valves made of silicon, are also manufactured using this method.

The known methods for three-dimensional structuring of silicon with the aid of anisotropic etching technology provide the following process steps: The starting material for the component is usually formed by silicon wafers with a diameter of 75, 100, 125 or 150 mm. The surfaces of these wafers are along a defined crystal direction, e.g. B. aligned the (100) plane. A cut segment, called Fiat, defines the position of the silicon crystal by specifying another crystal plane in the wafer, e.g. B. the (110) plane. First, a mask is produced which has the openings which determine the component geometry.

Before the etching process, the silicon wafer is coated in the anisotropic etching solution with a material that is resistant to the etching solution. Layer materials known from microelectronics, such as thermal silicon oxides, LPCVD nitrides, PECVD oxides and nitrides or PECVD silicon carbide, are customary here.

With the help of the photolithography process, which is also known from microelectronics, the structure of the mask mentioned above is transferred to the passivation material and the passivation layer in the areas defined by the mask is opened like a window by etching processes (for example dry etching). The coated silicon wafer is then immersed in an etching bath with the anisotropic etching solution and the three-dimensional structure is produced by this etching process.

Because of the fact that the etching rate of the (111) planes is lower by a factor of 100 to 1000 compared to the (100) plane of the wafer surface, a structure ideally results in which (111) planes are formed on the edges of the passivation openings, but not laterally or only slightly underestimated. These planes have a defined angle to the (100) plane of the wafer surface (54.7 °). Due to the temporal abrasion of the wafer material in the open areas, a depression is formed, the side walls of which are defined by (111) planes and the bottom surface of which is parallel to the wafer surface. With this process, thin membranes can be produced, as well as bending beams and webs using etching processes on both sides.

When measuring the structure anisotropically etched in this way, however, there are lateral undercuts of the (111) planes, which can have their cause in various effects mentioned below. The undercuts can be controlled specifically, e.g. B. in the process known from DE 41 06 287 for anisotropic etching, in which the dimensioning of the mask structure transferred to the passivation material and its orientation with respect to the crystal orientation of the wafer and the anisotropy properties of the wafer material are chosen such that the desired size and shape of the base of the recess is achieved by deliberately under-etching the masking layer. The following problems arise with the anisotropic etching processes described above:

a) Finite etch rate of the (111) plane:

Compared to the ideal case, the (111) planes have an etching rate which is dependent on the passivation material and the type and concentration of the etching solution. This is z. B. for KOH as an etching solution at 33 wt.% And 80 ° C and silicon carbide as passivation about 0.5 microns / h. The resulting lateral undercut is very reproducible and can already be taken into account when dimensioning the etching mask.

b) Mask errors:

Depending on the manufacturing process of the mask, the mask geometry has different tolerances. These tolerances lead to systematic errors in the batch process, i. H. that the error is the same for all components manufactured with the mask.

c) Adjustment error in the photoresist process:

With almost every micromechanical component, the etching mask has to go to other structures, e.g. B. to electronic components such as resistors or electrodes. Depending on the process, this adjustment can be made to an accuracy of approximately 1 μm. In addition, variations in the structure widths also occur during the exposure and etching process. In the case of optimized processes, the mask structure can therefore only be transferred to the passivation with an accuracy of approximately 1-5 μm. These errors are of the same size within one wafer (substrate), but not within a batch process for several wafers. This error plays a minor role in terms of magnitude.

d) Errors in the starting substrate:

The starting substrate, the silicon wafer, cannot be manufactured with any accuracy. The wafers have thickness tolerances and parallelism errors of the two wafer surfaces. The crystal orientation is also correct does not exactly match the surface and the fi orientation. The tolerance for the deviation of the surface orientation from the crystal is referred to as the tilt and is indicated by the angle between the real crystal direction and the surface of the wafer. The deviation of the Fiat direction from the specified crystal direction is referred to as the Fiat misorientation and is also indicated by the angle. Typical manufacturer information for the tilt and fiat misalignments are: - Tilt: ± 1.5 °

- Flat misorientation: ± 1.5 °

The defects in the starting substrate are the same for the components that are manufactured in a wafer and have the same dimensions.

The influence of the tilt on the tolerances of the component is also determined by the etching depth and is in the order of up to 10 μm for the specified tilt values.

The flat misorientation scatters heavily from wafer to wafer and the effects on the component geometry also depend on the size of the mask openings and thus the components. The resulting lateral undercut of the mask along the (111) plane is in the range 10 - 100 μm. Since the substrate defect is not the same for all wafers, these effects, above all the flat defect orientation, lead to large manufacturing tolerances in batch processing.

The effects described above are known. They lead to relatively high tolerances in the batch processing of micromechanical components such as sensors and actuators based on silicon.

For applications with high accuracy requirements, methods are known which primarily minimize the effects of flat misorientation on the tolerances of a component. Due to the manufacturing technology, the flat orientation error can be almost completely compensated for by the mask technology. According to the prior art, it is necessary to determine the crystal orientation exactly before the anisotropic etching and to use the phototechnology to structure the passivation layer according to the crystallographic alignment. Two methods are known for determining flat misorientation and tilt.

In one method, the real crystal orientation is determined using an analysis aid such as the X-ray diffractometer and the angle between the Fiat and the crystal orientation is measured.

In a second method, test structures for the detection of the crystal plane are exposed and measured in an anisotropic etching process. DE 41 36 089, for example, teaches a method for determining the crystal orientation in a wafer, in which an etching mask with a strip-shaped mask opening and in each case a pointed attachment on the long sides is applied to the wafer in an alignment along a predetermined marking of the wafer, the wafer is etched anisotropically to obtain a groove, and finally the actual crystal orientation is calculated using the angle between the edges of the etched groove and the long sides of the mask opening.

In both methods, the mask for the anisotropic etching process for producing the component is finally adjusted according to the previously measured crystal orientation. However, these are very complex methods, some of which are carried out with computer support.

If there are other components in the component to which the mask has to be adjusted, these methods cannot fully compensate for the flat misorientation.

Both of the methods mentioned are technologically complex and expensive processes, since several additional process steps and additional equipment are required.

The object of the present invention is therefore to provide a method for anisotropic etching, with which the production of defined recesses with small tolerances in monocrystalline substrates is possible in a simple manner.

The object is achieved with the method specified in claim 1. It was recognized here that the entire shape of the etching mask is not used to determine the geometry of the recess to be produced or of boundary surfaces of intermediate structures that arise during the etching process is decisive, but only individual points of the mask edge. In the method according to the invention, a mask shape is therefore produced, the opening area of which is smaller than the base area of the recess to be produced on the mask side, and which has notches on the edges which are directed outward from the mask opening. The depths of the notches are chosen such that the crystal planes which form the side walls of the later recess are determined solely by their end points (ie the edge point or edge points in the area of the deepest point of the notch). When dimensioning the mask, in particular the position of the end points of the notches, the etching time and the etching rate of the respective crystal planes are taken into account. So z. B. when etching in the (111) direction in silicon, the end points of the notches are not placed exactly on the (111) planes that form the later recess, but at a distance from it that takes into account the finite etching rate of these planes and the etching time (taking lateral under-etching into account).

The inner edges of the notches represent convex planes which are under-etched in the course of the etching process, so that the desired geometry of the recess, which is determined solely by the end points of the notches, results. So it is z. B. possible to create a recess with a square base with a star-shaped mask opening, the four peaks, which correspond to the notches, the four side walls (z. B. in silicon four (111) planes) of the recess.

The recesses that can be produced with the method according to the invention are of course not limited to rectangular shapes. So z. B. in silicon with KOH as an etching solution, etch recesses with a combination of (111) and (IOO) planes as boundary surfaces, the etching time and the different etching mask being dimensioned (ie in particular the position of the end points of the notches) Etching rates of (111) and (IOO) planes must be taken into account.

The type of crystal planes that form during the etching, and thus the possible shape of the recess, depends on the crystal and the etching solution used. An example of this is the different etching behavior of KOH compared to EDP (mixture of water, ethylenediamine and Py- rocatechol) in silicon (see, for example, BY Bäcklund and L Rosengreen, J. Micromech. Microeng. 2 (1992), 75-79).

The method according to the invention can also be used to define structures which arise during the etching process (intermediate structures) and which have disappeared after the etching process has ended. Etching processes are known in which the undercut of convex corners, e.g. B. stiffening within a membrane is prevented by a suitable compensation form of the etching mask (cf., for example, H. Offereins et al., Sensors and Materials 3, 3 (1992), 127-144). Such a form of compensation is e.g. As shown in FIG. 3 c as a strip-shaped widening of the passivation layer in the area of the corners of the stiffening. Because of these strips, which are under-etched in the course of the etching process, there are intermediate structures at the corners of the stiffening, the dimensions of which have to be predetermined very precisely, so that the stiffening has sharp corners after the etching process has ended. According to the invention, boundary surfaces of these intermediate structures are determined solely by the end points of notches in the mask opening (for example on both sides of the strips for the exact definition of the width of the intermediate structure).

One possible application of the method according to the invention to the production of intermediate structures for the optical control of the etching depth is shown in the exemplary embodiment.

As explained in more detail in the exemplary embodiments, an exact alignment of the etching mask with respect to the crystal orientation is no longer necessary in the method according to the invention.

With the invention, the flat misalignment can be compensated for, just as in the methods previously described as prior art, without additional process steps or additional equipment being required. Compared to conventional etching technology without measures to compensate for flat misorientation, the manufacturing tolerances of many micro-mechanical components can be drastically reduced without additional costs. The method can be applied to all anisotropically etchable materials regardless of the crystal orientation in the substrate. There are also no restrictions with regard to the passivation material.

According to claim 2, to produce a recess with a base area that can be assembled from rectangular areas, the dimensions of which are predetermined by defining an ideal mask-side base area on the substrate surface, a shape of the mask opening corresponding to the shape of the base area is selected, which on each side half the side length has a notch, the mask opening being arranged such that the end points of each notch are in the region of half the side lengths of the ideal mask-side base.

The ideal mask-side base area is preferably (cf. claim 3) defined at a predetermined angle to a marking made on the substrate (e.g. the Fiat for silicon substrates), the marking being almost parallel to the cutting line of a further crystal plane (e.g. the (111) plane with silicon) runs with the substrate surface. This corresponds to the usual technology, in which the ideal mask-side base area is aligned with one side parallel to the Fiat.

The advantageous embodiment of the method according to claim 4 relates to substrates in which such. In the case of silicon wafers, for example, the maximum possible deviation of the marking direction (in the case of silicon wafers: flat misorientation) from the corresponding crystal direction is specified (tolerance specification).

The depth of the notches is then to be designed so that in the event of the maximum possible misorientation of the marking, which is known due to the tolerance specification, the crystal planes which are formed would just touch the corners of the basic shape of the etching mask.

In order to maintain a defined distance from a point on the edge of the recess to another point on the substrate, a notch is arranged in the mask opening in such a way that its end point or one of the end points lies on the corresponding edge point. To limit the depth of the recess, an etching stop layer, e.g. B. by appropriate doping, are introduced into the substrate (claim 7).

These and other advantageous refinements of the method according to the invention specified in the subclaims are to be explained in more detail using the example of the drawings in the following exemplary embodiments.

Show:

FIG. 1 a) an example of an ideal structure of a recess etched anisotropically using conventional methods,

1 b) an example of an anisotropically etched structure of a recess resulting from a flat misorientation,

FIG. 2 a) a top view of a structure produced using conventional methods in a wafer with flat misalignment,

FIG. 2 b) a top view of a structure produced with the same flat misorientation using the method according to the invention,

FIG. 2 c) a comparison of the structures from 2 a) and 2 b) in section AA ',

Figure 3 a) ideal structure of a pressure sensor in side view and

Top view,

FIG. 3 b) the resulting structure of the pressure sensor in conventional etching technology,

Figure 3 c) which in the inventive method for producing the

Pressure sensor used mask technology in top view, FIG. 3 d) the resulting structure of the pressure sensor when using the etching technique according to the invention,

Figure 4 a) an example of a mask structure for optical control of the

Etching depth with conventional etching technology, and

Figure 4 b) an example of a mask structure for optical control of the

Etching depth when using the method according to the invention.

The ideal case of an anisotropically etched recess with the depth H is shown in FIG. 1 a). The structured passivation layer (7) with a width of the mask opening that corresponds to the width b of the opening on the mask side of the recess is located on the silicon wafer (10). This structure results when the mask is aligned parallel to the Fiat without flat misalignment. The side walls of the recess are formed by (111) planes, which are not undercut. In the real case, d. H. with a flat misorientation, a structure according to FIG. 1 b) is generated with the same mask arrangement. There are lateral undercuts in the structure of sizes d1 and d2, so that the width b of the base surface of the recess on the mask side is greater than the desired width.

The effects of a flat misorientation on the geometry of the component to be etched when using the conventional mask technique are shown in plan view using the example of the etching technique of a membrane (3) in (IOO) silicon in FIG. 2a). It is assumed that the rectangular mask opening is ideally aligned parallel to the Fiat and the (110) plane is inclined by the angle α relative to the Fiat.

Under these assumptions, the rectangular opening (1) in the passivation layer (7) is inclined by the angle α with respect to the (110) plane. If this structure is then immersed in an anisotropic etching solution, the etched structure aligns itself with the real crystal direction during the etching process, ie with long etching times four (111) planes, which are defined by the corners (4) of the mask opening that describe component geometry. The dimensions of the etched rectangular opening in the silicon directly on the surface below the passivation can be determined by the rectangle (2) rotated by the angle α and circumscribing the rectangular opening. Compared to the ideal component geometry (1), this structure is rotated by the angle α and too large at the edges of the membrane by the deviation of the ideal from the circumscribing square (distance d along the edges in FIG. 2 a)).

For many applications, the rotation of the real to the ideal structure (maximum 1.5 °) plays a subordinate role. B. a twist of electronic components of the micromechanical structure has no significant influences on the component characteristics.

However, the deviations d at the edges of the membrane are common in many applications, e.g. B. piezoresistive sensors of essential importance, as this significantly affects the component function (enlargement of the membrane area, shift in the mechanical stress state). The component dimensions are statistically distributed depending on the flat misorientation of the substrate wafers.

The basic finding of the invention is that the definition of the crystal planes determining the component geometry is not determined by the edges of the rectangular opening (1) in the passivation (7), but at clearly defined points (5) of the design. For this purpose, the rectangular opening in the mask is reduced and expanded by triangular notches (5), as shown in Figure 2 b. Such a notch, the end points of which are located on the ideal mask opening (1), is inserted in each case on the symmetry axes of the membrane. The actual membrane edges remain hidden.

The inner edges (6) of the notches represent convex corners that are under-etched in the course of the etching process. A membrane (3) is formed, the edges of which are defined by the (111) planes, which are released by the end points of the notches (5). The dimensions of the membrane are always the same size for small angles α, ie that when specifying the flat misorientation within the specified tolerances (flat misorientation: ± 3 °), components can be produced, which may be rotated by a few degrees compared to the ideal position, but always have the same size b1 regardless of the Fi orientation. This is not the case for the membrane produced with conventional mask technology, since its size b2 depends on the respective flat misorientation. A comparison of the two resulting membrane dimensions b1 and b2 for a given flat misorientation is shown in FIG. 2 c), which represents a section along the axis AA 'of the two FIGS. 2 a) and 2 b).

The depth of the notches (5) is to be designed so that, with the maximum possible flat misorientation, the resulting (111) planes just touch the corners of the masking (4).

If defined distances have to be maintained in a design at a certain point, then several notches can also be arranged along an axis (for example on a membrane edge).

The shape of the notches (5) can be chosen as desired (e.g. triangular, semicircular or also rectangular). It should be noted that the definition of the position of the (111) planes should be punctiform, so that the smallest possible structures should be used as notches.

As a further example, the method according to the invention for producing a piezoresistive pressure sensor is to be used. The core of a piezoresistive pressure sensor is a thinly etched membrane (3) which deforms under the action of pressure. Figure 3 a) shows such a pressure sensor in cross section and in plan view. The pressure-dependent deformation results in a defined stress state in the membrane. In the areas where the mechanical stress has maxima (at the membrane edges), resistors (9) (eg produced by ion implantation) are arranged, which transform the mechanical stress signal into a change in resistance. An output signal which is proportional to the pressure is generated by connecting a plurality of resistors to form a Wheatstone full bridge. The sensor shown here has a rectangular reinforcement (8) in the middle of the membrane (3). The amounts of the voltage maxima at a defined pressure are dependent on the diaphragm area. It should therefore be manufactured exactly.

The stress maxima due to the action of pressure occur at the ends of the stiffening (8) and the opposite membrane edges. The piezoresistive resistors must be arranged exactly at these points in order to obtain the maximum sensitivity of the sensor. The width of the voltage maxima is only a few μm, so that the piezoresistive resistors can be positioned very precisely, i. H. that the distances d between the membrane edges (1) or the stiffening (8) and the piezoresistors (9) must be observed very precisely.

In the ideal structure, a distance d between the membrane edge and the piezoresistors is specified. With the conventional mask technique, this distance d is increased by the amount b x tan α, as shown in FIG. 3 b) (b: desired width of the membrane). Since the crystal orientation of the wafers scatters around the tolerance range, no provision can be made for this in the mask (7).

When using the mask technique according to the invention, as shown in FIG. 3 c), the width of the rectangular opening of the passivation (1) is reduced by the amount 2 xbx tan α and notches (5) of the depth bx tan α in the symmetry axis of the resistors ( 9), inserted in each case at the membrane edges and at the ends of the stiffening, the internal dimensions of the mask opening in the area of the stiffening and the depth of the notches in this area being determined in an analogous manner. This ensures that the center points of the resistors are always at the ideal distance d from the membrane edges, regardless of the flat misorientation (cf. FIG. 3 d)). Over the entire resistance geometry is the maximum deviation of d: I x tan α (I: length of the resistance). Because of the small resistance length of around 100 μm, this is a negligible tolerance compared to the membrane width of around 2500 μm.

In addition, as shown in FIG. 3 c), undercutting of the corners of the reinforcement (8) can be prevented by a suitable compensation form of the etching mask. FIG. 4 shows an example of the use of the method according to the invention for producing defined intermediate structures during the etching process, which serve for the optical control or determination of the etching depth H. FIG. 4 a shows the conventional mask technique for producing a recess (3) with a square base in (IOO) silicon (in the case of KOH as an etching solution), which is delimited by four (111) planes. When determining the mask shape, use is made of the fact that the etching rate in all (IOO) directions in the silicon crystal is the same, so that the lateral etching of an intermediate structure in the (IOO) direction can be observed in order to control the etching depth H. For this purpose, the opening window of the mask (7) is divided in the diagonal direction, as shown in FIG. 4 a, by a web. Ideally, this web is parallel to the intersection of a (100) plane with the crystal surface and has a width of 2 x H. Since the direction perpendicular to the surface of the silicon crystal is also an (IOO) direction in this case, the instantaneous etching depth during the etching process can be determined from the amount of the lateral undercut of the mask web, ie from the width of the intermediate structure. The etching depth H is reached when the mask bar is completely undercut. The etching depth can be checked optically in this way when using a transparent passivation layer. The accuracy of this method depends on how exactly the (IOO) planes can be defined by the mask web that limit the intermediate structure generated. In the case of a flat misorientation that occurs in real cases, the boundary lines of the mask web are not exactly parallel to the intersection line of a (100) plane with the crystal surface (deviation: angle α). In this case, the intermediate structure (here as a partition) that arises after a certain etching time by undercutting the web laterally (boundary areas drawn in dashed lines) no longer has the ideal target width bs (ideally without flat misalignment; solid line), but the smaller width bi (depending on flat misalignment), so that the desired etching depth H has not yet been reached when the undercut is completely undercut.

In the method according to the invention, as shown in FIG. 4 b, the boundary surfaces of the intermediate structure are determined by the end points of two notches, which are 2 × H in the area of half the side lengths of the web are arranged to each other. The depth of the notches was chosen so that taking into account the maximum possible flat misorientation known from the tolerance specifications of the silicon wafer, the (IOO) planes that delimit the intermediate wall, which arise during the etching process, solely through the end points of the notches, but not through other corner points the mask can be determined (taking into account the etching rate of the (IOO) planes and the etching time). Thus, as shown in FIG. 4b, the width bi corresponds to an intermediate structure (delimited areas shown in dashed lines; under-etched area of the mask 11), which has formed after a certain etching time, exactly the desired width bs, that is, when the undercut is completely undercut In spite of flat misalignment, the etching depth H is exactly reached. With the method according to the invention, the etching depth can be controlled very precisely in this way, regardless of the precise knowledge of the flat misorientation of the wafer.

Claims

PATENT CLAIMS

1. Method for anisotropic etching of monocrystalline materials for the production of micromechanical components, in which an etching mask (7) with at least one mask opening is applied to a surface of a substrate, which consists of the monocrystalline material, and then the substrate in The area of the mask opening is anisotropically etched to produce a three-dimensional recess, characterized in that the mask opening is formed as follows:

- The area of the mask opening is chosen to be smaller than the base area of the recess to be produced on the mask side;

- The mask opening is provided at the edges with notches (5) which are directed away from the mask opening to the outside;

- The notches have depths such that the geometry of the recess to be produced and / or boundary surfaces of intermediate structures which arise during the etching process are formed by crystal planes which are calculated from the positions of the end points of the notches, taking into account the etching time and the etching rate of the respective crystal planes are determined, the end points of the notches being the edge points in the region of the deepest points of the notches.

2. The method according to claim 1, characterized in that for producing a recess with a base surface which can be assembled from rectangular surfaces, the dimensions of which are predetermined by defining an ideal mask-side base surface (1) on the substrate surface, one of rectangular surfaces Composable basic shape of the mask opening is selected such that the mask opening has a notch (5) on each side at half the side length, and that the mask opening is arranged in such a way that the positions of the end points of the notches lie in the regions of half the side lengths of the ideal mask-side base area (1).

3. The method according to claim 2, characterized in that one side of the ideal mask-side base is fixed at a predetermined angle to a mark made on the substrate, which runs almost parallel to the line of intersection of a further crystal plane with the substrate surface.

4. The method according to claim 3, characterized in that when using a substrate with a predetermined maximal value of a possible deviation from the parallelism of the marking to the line of intersection of the further crystal plane with the substrate surface, the depth of the notches is chosen so that in the case the maximum possible deviation, the crystal planes determined by the positions of the end points of the notches just touch the corners of the basic shape of the mask opening.

5. The method according to claim 1, characterized in that in order to maintain a defined distance of a point at the edge of the recess to another point of the substrate, a notch is arranged in the mask opening in such a way that its end point or end points lies on the corresponding edge point.

6. The method according to any one of claims 1 to 5, characterized in that a silicon wafer with a (100) - or a (110) - surface is used as the substrate, the crystal planes determined by the positions of the end points of the notches the (111 ) Planes.

7. The method according to any one of claims 1 to 6, characterized in that an etching stop layer is introduced into the substrate to limit the depth of the recess before the etching process.

8. The method according to any one of claims 1 to 7, characterized in that the shape of the notches (5) triangular or semicircular or rectangular ge is selected.