WO1993022727A1 - Multiprocessing system with multiple-channel communication - Google Patents

Multiprocessing system with multiple-channel communication Download PDF

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Publication number
WO1993022727A1
WO1993022727A1 PCT/BR1993/000015 BR9300015W WO9322727A1 WO 1993022727 A1 WO1993022727 A1 WO 1993022727A1 BR 9300015 W BR9300015 W BR 9300015W WO 9322727 A1 WO9322727 A1 WO 9322727A1
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communication
module
aforesaid
channel
level
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PCT/BR1993/000015
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French (fr)
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Ricardo Broering Philippi May
João Marcelo CORREA
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Ricardo Broering Philippi May
Correa Joao Marcelo
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Publication of WO1993022727A1 publication Critical patent/WO1993022727A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

The patent: multiprocessing system with multichannel communication is a system in which two or more microprocessing modules are interlinked by multiple communication channels. The communication among the microprocessing modules is organized by a device called 'channel controller'. Its function is to identify the communication request of a determined module, and connect this module to another through a communication channel.

Description

DESCRIPTIVE REPORT OF THE PATENT "MULTIPROCESSING SYSTEM WITH MULTIPLE-CHANNEL COMMUNICATION"
This is a data-processsing system, especially a data communicating system made up of micro-processing modules, inter-linked by several communication channels and controlled by electronic digital circuits.
A multiprocessing system basically consists of two or more processors, memory and peripherals. Besides, there is a circuit that connects the processors. There are four types of models for the implementation of a multiprocessing system. The first model is characterized by processors that share the same memory (global) memory. The disadvantages of this model are that the system becomes slow due to the congestion produced when having access to the common memory; that the communication among the processors is carried out by the shared memory; and that the maximum number of processors in this model is quite limited. The second model refers to a multiprocessing system in which the processors are linked by means of a global bus. Its disadvantage is, also, the limited number of processors. The third model refers to microprocessing modules that have some devices, generally four, which are used to link one module to another. A module that has four linking devices can only be connected to other four modules. The disadvantage of this model is that for the processor to communicate with another which is not directly connected to it, it is necessary that the data to be transferred goes through intervening modules, delaying, thus, the communication. The fourth model, to which this invention belongs, is made up of microprocessing modules that are linked by several buses or communication channels.
The multiprocessing system here described has each channel of communication with few signals, that is, it has the data bits, and only two control bits while others have many control bits and even address bits. This characteristic allows the use of several communication channels and, thus, makes it possible to construct a system with several processors, because ive processors per communication channel are used at most. With this invention, which is modular, the expansion " in several levels is posssible. Another characteristic of this system is the fact that each module can directly connect to another, regardless of the number of processors, with a high rate of data transference. With an invention characterized as such, it is possible to produce a highly parallel and extremely f st computer with a relatively low production cost.
Figure 1 shows the multiprocessing system with multi-channel communication in its basic form, called "zero level" constituted by the channel controller (101) , microprocessing modules (102), indicated in the figure by the letters "a" to "n", inter-linked by communication channels (103), a control channel (104) and, for each module (102) an interruption line (105) .
Figure 2 shows the same multiprocessing system of figure 1, but it includes the external communication interface (516) linked to the internal communication channels (103) , and to the internal control channel (104) . The external communication interface (516) is linked to the external control channel (504) and to the external communication channels( 503). The channel controller (101) is connected to the external control channel (504) and to an interruption line.
Figure 3 presents a microprocessing module (102) that consists of : a CPU (300) , a DMA controller( 301) , a microprogramme (302) , local memory (303) , local bus (304) and communication interface (305) .
Figure 4 shows the expanded system, here called "level one", the configuration of which is similar to "zero level" where the modules (102) are replaced by communication systems in its basic way: "zero level". It is constituted by a channel controller (501) , zero level system (502) , inter-linked by communication channels (503) , a control channel (504) , and, for each zero level system (502) an interruption line (505) . The function of the multiprocessing system with multi-channel communication is to make possible for the modules (102) to exchange information through the communication channels (103) . The inter-module communication is controlled by the channel controller (101) . The channel controller (101) receives communication requests from a module (102) that wishes to transmit information to another module (102) and inter-links these modules (102) through an availabble channel of communication (103) . Each module (102) has a code that represents its identification number.
The function of the channel controller (101) is to receive a command word from any module .(102) that wishes to communicate, analyse this command word, and inter-link the modules (102) by sending a control word to each module (102) so that they can communicate through an available communication channel. The command word is used to indicate to the channel controller (101) which is the receiver module (102) and the level of priority of communication, and it has a bit that indicates the beginnning and end of the communication. The control word has information that indicates which is the channel of communication (103) that will inter-link the modules (102) and has a BIT that indicates the data flux direction. When the channel controller (101) makes a connection between two modules (102) , sender and receiver, it sends a control word to each of these modules (102) . The part of the control word that indicates which is the channel of communication that will inter-link the modules (102) is identical in both modules (102) . The part of the control word that indicates the data flux direction is formed by a BIT, which in the sender module (102) is the opposite to that in the receiver module (102) . For the channel controller (101) to receive a command word, it is necessary that a module (102) generates an interruption signal in its interruption line (105) . When the channel controller (101) recognizes the interruption, it identifies the code of the module that generated the interruption. Therefore, it addresses the command word to this module (102) through the control channel (104) .It is necessary that the channel controller (101) addresses a given module through the control channel (104) in order to send a control word to it, in such a way that this module receives the control word.
The channel controller (101) has registers that indicate which are the modules (102) which are communicating and which are the respective channnels being used. The channel controller (101) also has a queue that temporarily stores the pairs of modules (102) which are waiting for a communication. There is a queue for each priority level.
The channel controller (101) , when receiving a command word indicating the end of communication, sends a control word used to disconnect the modules (102) of the communication channel (103) that was the link among them. Then, the channel controller connects to this communication channel (103) the first pair of modules (102) , ready to get communicated of the non-empty queue of highest priority. The DMA controller (301) has the function of transferring data with a high rate of transference. The DMA controller (301) generates the signals of writing and reading data. During the communication with another module (102) , the DMA controller (301) can operate in two ways: sender and receiver. As sender, it is in charge of the data transference of local memory (303) , passing through the communication interface (305) of the module itself (102) , oriented towards a BUFFER included in the communication interface (305) of the receiver module (102) . As receiver or DMA controller (301) , it transfers data from the BUFFER included in the interface of its module (102) to the local memory (303) .
The microprogramme (302) contains the instructions that the CPU (300) should carry out during the communication. The local bus (304) contains data lines, address and control. The communication interface (305) temporarily stores the command word, written by the CPU (300) , generating an interruption signal in the channel controller (101) , that later will read the command word. The communication interface (305) receives the control word through the control channel (104) . When receiving a control word, the communication interface (305) connects the local bus (304) to one of the communication channels (103) and generates an interruption in the CPU (300) in order to execute the microprogramme. The comunication interface (305) contains a data BUFFER that serves to store temporarily the data coming from the sender module (102) . The BUFFER generates a signal which is sent to the sender module (102) , indicating that the BUFFER is full up, momentarily paralysing the present inter-module transference up to the moment when there is room in the BUFFER for the entrance of new data. In this way, it is possible to synchronize the inter-module communication at different transmission speeds. The channel of communication (103) has several two dimensional data bits and two control signals: a writing signal which originates in the DMA controller (301) of the sender module and linked with the BUFFER of the communication interface of the receiver module. Whenever this signal is active, data are introduced in the communication interface (305) BUFFER of the receiver module (102) . The communication channel (103) also has the signal of full up BUFFER that goes from the receiver module (102) to the sender module (102) . The channel controller (101) can simultaneously read the command word and write the control word in any module through the control channel (104) .
The communication between the modules (102) takes place in the following way: for a module (102) (future sender) to communicate with another module (102) (future receiver) , it is necessary that the sender CPU (300) writes in the communication interface a command word containing the receiver module code (102) , the level of priority and the beginning of communication. When writing a command word, it generates an interruption signal in the channel control (101) . The channel control (101) , after having recognized the interruption,acccesses the module (102) that generated that interruption, to receive the command word from it, through the control channel (104) . If, there is a free communication channel (103) , the channel controller sends a control word to both the transmitter and receiver modules (102) . When the communication interface (305) of each module (102) receives the control word, it connects the local bus to the communication channel chosen by the channel controller (101) and generates an interruption signal in the CPU (300) . The CPU (300) of each module (102) programmes its respective DMA' controller (301) . When the last CPU (300) has finished programming its DMA controller (301) , the communication starts-. When the communication is over, the sender module
(102) sends a command word to the channel controller (101) indicating the end of the communication. The channel controller (101) , then, sends a control word to both the receiver and the transmitter modules (102) that serves to disconnect the modules (102) of the communication channel
(103) .
The multiprocessing system with multi-channel communication can be implemented , depending on the type of application, in the following ways:
1) The communication is carried out among pairs of modules (102) , and each pair of modules (102) gets communicated by only one of the communication channels. The channel controller (101) , in this case, is implemented in such a way that when it receives a command word, it will only connect the transmitter module (102) to the receiver module if both are not in communication, and if there are any communication channels (103) available. If, at least, one of the already mentioned conditions is false, the channel controller (101) puts the transmitter and receiver modules on the waiting queue.
2) The communication is done between pairs of modules (102) , each module being able to communicate through more than one communication channel (103) at the same time. Two basic differences can be found between this system and the one presented above. The first one is that each module (102) has in the communication interface a BUFFER for each communication channel (103) . The other difference is that the channel controller (101) , when analysing the command word, will only verify the existence of an available communication channel (103) available. If there were any communication channel available (103) , then, the channel controller (101) will inter-link the pair of modules (102) through the channel of communication, otherwise it will put tha pair of modules on the waiting queue. The multiprocessing system with multi-channel communication ' has an expanded configuration that consists of the union of several multiprocessing systems with multi-channel communication, zero level, forming systems of higher level.
, Each channel controller has an identification code.
Figure 4 shows an example of an expanded multiprocessing system with multichannel communication only with two levels.. Level one is formed by a channel controller (501) , several multiprocessing systems with multichannel communication (302) which are inter-linked through several channels of communication (503) , interruption lines (505) and a control channel (504). Level zero is formed by .multiprocessing systems with multichannel communication (502) . Each of these level zero systems (502) is formed by a channel controller (101), several modules (103), which are inter-linked by seveeral communication channels, interruption lines (105) , a control channel (104) and an external communication interface (516) .
Each zero level system (502) shown in figure 2, belonging to that expanded multiprocessing system with multichannel communication differs from the multiprocessing system with multichannel communication shown in figure 1 in two main aspects:
1) The channel controller (101) can send a command word and receive a special command word from the level one channel controller (501) through the level one control channel (504). The sending of a command word from the zero level channel controller (101) to the level one channel controller takes place when the level zero channel controller writes a command word in the internal device that temporarily stores this command word, and in this way it generates an interruption signal in the level one channel controller (501) , through an interruption line (505) , in such a way that the level one channel controller (501) can read this command word. The special command word is identical to the command word, although the latter one is sent from a superior level channel controller to an inferior level channel controller. Each channel controller has an identification code that represents the number of each level zero system (502) .
2) An external communication interface (516) that makes the connection between the communication channels(103) of level zero and the communication channels (503) of level one, receiving a control word from the level one channel controller (501) through the control channel (504) and also receiving a control word from the level zero channel controller (101) through the channel control (104) . Each interface of external communication (516) has an identification code. The channel controller (501) of level one differs from that of level zero (101) in that it can send a special command word to the level zero channel controllers (101) through the level one control channel (504) . The level one channel controller (501) receives a command word and sends the special command word to the level zero channel controllers (101) , and sends a control word to the external communication interfaces through level one channel control (504) . In order to understand better the expanded multiprocessing systemwith multichannel communication, exemplified in figure 4, the communication between two modules (102) of different level zero systems (502) will be described. The level one components will be considered globally, while the level zero components will be considered locally. An expanded multiprocessing system with multichannel communication containing 256 modules (102) can be divided into 16 local ystems (502) , each of them (502) containing 16 modules. For a module five (102) belonging to the local system (502) zero to communicate with module (102) eight of the local system (502) ten, it is necessary that module five sends a command word to the local channel controller (101) . This command word has the receiver module code (102) and the local system code (502) to which it belongs, which in this case is the module eight code (102) of the local system ten (502) . The command word also has the communication priority and a bit that indicates the beginning of the communication. The local channel controller (101) of the local system zero (502) by analysing this command word verifies that the receiver module (102) belongs to another local system (502) . Then, it re-transmits the command word to the global channel controller (501) , writing the command word in the internal deevice, and activiting its interruption line (505) , so that the global channel controller (501) can read the command word of the aforesaid internal device. After this, it connects the module five (102) with the external communication interface (516) through any available local communication channel (103), sending a control word not only to the sender module (102) but also to the external communicaton interface (516) of the sender local system (502) .
The global channel controller (501) , after recognizing the interruption, reads the command word through the global control channel (504) . Then, it analyses the command word and sends a special command word through the global control channel (504) to the local channel controller (101) of the receiver local system (502) , i.e. the local system ten (502) . Next, it sends a control word to the external communication interfaces (516) of the local system zero (502) and of the local system ten (502) , through the control channel (504) so that these devices can be inter-linked by one of the two channels of global communication (503) . The local channel controller (101) of the local system ten (502) , when receiving the special command word, inter-links through a local channel of communication (103) , the external communication interface (516) of the receiver local system (502) with the module represented by this special command word. When all the connections are made and the two modules (102) are ready, the communication begins. At the end of the communication, the sender module (102) , module five (102) of the local system zero (502) , sends a command word to the local channel controller (101) of its local system (502) indicating the end of the communication. The local channel controller (101) , then re-transmits this command word to the global channel controller (501) and disconnects the sender module (102) from the external communication interface (516) of the sender local system (502) .
The global channel controller (501) , having received the command word, sends a special command word indicating to the local channel controller (101) of the local system ten the end of the communication. Then, it disconnects both local systems by sending a control word to the two external communication interfaces.
The channel controller (101) of the local system ten, (502) after having received the special command word, disconnects the receiver module (102) of the external communication interface (516) of its local system (5'02) .
Figure 4 shows an expanded multiprocessing system with multichannel communication with only two levels. In order to have a bigger number of modules (102) , the number of levels should be increased, that is, in the same way that a level one was formed by the union of several level zero systems, this process is repeated to form a level two system by the union of several level one systems. This process is then successively repeated to create other levels. In a system with n levels, each level zero system is identical to the one shown in figure two. The intermediate levels have the same elements that the level one, with the addition, though, of an external communicaton interface in each level. The external communication interface of each level is connected to the channel controller of the level itself and to the channel controller of the following level, through the respective control channels of each level. The external communication interfaces are inter-linked by the communication channels of the level itself and the following level. The level n, i.e. the last level, does not need an external communication interface.

Claims

WHAT I CLAIM IS: 1 - MULTIPROCESSING SYSTEM WITH WITH MULTICHANNEL COMMUNICATION constituted by a channel controller (101) , several modules (102), communication channels (103), control channel (104) and interruption line (105) ; characterized by the fact it comprises at least a level zero unity with inter-linked elements, as can be seen in figure 1; especially the channel controller is connected to each one of the modules through a channel control (104) and interruption lines (105) ; while the modules (102) are inter-linked through the communication channels (103) in such a way that , the communication from a sender module (103) to a receiver module (102) is made through the sending of a command word from the sender module to the channel controller (101) that interprets the aforesaid command word and sends a control word to the aforesaid sender and receiver module, inter-linking them through one of the available communication channels and, in, the end of the communication the sender module (102) sends a new command word to the channel controller (101) indicating the end of the communication and that the aforesaid channel controller disconnects the aforesaid sender and receiver modules by sending another control word to each of the aforesaid modules; the aforesaid multiprocessing system has two ways of inter-module communication: in one way the communication is made through pairs of modules, which in turn, communicate by only one of the communication channels (103) under the command of the channel controller (101) that receives command words and connects the sender module (102) to the receiver module if the aforesaid modules are not in communication , and there is an available communication channel (103) ; otherwise, it includes the pair of modules in the waiting queue; the other form of communication is made between pairs of modules, each of which can communicate through more than one communication channel (103) at the same time under the command of the channel controller (101) that inter-links a sender module to a receiver module only if there are any available communications channels, otherwise, it includes the two modules on the waiting queue.
2- MULTIPROCESSING SYSTEM WITH MULTICHANNEL COMMUNICATION, according to vindication 1, where the aforesaid module (102) constituted by a CPU (300) , a DMA controller (301) , a micro-programme (302), local memory (303), local bus (304) and the communication interface (305) is characterized by the connection between the local bus (304) and the communication interface and the aforesaid communication interface (305) is connected to the control channel(104) , to an interruption line (105) and to the communication channels (103) , in such a way that the sending of the command word from a module (102) to the channel controller (101) takes place when the CPU (300) of the aforesaid module writes a command word in the communication interface(305) , generating an interruption signal in the channel controller (101) through the interruption line (105) and the aforesaid channel controller (101) identifies which is the module that requires the communication and addresses the aforesaid module and the aforesaid channel controller receives the aforesaid command word through the control channel (104) ,' and a module receives a control word through the control channel (104) so that in the communication interface (305) the local bus (304) is connected to one of the communication channels (303) represented by the aforesaid control word, and also an interruption in the CPU (300) is generated to execute the micro-programme (302) .
3- MULTIPROCESSING SYSTEM WITH MULTICHANNEL COMMUNICATION, is according to vindication 1, characterized by the level one system shown in figure 4, constituted by several level zero systems (502) described in the vindication l, with the inclusion of the external communication interface (516) connected to the communication channels (103) , to the control channel (104) and to the aforesaid external communication channels (103) , to the control channel (104) and to the aforesaid external communication interface (516) being connected with other level zero systems (502) through communication channels (503) , being connected with the channel controller (501) through the control channel (504) and the aforesaid channel controller (501) that is connected to the channel controller (101) of each of the zero level systems (502) through the control channel (504) and separately through an interruption line (505) , so that the senderr module (102) of a sender level zero system gets communicated with another receiver module (102) of a different receiver level zero system if the sender module (102) sends a command word to the channel controller (101) of its level zero system (502) , and the aforesaid command word has the receiver module code and the receiver level zero system code (502) and a signal indicating the beginning of communication, and the aforesaid channel controller (101) when receiving the command word interprets the aforesaid command word and verifies that the receiver module does not belong to its sender level zero system (502) and re-transmits the aforesaid command word to the level one channel controller (501) and inter-links the sender module with external communication interface (516) of the same transmitter level zero system (502) , then, the channel controller (501) when receiving the aforesaid command word, sends a special command word to the receiver level zero system (502) channel controller (502) and connects the external communication interface (516) of the sender level zero system (502) with the external communication interface (516) of the receiver level zero system (502) , through a communication channel (503) , then, the channel controller (101) of the receiver level zero system, when receiving the special command word, connects the receiver module (102) , contained in the aforesaid special command word with the external communication interface (516) of the receiver level zero system (502) r likewise the expanded multiprocessing system with multichannel communication makes it possible to disconnect the sender and receiver modules (102) , at the end of the communication, through sending a new command word through the sender module to the channel controller (101) of ■ the sender level zero system (502) in such a way that the command sequence is similar to the command sequence described above to connect the modules, and the aforesaid new command word has a bit indicating the end of the communication. 4 - MULTIPROCESSING SYSTEM WITH MULTICHANNEL COMMUNICATION, according to vindications 1, 2 and 3 characterized by the configuration of expanded systems of level two, three, four and so on, the "level two" system has a similar configuration to the "level one" system shown in figure 4 where each module (502) is a "level one" system; similarly the expanded system "level three" has a similar configuration to the "level one" or "level two" configurations where each module (502) is a "level two" system and so on.
PCT/BR1993/000015 1992-04-24 1993-04-23 Multiprocessing system with multiple-channel communication WO1993022727A1 (en)

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EP0060535A2 (en) * 1981-03-12 1982-09-22 Recognition Equipment Incorporated Multiprocessor network
EP0104638A2 (en) * 1982-09-27 1984-04-04 Siemens Nixdorf Informationssysteme Aktiengesellschaft Method for the initiation of the connection of one of several data processing units to a central clock-controlled multiple line system
US4494192A (en) * 1982-07-21 1985-01-15 Sperry Corporation High speed bus architecture
EP0444711A2 (en) * 1990-03-02 1991-09-04 Fujitsu Limited Bus control system in a multi-processor system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0060535A2 (en) * 1981-03-12 1982-09-22 Recognition Equipment Incorporated Multiprocessor network
US4494192A (en) * 1982-07-21 1985-01-15 Sperry Corporation High speed bus architecture
EP0104638A2 (en) * 1982-09-27 1984-04-04 Siemens Nixdorf Informationssysteme Aktiengesellschaft Method for the initiation of the connection of one of several data processing units to a central clock-controlled multiple line system
EP0444711A2 (en) * 1990-03-02 1991-09-04 Fujitsu Limited Bus control system in a multi-processor system

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Title
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PATENT ABSTRACTS OF JAPAN vol. 10, no. 53 (P-433)4 March 1986 *

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