US7572572B2 - Methods for forming arrays of small, closely spaced features - Google Patents
Methods for forming arrays of small, closely spaced features Download PDFInfo
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- US7572572B2 US7572572B2 US11/217,270 US21727005A US7572572B2 US 7572572 B2 US7572572 B2 US 7572572B2 US 21727005 A US21727005 A US 21727005A US 7572572 B2 US7572572 B2 US 7572572B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Patterning of the switching material
- H10N70/068—Patterning of the switching material by processes specially adapted for achieving sub-lithographic dimensions, e.g. using spacers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
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- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
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- H10N70/061—Patterning of the switching material
- H10N70/066—Patterning of the switching material by filling of openings, e.g. damascene method
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
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- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
- H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
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- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
- H10N70/8265—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices on sidewalls of dielectric structures, e.g. mesa or cup type devices
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- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
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- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/884—Other compounds of groups 13-15, e.g. elemental or compound semiconductors
- H10N70/8845—Carbon or carbides
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
- H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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Abstract
Description
Claims (26)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/217,270 US7572572B2 (en) | 2005-09-01 | 2005-09-01 | Methods for forming arrays of small, closely spaced features |
US12/498,951 US8266558B2 (en) | 2005-09-01 | 2009-07-07 | Methods for forming arrays of small, closely spaced features |
US13/548,077 US8601410B2 (en) | 2005-09-01 | 2012-07-12 | Methods for forming arrays of small, closely spaced features |
US14/094,482 US9082829B2 (en) | 2005-09-01 | 2013-12-02 | Methods for forming arrays of small, closely spaced features |
US14/754,172 US10396281B2 (en) | 2005-09-01 | 2015-06-29 | Methods for forming arrays of small, closely spaced features |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/217,270 US7572572B2 (en) | 2005-09-01 | 2005-09-01 | Methods for forming arrays of small, closely spaced features |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/498,951 Division US8266558B2 (en) | 2005-09-01 | 2009-07-07 | Methods for forming arrays of small, closely spaced features |
Publications (2)
Publication Number | Publication Date |
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US20070048674A1 US20070048674A1 (en) | 2007-03-01 |
US7572572B2 true US7572572B2 (en) | 2009-08-11 |
Family
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Application Number | Title | Priority Date | Filing Date |
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US11/217,270 Active 2028-05-03 US7572572B2 (en) | 2005-09-01 | 2005-09-01 | Methods for forming arrays of small, closely spaced features |
US12/498,951 Active 2027-01-16 US8266558B2 (en) | 2005-09-01 | 2009-07-07 | Methods for forming arrays of small, closely spaced features |
US13/548,077 Active US8601410B2 (en) | 2005-09-01 | 2012-07-12 | Methods for forming arrays of small, closely spaced features |
US14/094,482 Active US9082829B2 (en) | 2005-09-01 | 2013-12-02 | Methods for forming arrays of small, closely spaced features |
US14/754,172 Active US10396281B2 (en) | 2005-09-01 | 2015-06-29 | Methods for forming arrays of small, closely spaced features |
Family Applications After (4)
Application Number | Title | Priority Date | Filing Date |
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US12/498,951 Active 2027-01-16 US8266558B2 (en) | 2005-09-01 | 2009-07-07 | Methods for forming arrays of small, closely spaced features |
US13/548,077 Active US8601410B2 (en) | 2005-09-01 | 2012-07-12 | Methods for forming arrays of small, closely spaced features |
US14/094,482 Active US9082829B2 (en) | 2005-09-01 | 2013-12-02 | Methods for forming arrays of small, closely spaced features |
US14/754,172 Active US10396281B2 (en) | 2005-09-01 | 2015-06-29 | Methods for forming arrays of small, closely spaced features |
Country Status (1)
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US (5) | US7572572B2 (en) |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
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US20070215960A1 (en) * | 2004-03-19 | 2007-09-20 | The Regents Of The University Of California | Methods for Fabrication of Positional and Compositionally Controlled Nanostructures on Substrate |
US20080187463A1 (en) * | 2007-02-07 | 2008-08-07 | Wells David H | Electromagnetic radiation interaction components, fluorimetry systems, semiconductor constructions, and electromagnetic radiation emitter and conduit construction |
US20080220600A1 (en) * | 2007-03-05 | 2008-09-11 | Micron Technology, Inc. | Semiconductor constructions, methods of forming multiple lines, and methods of forming high density structures and low density structures with a single photomask |
US20090176374A1 (en) * | 2007-12-28 | 2009-07-09 | Tokyo Electron Limited | Pattern forming method, semiconductor device manufacturing apparatus and storage medium |
US20090236666A1 (en) * | 2006-08-18 | 2009-09-24 | Micron Technology, Inc. | Integrated Circuitry |
US20100028801A1 (en) * | 2008-08-01 | 2010-02-04 | International Businesss Machines Corporation | Lithography for pitch reduction |
US20100048024A1 (en) * | 2008-08-25 | 2010-02-25 | Elpida Memory, Inc. | Manufacturing method of semiconductor device |
US20100078823A1 (en) * | 2008-09-30 | 2010-04-01 | Sven Beyer | Contacts and vias of a semiconductor device formed by a hard mask and double exposure |
US20100159638A1 (en) * | 2008-12-24 | 2010-06-24 | Samsung Electronics Co., Ltd. | Method of fabricating nonvolatile memory device |
US8158476B2 (en) | 2005-03-28 | 2012-04-17 | Micron Technology, Inc. | Integrated circuit fabrication |
US8283198B2 (en) | 2010-05-10 | 2012-10-09 | Micron Technology, Inc. | Resistive memory and methods of processing resistive memory |
US20130052807A1 (en) * | 2009-04-30 | 2013-02-28 | Byd Company Limited | Epitaxial Wafer and Manufacturing Method Thereof |
US8592898B2 (en) | 2006-03-02 | 2013-11-26 | Micron Technology, Inc. | Vertical gated access transistor |
US8647981B1 (en) | 2012-08-31 | 2014-02-11 | Micron Technology, Inc. | Methods of forming patterns, and methods of forming integrated circuitry |
US8966409B2 (en) * | 2012-12-20 | 2015-02-24 | Micron Technology, Inc. | Methods of forming a mask and methods of correcting intra-field variation across a mask design used in photolithographic processing |
US20150108619A1 (en) * | 2013-10-21 | 2015-04-23 | Applied Materials, Inc. | Method for patterning a semiconductor substrate |
US20150325791A1 (en) * | 2005-09-01 | 2015-11-12 | Micron Technology, Inc. | Methods for forming arrays of small, closely spaced features |
US9449822B2 (en) | 2010-07-29 | 2016-09-20 | GlobalFoundries, Inc. | Method of forming semiconductor structures with contact holes |
US20190019676A1 (en) * | 2017-07-15 | 2019-01-17 | Micromaterials Llc | Mask Scheme For Cut Pattern Flow With Enlarged EPE Window |
US10211051B2 (en) | 2015-11-13 | 2019-02-19 | Canon Kabushiki Kaisha | Method of reverse tone patterning |
US10312090B2 (en) | 2017-07-28 | 2019-06-04 | United Microelectronics Corp. | Patterning method |
US10366889B2 (en) | 2017-06-27 | 2019-07-30 | United Microelectronics Corp. | Method of forming semiconductor device |
US10515801B2 (en) | 2007-06-04 | 2019-12-24 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
Families Citing this family (124)
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US7151040B2 (en) * | 2004-08-31 | 2006-12-19 | Micron Technology, Inc. | Methods for increasing photo alignment margins |
US7910288B2 (en) * | 2004-09-01 | 2011-03-22 | Micron Technology, Inc. | Mask material conversion |
US7655387B2 (en) * | 2004-09-02 | 2010-02-02 | Micron Technology, Inc. | Method to align mask patterns |
US7115525B2 (en) * | 2004-09-02 | 2006-10-03 | Micron Technology, Inc. | Method for integrated circuit fabrication using pitch multiplication |
US7253118B2 (en) * | 2005-03-15 | 2007-08-07 | Micron Technology, Inc. | Pitch reduced patterns relative to photolithography features |
US7390746B2 (en) * | 2005-03-15 | 2008-06-24 | Micron Technology, Inc. | Multiple deposition for integration of spacers in pitch multiplication process |
US7429536B2 (en) | 2005-05-23 | 2008-09-30 | Micron Technology, Inc. | Methods for forming arrays of small, closely spaced features |
US7560390B2 (en) * | 2005-06-02 | 2009-07-14 | Micron Technology, Inc. | Multiple spacer steps for pitch multiplication |
US7396781B2 (en) * | 2005-06-09 | 2008-07-08 | Micron Technology, Inc. | Method and apparatus for adjusting feature size and position |
US7629259B2 (en) * | 2005-06-21 | 2009-12-08 | Lam Research Corporation | Method of aligning a reticle for formation of semiconductor devices |
US7888721B2 (en) * | 2005-07-06 | 2011-02-15 | Micron Technology, Inc. | Surround gate access transistors with grown ultra-thin bodies |
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Also Published As
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US8601410B2 (en) | 2013-12-03 |
US20090271758A1 (en) | 2009-10-29 |
US20140087554A1 (en) | 2014-03-27 |
US20070048674A1 (en) | 2007-03-01 |
US10396281B2 (en) | 2019-08-27 |
US9082829B2 (en) | 2015-07-14 |
US8266558B2 (en) | 2012-09-11 |
US20150325791A1 (en) | 2015-11-12 |
US20120273131A1 (en) | 2012-11-01 |
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