US5903058A - Conductive bumps on die for flip chip application - Google Patents
Conductive bumps on die for flip chip application Download PDFInfo
- Publication number
- US5903058A US5903058A US08/841,524 US84152497A US5903058A US 5903058 A US5903058 A US 5903058A US 84152497 A US84152497 A US 84152497A US 5903058 A US5903058 A US 5903058A
- Authority
- US
- United States
- Prior art keywords
- passivation layer
- under bump
- bump metallization
- etching
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/03452—Chemical vapour deposition [CVD], e.g. laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/03602—Mechanical treatment, e.g. polishing, grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
- H01L2224/05572—Disposition the external layer being disposed in a recess of the surface the external layer extending out of an opening
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
- H01L2224/1148—Permanent masks, i.e. masks left in the finished device, e.g. passivation layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13006—Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01072—Hafnium [Hf]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/959—Mechanical polishing of wafer
Abstract
Description
Claims (39)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/841,524 US5903058A (en) | 1996-07-17 | 1997-04-23 | Conductive bumps on die for flip chip application |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/682,141 US5736456A (en) | 1996-03-07 | 1996-07-17 | Method of forming conductive bumps on die for flip chip applications |
US08/841,524 US5903058A (en) | 1996-07-17 | 1997-04-23 | Conductive bumps on die for flip chip application |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/682,141 Division US5736456A (en) | 1996-03-07 | 1996-07-17 | Method of forming conductive bumps on die for flip chip applications |
Publications (1)
Publication Number | Publication Date |
---|---|
US5903058A true US5903058A (en) | 1999-05-11 |
Family
ID=24738400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/841,524 Expired - Lifetime US5903058A (en) | 1996-07-17 | 1997-04-23 | Conductive bumps on die for flip chip application |
Country Status (1)
Country | Link |
---|---|
US (1) | US5903058A (en) |
Cited By (74)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6008543A (en) * | 1995-03-09 | 1999-12-28 | Sony Corporation | Conductive bumps on pads for flip chip application |
US6085968A (en) * | 1999-01-22 | 2000-07-11 | Hewlett-Packard Company | Solder retention ring for improved solder bump formation |
US6095397A (en) * | 1995-09-08 | 2000-08-01 | Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. | Solder deposit support |
US6107122A (en) * | 1997-08-04 | 2000-08-22 | Micron Technology, Inc. | Direct die contact (DDC) semiconductor package |
US6111317A (en) * | 1996-01-18 | 2000-08-29 | Kabushiki Kaisha Toshiba | Flip-chip connection type semiconductor integrated circuit device |
US6114763A (en) * | 1997-05-30 | 2000-09-05 | Tessera, Inc. | Semiconductor package with translator for connection to an external substrate |
US6129613A (en) * | 1998-01-30 | 2000-10-10 | Philips Electronics North America Corp. | Semiconductor manufacturing apparatus and method for measuring in-situ pressure across a wafer |
US6146984A (en) * | 1999-10-08 | 2000-11-14 | Agilent Technologies Inc. | Method and structure for uniform height solder bumps on a semiconductor wafer |
US6258705B1 (en) | 2000-08-21 | 2001-07-10 | Siliconeware Precision Industries Co., Ltd. | Method of forming circuit probing contact points on fine pitch peripheral bond pads on flip chip |
US6300250B1 (en) * | 1999-08-09 | 2001-10-09 | Taiwan Semiconductor Manufacturing Company | Method of forming bumps for flip chip applications |
US6306748B1 (en) * | 1998-09-04 | 2001-10-23 | Advanced Micro Devices, Inc. | Bump scrub after plating |
US6348730B1 (en) | 1999-12-16 | 2002-02-19 | Samsung Electronics Co., Ltd. | Semiconductor device and fabricating method therefor |
US6353266B1 (en) * | 1999-05-19 | 2002-03-05 | Nec Corporation | Semiconductor device having improved pad coupled to wiring on semiconductor substrate |
US6372624B1 (en) * | 1997-08-04 | 2002-04-16 | Micron Technology, Inc. | Method for fabricating solder bumps by wave soldering |
US6415974B2 (en) * | 2000-08-01 | 2002-07-09 | Siliconware Precision Industries Co., Ltd. | Structure of solder bumps with improved coplanarity and method of forming solder bumps with improved coplanarity |
US6452270B1 (en) * | 2000-10-13 | 2002-09-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor device having bump electrode |
US6468892B1 (en) * | 2000-07-14 | 2002-10-22 | National Semiconductor Corporation | Front side coating for bump devices |
US6489180B1 (en) | 2000-09-28 | 2002-12-03 | Siliconware Precision Industries Co., Ltd. | Flip-chip packaging process utilizing no-flow underfill technique |
US20020195702A1 (en) * | 2001-06-20 | 2002-12-26 | Salman Akram | Method and apparatus for conducting heat in a flip-chip assembly |
US6512298B2 (en) * | 2000-11-29 | 2003-01-28 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same |
US20030022477A1 (en) * | 2001-07-27 | 2003-01-30 | Han-Kun Hsieh | Formation of electroplate solder on an organic circuit board for flip chip joints and board to board solder joints |
US20030025203A1 (en) * | 1999-09-02 | 2003-02-06 | Salman Akram | Under bump metallization pad and solder bump connections |
WO2003019657A2 (en) * | 2001-08-29 | 2003-03-06 | Koninklijke Philips Electronics N.V. | Integrated circuit device with bump bridges and method for making the same |
US6538323B1 (en) * | 1998-11-30 | 2003-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device having an electrode structure comprising a conductive fine particle film |
US6545355B2 (en) * | 1998-05-22 | 2003-04-08 | Sony Corporation | Semiconductor device and method of fabricating the same |
US6555912B1 (en) * | 2001-10-23 | 2003-04-29 | International Business Machines Corporation | Corrosion-resistant electrode structure for integrated circuit decoupling capacitors |
US6586323B1 (en) * | 2000-09-18 | 2003-07-01 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
US20030127748A1 (en) * | 2002-01-09 | 2003-07-10 | Jen-Kuang Fang | Semiconductor package |
US6602775B1 (en) | 2001-08-16 | 2003-08-05 | Taiwan Semiconductor Manufacturing Company | Method to improve reliability for flip-chip device for limiting pad design |
US6605524B1 (en) | 2001-09-10 | 2003-08-12 | Taiwan Semiconductor Manufacturing Company | Bumping process to increase bump height and to create a more robust bump structure |
US20030157790A1 (en) * | 2002-02-21 | 2003-08-21 | Ho-Ming Tong | Method of forming bump |
US6610591B1 (en) | 2000-08-25 | 2003-08-26 | Micron Technology, Inc. | Methods of ball grid array |
US20030186485A1 (en) * | 2000-04-10 | 2003-10-02 | Farrar Paul A. | Micro C-4 semiconductor die and method for depositing connection sites thereon |
US20030203172A1 (en) * | 2002-01-09 | 2003-10-30 | Nishant Sinha | Constructions comprising solder bumps |
US20030227079A1 (en) * | 2002-06-11 | 2003-12-11 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US6664637B2 (en) * | 1999-05-10 | 2003-12-16 | International Business Machines Corporation | Flip chip C4 extension structure and process |
US6667230B2 (en) * | 2001-07-12 | 2003-12-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Passivation and planarization process for flip chip packages |
US6692629B1 (en) * | 2000-09-07 | 2004-02-17 | Siliconware Precision Industries Co., Ltd. | Flip-chip bumbing method for fabricating solder bumps on semiconductor wafer |
US6710454B1 (en) | 2000-02-16 | 2004-03-23 | Micron Technology, Inc. | Adhesive layer for an electronic apparatus having multiple semiconductor devices |
US6720195B2 (en) | 2002-05-15 | 2004-04-13 | Micron Technology, Inc. | Methods employing elevated temperatures to enhance quality control in microelectronic component manufacture |
US6740427B2 (en) | 2001-09-21 | 2004-05-25 | Intel Corporation | Thermo-mechanically robust C4 ball-limiting metallurgy to prevent failure due to die-package interaction and method of making same |
US6743707B2 (en) * | 2001-12-31 | 2004-06-01 | Advanced Semiconductor Engineering, Inc. | Bump fabrication process |
US20040159947A1 (en) * | 2001-09-21 | 2004-08-19 | Madhav Datta | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US20040173895A1 (en) * | 1999-02-08 | 2004-09-09 | Shinji Ohuchi | Semiconductor device and manufacturing method thereof |
US6806578B2 (en) | 2000-03-16 | 2004-10-19 | International Business Machines Corporation | Copper pad structure |
US20050026335A1 (en) * | 2003-07-31 | 2005-02-03 | Fujitsu Limited | Method of fabricating semiconductor device and semiconductor device |
US20050151269A1 (en) * | 2003-12-18 | 2005-07-14 | Samsung Electronics Co., Ltd. | UBM for fine pitch solder balland flip-chip packaging method using the same |
US20050158980A1 (en) * | 2000-06-28 | 2005-07-21 | Krishna Seshan | Method of forming segmented ball limiting metallurgy |
US20060006544A1 (en) * | 1998-08-14 | 2006-01-12 | Farrar Paul A | Method of forming a micro solder ball for use in C4 bonding process |
US20060017160A1 (en) * | 2004-07-23 | 2006-01-26 | Advanced Semiconductor Engineering Inc. | Structure and formation method of conductive bumps |
US20060068595A1 (en) * | 2004-09-30 | 2006-03-30 | Frank Seliger | Semiconductor substrate thinning method for manufacturing thinned die |
US20060097911A1 (en) * | 2002-07-03 | 2006-05-11 | Quelis Id Systems Inc. | Wire positioning and mechanical attachment for a radio-frequency indentification device |
US20060205225A1 (en) * | 2004-09-06 | 2006-09-14 | Tdk Corporation | Electronic device and method of making same |
US20060278999A1 (en) * | 2003-09-29 | 2006-12-14 | Phoenix Precision Technology Corporation | Substrate for Pre-Soldering Material and Fabrication Method Thereof |
US20070045388A1 (en) * | 2005-08-31 | 2007-03-01 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US20070207608A1 (en) * | 2006-03-01 | 2007-09-06 | Jiun-Heng Wang | Semiconductor device and manufacturing process thereof |
US20070228561A1 (en) * | 2006-03-31 | 2007-10-04 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
US20070298601A1 (en) * | 2006-06-22 | 2007-12-27 | Booth Roger A | Method and System for Controlled Plating of Vias |
US20080048320A1 (en) * | 2001-03-05 | 2008-02-28 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20090200675A1 (en) * | 2008-02-11 | 2009-08-13 | Thomas Goebel | Passivated Copper Chip Pads |
US20090321962A1 (en) * | 2008-06-30 | 2009-12-31 | Daewoong Suh | Microelectronic package with self-heating interconnect |
DE10023834B4 (en) * | 1999-05-17 | 2012-04-26 | Denso Corporation | Method for layer formation and structuring |
US8169081B1 (en) | 2007-12-27 | 2012-05-01 | Volterra Semiconductor Corporation | Conductive routings in integrated circuits using under bump metallization |
US20120126405A1 (en) * | 2008-02-15 | 2012-05-24 | International Business Machines Corporation | Solder interconnect pads with current spreading layers |
TWI415197B (en) * | 2007-02-12 | 2013-11-11 | Ibm | Undercut-free blm process for pb-free and pb-reduced c4 |
US8610279B2 (en) | 2006-08-28 | 2013-12-17 | Micron Technologies, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
US20140117535A1 (en) * | 2012-10-31 | 2014-05-01 | International Business Machines Corporation | Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
US9741918B2 (en) | 2013-10-07 | 2017-08-22 | Hypres, Inc. | Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit |
US20180323162A1 (en) * | 2016-04-01 | 2018-11-08 | Intel Corporation | Surface finishes for high density interconnect architectures |
US10420211B2 (en) * | 2017-08-09 | 2019-09-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device |
US20220163707A1 (en) * | 2020-11-20 | 2022-05-26 | Applied Materials, Inc. | Structure and method of mirror grounding in lcos devices |
US20230005979A1 (en) * | 2014-04-23 | 2023-01-05 | Sony Group Corporation | Semiconductor device and method of manufacturing thereof |
US11881539B2 (en) | 2020-11-20 | 2024-01-23 | Applied Materials, Inc. | Structure and method of advanced LCoS back-plane having highly reflective pixel via metallization |
US11908678B2 (en) | 2021-01-14 | 2024-02-20 | Applied Materials, Inc. | Method of CMP integration for improved optical uniformity in advanced LCOS back-plane |
Citations (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3648131A (en) * | 1969-11-07 | 1972-03-07 | Ibm | Hourglass-shaped conductive connection through semiconductor structures |
US4060828A (en) * | 1975-08-22 | 1977-11-29 | Hitachi, Ltd. | Semiconductor device having multi-layer wiring structure with additional through-hole interconnection |
US4360142A (en) * | 1979-06-29 | 1982-11-23 | International Business Machines Corporation | Method of forming a solder interconnection capable of sustained high power levels between a semiconductor device and a supporting substrate |
JPS6378555A (en) * | 1986-09-20 | 1988-04-08 | Fujitsu Ltd | Asemiconductor device |
US4754316A (en) * | 1982-06-03 | 1988-06-28 | Texas Instruments Incorporated | Solid state interconnection system for three dimensional integrated circuit structures |
US4906341A (en) * | 1987-09-24 | 1990-03-06 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device and apparatus therefor |
JPH0267729A (en) * | 1988-09-01 | 1990-03-07 | Seiko Epson Corp | Semiconductor device |
US5049972A (en) * | 1988-01-29 | 1991-09-17 | Hitachi, Ltd. | Method of manufacturing semiconductor integrated circuit device |
US5059553A (en) * | 1991-01-14 | 1991-10-22 | Ibm Corporation | Metal bump for a thermal compression bond and method for making same |
JPH03250628A (en) * | 1990-02-28 | 1991-11-08 | Hitachi Ltd | Semiconductor device |
US5095402A (en) * | 1990-10-02 | 1992-03-10 | Rogers Corporation | Internally decoupled integrated circuit package |
US5136363A (en) * | 1987-10-21 | 1992-08-04 | Kabushiki Kaisha Toshiba | Semiconductor device with bump electrode |
US5137845A (en) * | 1990-07-31 | 1992-08-11 | International Business Machines Corporation | Method of forming metal contact pads and terminals on semiconductor chips |
US5217922A (en) * | 1991-01-31 | 1993-06-08 | Hitachi, Ltd. | Method for forming a silicide layer and barrier layer on a semiconductor device rear surface |
US5229645A (en) * | 1990-06-21 | 1993-07-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and manufacturing method thereof |
US5268072A (en) * | 1992-08-31 | 1993-12-07 | International Business Machines Corporation | Etching processes for avoiding edge stress in semiconductor chip solder bumps |
US5293006A (en) * | 1991-09-13 | 1994-03-08 | Mcnc | Solder bump including circular lip |
JPH06151355A (en) * | 1992-10-30 | 1994-05-31 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
US5317193A (en) * | 1992-05-07 | 1994-05-31 | Mitsubishi Denki Kabushiki Kaisha | Contact via for semiconductor device |
US5319246A (en) * | 1989-11-30 | 1994-06-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having multi-layer film structure |
US5376584A (en) * | 1992-12-31 | 1994-12-27 | International Business Machines Corporation | Process of making pad structure for solder ball limiting metallurgy having reduced edge stress |
US5381946A (en) * | 1992-03-04 | 1995-01-17 | Mcnc | Method of forming differing volume solder bumps |
US5394013A (en) * | 1990-11-28 | 1995-02-28 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device with an elevated bonding pad |
US5424245A (en) * | 1994-01-04 | 1995-06-13 | Motorola, Inc. | Method of forming vias through two-sided substrate |
US5449314A (en) * | 1994-04-25 | 1995-09-12 | Micron Technology, Inc. | Method of chimical mechanical polishing for dielectric layers |
US5470787A (en) * | 1994-05-02 | 1995-11-28 | Motorola, Inc. | Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same |
US5471092A (en) * | 1992-09-15 | 1995-11-28 | International Business Machines Corporation | Metallurgical joint including a stress release layer |
US5480835A (en) * | 1993-05-06 | 1996-01-02 | Motorola, Inc. | Electrical interconnect and method for forming the same |
US5503286A (en) * | 1994-06-28 | 1996-04-02 | International Business Machines Corporation | Electroplated solder terminal |
US5625232A (en) * | 1994-07-15 | 1997-04-29 | Texas Instruments Incorporated | Reliability of metal leads in high speed LSI semiconductors using dummy vias |
US5677573A (en) * | 1995-10-16 | 1997-10-14 | Micron Technology, Inc. | Field effect transistor |
US5731610A (en) * | 1995-03-07 | 1998-03-24 | Micron Technology, Inc. | Semiconductor device having improved contacts to a thin conductive layer |
US5739579A (en) * | 1992-06-29 | 1998-04-14 | Intel Corporation | Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections |
-
1997
- 1997-04-23 US US08/841,524 patent/US5903058A/en not_active Expired - Lifetime
Patent Citations (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3648131A (en) * | 1969-11-07 | 1972-03-07 | Ibm | Hourglass-shaped conductive connection through semiconductor structures |
US4060828A (en) * | 1975-08-22 | 1977-11-29 | Hitachi, Ltd. | Semiconductor device having multi-layer wiring structure with additional through-hole interconnection |
US4360142A (en) * | 1979-06-29 | 1982-11-23 | International Business Machines Corporation | Method of forming a solder interconnection capable of sustained high power levels between a semiconductor device and a supporting substrate |
US4754316A (en) * | 1982-06-03 | 1988-06-28 | Texas Instruments Incorporated | Solid state interconnection system for three dimensional integrated circuit structures |
JPS6378555A (en) * | 1986-09-20 | 1988-04-08 | Fujitsu Ltd | Asemiconductor device |
US4906341A (en) * | 1987-09-24 | 1990-03-06 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device and apparatus therefor |
US5136363A (en) * | 1987-10-21 | 1992-08-04 | Kabushiki Kaisha Toshiba | Semiconductor device with bump electrode |
US5049972A (en) * | 1988-01-29 | 1991-09-17 | Hitachi, Ltd. | Method of manufacturing semiconductor integrated circuit device |
JPH0267729A (en) * | 1988-09-01 | 1990-03-07 | Seiko Epson Corp | Semiconductor device |
US5319246A (en) * | 1989-11-30 | 1994-06-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having multi-layer film structure |
JPH03250628A (en) * | 1990-02-28 | 1991-11-08 | Hitachi Ltd | Semiconductor device |
US5229645A (en) * | 1990-06-21 | 1993-07-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and manufacturing method thereof |
US5137845A (en) * | 1990-07-31 | 1992-08-11 | International Business Machines Corporation | Method of forming metal contact pads and terminals on semiconductor chips |
US5095402A (en) * | 1990-10-02 | 1992-03-10 | Rogers Corporation | Internally decoupled integrated circuit package |
US5394013A (en) * | 1990-11-28 | 1995-02-28 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device with an elevated bonding pad |
US5059553A (en) * | 1991-01-14 | 1991-10-22 | Ibm Corporation | Metal bump for a thermal compression bond and method for making same |
US5217922A (en) * | 1991-01-31 | 1993-06-08 | Hitachi, Ltd. | Method for forming a silicide layer and barrier layer on a semiconductor device rear surface |
US5293006A (en) * | 1991-09-13 | 1994-03-08 | Mcnc | Solder bump including circular lip |
US5381946A (en) * | 1992-03-04 | 1995-01-17 | Mcnc | Method of forming differing volume solder bumps |
US5317193A (en) * | 1992-05-07 | 1994-05-31 | Mitsubishi Denki Kabushiki Kaisha | Contact via for semiconductor device |
US5739579A (en) * | 1992-06-29 | 1998-04-14 | Intel Corporation | Method for forming interconnections for semiconductor fabrication and semiconductor device having such interconnections |
US5268072A (en) * | 1992-08-31 | 1993-12-07 | International Business Machines Corporation | Etching processes for avoiding edge stress in semiconductor chip solder bumps |
US5471092A (en) * | 1992-09-15 | 1995-11-28 | International Business Machines Corporation | Metallurgical joint including a stress release layer |
JPH06151355A (en) * | 1992-10-30 | 1994-05-31 | Mitsubishi Electric Corp | Semiconductor device and manufacture thereof |
US5376584A (en) * | 1992-12-31 | 1994-12-27 | International Business Machines Corporation | Process of making pad structure for solder ball limiting metallurgy having reduced edge stress |
US5480835A (en) * | 1993-05-06 | 1996-01-02 | Motorola, Inc. | Electrical interconnect and method for forming the same |
US5424245A (en) * | 1994-01-04 | 1995-06-13 | Motorola, Inc. | Method of forming vias through two-sided substrate |
US5449314A (en) * | 1994-04-25 | 1995-09-12 | Micron Technology, Inc. | Method of chimical mechanical polishing for dielectric layers |
US5470787A (en) * | 1994-05-02 | 1995-11-28 | Motorola, Inc. | Semiconductor device solder bump having intrinsic potential for forming an extended eutectic region and method for making and using the same |
US5503286A (en) * | 1994-06-28 | 1996-04-02 | International Business Machines Corporation | Electroplated solder terminal |
US5625232A (en) * | 1994-07-15 | 1997-04-29 | Texas Instruments Incorporated | Reliability of metal leads in high speed LSI semiconductors using dummy vias |
US5731610A (en) * | 1995-03-07 | 1998-03-24 | Micron Technology, Inc. | Semiconductor device having improved contacts to a thin conductive layer |
US5677573A (en) * | 1995-10-16 | 1997-10-14 | Micron Technology, Inc. | Field effect transistor |
Cited By (173)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6008543A (en) * | 1995-03-09 | 1999-12-28 | Sony Corporation | Conductive bumps on pads for flip chip application |
US6095397A (en) * | 1995-09-08 | 2000-08-01 | Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. | Solder deposit support |
US6111317A (en) * | 1996-01-18 | 2000-08-29 | Kabushiki Kaisha Toshiba | Flip-chip connection type semiconductor integrated circuit device |
US6114763A (en) * | 1997-05-30 | 2000-09-05 | Tessera, Inc. | Semiconductor package with translator for connection to an external substrate |
US6107122A (en) * | 1997-08-04 | 2000-08-22 | Micron Technology, Inc. | Direct die contact (DDC) semiconductor package |
US6637638B1 (en) | 1997-08-04 | 2003-10-28 | Micron Technology, Inc. | System for fabricating solder bumps on semiconductor components |
US6372624B1 (en) * | 1997-08-04 | 2002-04-16 | Micron Technology, Inc. | Method for fabricating solder bumps by wave soldering |
US6129613A (en) * | 1998-01-30 | 2000-10-10 | Philips Electronics North America Corp. | Semiconductor manufacturing apparatus and method for measuring in-situ pressure across a wafer |
USRE46147E1 (en) * | 1998-05-22 | 2016-09-13 | Sony Corporation | Semiconductor device and method of fabricating the same |
US6545355B2 (en) * | 1998-05-22 | 2003-04-08 | Sony Corporation | Semiconductor device and method of fabricating the same |
US20060006544A1 (en) * | 1998-08-14 | 2006-01-12 | Farrar Paul A | Method of forming a micro solder ball for use in C4 bonding process |
US6998711B1 (en) * | 1998-08-14 | 2006-02-14 | Micron Technology, Inc. | Method of forming a micro solder ball for use in C4 bonding process |
US6306748B1 (en) * | 1998-09-04 | 2001-10-23 | Advanced Micro Devices, Inc. | Bump scrub after plating |
US20030122252A1 (en) * | 1998-11-30 | 2003-07-03 | Kabushiki Kaisha Toshiba | Fine particle film forming apparatus and method and semiconductor device and manufacturing method for the same |
US20050124164A1 (en) * | 1998-11-30 | 2005-06-09 | Kabushiki Kaisha Toshiba | Fine particle film forming apparatus and method and semiconductor device and manufacturing method for the same |
US6538323B1 (en) * | 1998-11-30 | 2003-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device having an electrode structure comprising a conductive fine particle film |
US6933216B2 (en) | 1998-11-30 | 2005-08-23 | Kabushiki Kaisha Toshiba | Fine particle film forming apparatus and method and semiconductor device and manufacturing method for the same |
US6085968A (en) * | 1999-01-22 | 2000-07-11 | Hewlett-Packard Company | Solder retention ring for improved solder bump formation |
US20040173895A1 (en) * | 1999-02-08 | 2004-09-09 | Shinji Ohuchi | Semiconductor device and manufacturing method thereof |
US6664637B2 (en) * | 1999-05-10 | 2003-12-16 | International Business Machines Corporation | Flip chip C4 extension structure and process |
DE10023834B4 (en) * | 1999-05-17 | 2012-04-26 | Denso Corporation | Method for layer formation and structuring |
US6353266B1 (en) * | 1999-05-19 | 2002-03-05 | Nec Corporation | Semiconductor device having improved pad coupled to wiring on semiconductor substrate |
US6300250B1 (en) * | 1999-08-09 | 2001-10-09 | Taiwan Semiconductor Manufacturing Company | Method of forming bumps for flip chip applications |
US20030067073A1 (en) * | 1999-09-02 | 2003-04-10 | Salman Akram | Under bump metallization pad and solder bump connections |
US20030025203A1 (en) * | 1999-09-02 | 2003-02-06 | Salman Akram | Under bump metallization pad and solder bump connections |
US7205221B2 (en) * | 1999-09-02 | 2007-04-17 | Micron Technology, Inc. | Under bump metallization pad and solder bump connections |
US6146984A (en) * | 1999-10-08 | 2000-11-14 | Agilent Technologies Inc. | Method and structure for uniform height solder bumps on a semiconductor wafer |
US6268656B1 (en) * | 1999-10-08 | 2001-07-31 | Agilent Technologies, Inc. | Method and structure for uniform height solder bumps on a semiconductor wafer |
US6486053B2 (en) * | 1999-12-16 | 2002-11-26 | Samsung Electronics Co., Ltd. | Semiconductor device and fabricating method therefor |
US6348730B1 (en) | 1999-12-16 | 2002-02-19 | Samsung Electronics Co., Ltd. | Semiconductor device and fabricating method therefor |
US7943422B2 (en) | 2000-02-16 | 2011-05-17 | Micron Technology, Inc. | Wafer level pre-packaged flip chip |
US20060261493A1 (en) * | 2000-02-16 | 2006-11-23 | Micron Technology, Inc. | Wafer level pre-packaged flip chip systems |
US7812447B2 (en) | 2000-02-16 | 2010-10-12 | Micron Technology, Inc. | Wafer level pre-packaged flip chip |
US6710454B1 (en) | 2000-02-16 | 2004-03-23 | Micron Technology, Inc. | Adhesive layer for an electronic apparatus having multiple semiconductor devices |
US20040113246A1 (en) * | 2000-02-16 | 2004-06-17 | Micron Technology, Inc. | Method of packaging at a wafer level |
US7646102B2 (en) | 2000-02-16 | 2010-01-12 | Micron Technology, Inc. | Wafer level pre-packaged flip chip systems |
US20060255475A1 (en) * | 2000-02-16 | 2006-11-16 | Micron Technology, Inc. | Wafer level pre-packaged flip chip system |
US7808112B2 (en) | 2000-02-16 | 2010-10-05 | Micron Technology, Inc. | Wafer level pre-packaged flip chip system |
US20060261475A1 (en) * | 2000-02-16 | 2006-11-23 | Micron Technology, Inc. | Wafer level pre-packaged flip chip |
US20060258052A1 (en) * | 2000-02-16 | 2006-11-16 | Micron Technology, Inc. | Wafer level pre-packaged flip chip |
US20040104486A1 (en) * | 2000-02-16 | 2004-06-03 | Micron Technology, Inc. | Electronic apparatus having an adhesive layer from wafer level packaging |
US6806578B2 (en) | 2000-03-16 | 2004-10-19 | International Business Machines Corporation | Copper pad structure |
US6958287B2 (en) | 2000-04-10 | 2005-10-25 | Micron Technology, Inc. | Micro C-4 semiconductor die |
US20030186485A1 (en) * | 2000-04-10 | 2003-10-02 | Farrar Paul A. | Micro C-4 semiconductor die and method for depositing connection sites thereon |
US20060131748A1 (en) * | 2000-06-28 | 2006-06-22 | Krishna Seshan | Ball limiting metallurgy split into segments |
US7033923B2 (en) * | 2000-06-28 | 2006-04-25 | Intel Corporation | Method of forming segmented ball limiting metallurgy |
US20050158980A1 (en) * | 2000-06-28 | 2005-07-21 | Krishna Seshan | Method of forming segmented ball limiting metallurgy |
US6468892B1 (en) * | 2000-07-14 | 2002-10-22 | National Semiconductor Corporation | Front side coating for bump devices |
US6566762B1 (en) | 2000-07-14 | 2003-05-20 | National Semiconductor Corporation | Front side coating for bump devices |
US6415974B2 (en) * | 2000-08-01 | 2002-07-09 | Siliconware Precision Industries Co., Ltd. | Structure of solder bumps with improved coplanarity and method of forming solder bumps with improved coplanarity |
US6753609B2 (en) | 2000-08-21 | 2004-06-22 | Siliconware Precision Industries Co., Ltd. | Circuit probing contact pad formed on a bond pad in a flip chip package |
US20020031880A1 (en) * | 2000-08-21 | 2002-03-14 | Siliconware Precision Industries Co., Ltd. | Circuit probing contact pad formed on a bond pad in a flip chip package |
US6258705B1 (en) | 2000-08-21 | 2001-07-10 | Siliconeware Precision Industries Co., Ltd. | Method of forming circuit probing contact points on fine pitch peripheral bond pads on flip chip |
US6610591B1 (en) | 2000-08-25 | 2003-08-26 | Micron Technology, Inc. | Methods of ball grid array |
US6906417B2 (en) | 2000-08-25 | 2005-06-14 | Micron Technology, Inc. | Ball grid array utilizing solder balls having a core material covered by a metal layer |
US6692629B1 (en) * | 2000-09-07 | 2004-02-17 | Siliconware Precision Industries Co., Ltd. | Flip-chip bumbing method for fabricating solder bumps on semiconductor wafer |
US6958546B2 (en) | 2000-09-18 | 2005-10-25 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
US6586323B1 (en) * | 2000-09-18 | 2003-07-01 | Taiwan Semiconductor Manufacturing Company | Method for dual-layer polyimide processing on bumping technology |
US20030199159A1 (en) * | 2000-09-18 | 2003-10-23 | Taiwan Semiconductor Manufacturing Company | Novel method for dual-layer polyimide processing on bumping technology |
US6489180B1 (en) | 2000-09-28 | 2002-12-03 | Siliconware Precision Industries Co., Ltd. | Flip-chip packaging process utilizing no-flow underfill technique |
US6452270B1 (en) * | 2000-10-13 | 2002-09-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor device having bump electrode |
US6512298B2 (en) * | 2000-11-29 | 2003-01-28 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same |
US8072070B2 (en) | 2001-03-05 | 2011-12-06 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US8368213B2 (en) | 2001-03-05 | 2013-02-05 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US7863739B2 (en) * | 2001-03-05 | 2011-01-04 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20080188071A1 (en) * | 2001-03-05 | 2008-08-07 | Megic Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20080258305A1 (en) * | 2001-03-05 | 2008-10-23 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20080054459A1 (en) * | 2001-03-05 | 2008-03-06 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20080048320A1 (en) * | 2001-03-05 | 2008-02-28 | Megica Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US20060237839A1 (en) * | 2001-06-20 | 2006-10-26 | Salman Akram | Apparatus for conducting heat in a flip-chip assembly |
US20030162323A1 (en) * | 2001-06-20 | 2003-08-28 | Salman Akram | Method for conducting heat in a flip-chip assembly |
US20020195702A1 (en) * | 2001-06-20 | 2002-12-26 | Salman Akram | Method and apparatus for conducting heat in a flip-chip assembly |
US6847110B2 (en) | 2001-06-20 | 2005-01-25 | Micron Technology, Inc. | Method and apparatus for conducting heat in a flip-chip assembly |
US6861745B2 (en) | 2001-06-20 | 2005-03-01 | Micron Technology, Inc. | Method and apparatus for conducting heat in a flip-chip assembly |
US6541303B2 (en) | 2001-06-20 | 2003-04-01 | Micron Technology, Inc. | Method for conducting heat in a flip-chip assembly |
US7087511B2 (en) | 2001-06-20 | 2006-08-08 | Micron Technology, Inc. | Method for conducting heat in a flip-chip assembly |
US20040212102A1 (en) * | 2001-06-20 | 2004-10-28 | Salman Akram | Apparatus for conducting heat in a flip-chip assembly |
US20030151129A1 (en) * | 2001-06-20 | 2003-08-14 | Salman Akram | Method and apparatus for conducting heat in a flip-chip assembly |
US6667230B2 (en) * | 2001-07-12 | 2003-12-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Passivation and planarization process for flip chip packages |
US20030022477A1 (en) * | 2001-07-27 | 2003-01-30 | Han-Kun Hsieh | Formation of electroplate solder on an organic circuit board for flip chip joints and board to board solder joints |
US7098126B2 (en) * | 2001-07-27 | 2006-08-29 | Phoenix Precision Technology Corp. | Formation of electroplate solder on an organic circuit board for flip chip joints and board to board solder joints |
US6602775B1 (en) | 2001-08-16 | 2003-08-05 | Taiwan Semiconductor Manufacturing Company | Method to improve reliability for flip-chip device for limiting pad design |
WO2003019657A2 (en) * | 2001-08-29 | 2003-03-06 | Koninklijke Philips Electronics N.V. | Integrated circuit device with bump bridges and method for making the same |
US20030053277A1 (en) * | 2001-08-29 | 2003-03-20 | Reiner Joachim Christian | Integrated circuit device with bump bridges and method for making the same |
WO2003019657A3 (en) * | 2001-08-29 | 2003-10-23 | Koninkl Philips Electronics Nv | Integrated circuit device with bump bridges and method for making the same |
US6956292B2 (en) | 2001-09-10 | 2005-10-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bumping process to increase bump height and to create a more robust bump structure |
US6605524B1 (en) | 2001-09-10 | 2003-08-12 | Taiwan Semiconductor Manufacturing Company | Bumping process to increase bump height and to create a more robust bump structure |
US7196001B2 (en) * | 2001-09-21 | 2007-03-27 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US20040159947A1 (en) * | 2001-09-21 | 2004-08-19 | Madhav Datta | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US10037956B2 (en) | 2001-09-21 | 2018-07-31 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US20060148233A1 (en) * | 2001-09-21 | 2006-07-06 | Madhav Datta | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US8952550B2 (en) | 2001-09-21 | 2015-02-10 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US20100117229A1 (en) * | 2001-09-21 | 2010-05-13 | Madhav Datta | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US7250678B2 (en) * | 2001-09-21 | 2007-07-31 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US6740427B2 (en) | 2001-09-21 | 2004-05-25 | Intel Corporation | Thermo-mechanically robust C4 ball-limiting metallurgy to prevent failure due to die-package interaction and method of making same |
US6555912B1 (en) * | 2001-10-23 | 2003-04-29 | International Business Machines Corporation | Corrosion-resistant electrode structure for integrated circuit decoupling capacitors |
US6743707B2 (en) * | 2001-12-31 | 2004-06-01 | Advanced Semiconductor Engineering, Inc. | Bump fabrication process |
US20030127748A1 (en) * | 2002-01-09 | 2003-07-10 | Jen-Kuang Fang | Semiconductor package |
US6924557B2 (en) * | 2002-01-09 | 2005-08-02 | Advanced Semiconductor Engineering, Inc. | Semiconductor package |
US6759751B2 (en) * | 2002-01-09 | 2004-07-06 | Micron Technology, Inc. | Constructions comprising solder bumps |
US20030203172A1 (en) * | 2002-01-09 | 2003-10-30 | Nishant Sinha | Constructions comprising solder bumps |
US6875683B2 (en) * | 2002-02-21 | 2005-04-05 | Advanced Semiconductor Engineering, Inc. | Method of forming bump |
US20030157790A1 (en) * | 2002-02-21 | 2003-08-21 | Ho-Ming Tong | Method of forming bump |
US20040197950A1 (en) * | 2002-05-15 | 2004-10-07 | Jensen David G. | Methods and apparatus for microelectronic component manufacture |
US6720195B2 (en) | 2002-05-15 | 2004-04-13 | Micron Technology, Inc. | Methods employing elevated temperatures to enhance quality control in microelectronic component manufacture |
US6878172B2 (en) | 2002-05-15 | 2005-04-12 | Micron Technology, Inc. | Systems employing elevated temperatures to enhance quality control in microelectronic component manufacture |
US20070264751A1 (en) * | 2002-05-21 | 2007-11-15 | Micron Technology, Inc. | Super High Density Module with Integrated Wafer Level Packages |
US20070152327A1 (en) * | 2002-05-21 | 2007-07-05 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US20070145558A1 (en) * | 2002-05-21 | 2007-06-28 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US8698295B2 (en) | 2002-05-21 | 2014-04-15 | Micron Technology, Inc. | Super high-density module with integrated wafer level packages |
US20050048695A1 (en) * | 2002-05-21 | 2005-03-03 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US7368374B2 (en) | 2002-05-21 | 2008-05-06 | Micron Technology Inc. | Super high density module with integrated wafer level packages |
US7884007B2 (en) | 2002-05-21 | 2011-02-08 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US8304894B2 (en) | 2002-05-21 | 2012-11-06 | Micron Technology, Inc. | Super high-density module with integrated wafer level packages |
US7579681B2 (en) | 2002-06-11 | 2009-08-25 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US20030227079A1 (en) * | 2002-06-11 | 2003-12-11 | Micron Technology, Inc. | Super high density module with integrated wafer level packages |
US20060097911A1 (en) * | 2002-07-03 | 2006-05-11 | Quelis Id Systems Inc. | Wire positioning and mechanical attachment for a radio-frequency indentification device |
US7049229B2 (en) * | 2003-07-31 | 2006-05-23 | Fujitsu Limited | Method of fabricating semiconductor device and semiconductor device |
US20050026335A1 (en) * | 2003-07-31 | 2005-02-03 | Fujitsu Limited | Method of fabricating semiconductor device and semiconductor device |
US7319276B2 (en) * | 2003-09-29 | 2008-01-15 | Phoenix Precision Technology Corporation | Substrate for pre-soldering material and fabrication method thereof |
US20060278999A1 (en) * | 2003-09-29 | 2006-12-14 | Phoenix Precision Technology Corporation | Substrate for Pre-Soldering Material and Fabrication Method Thereof |
US7309924B2 (en) * | 2003-12-18 | 2007-12-18 | Samsung Electronics Co., Ltd. | UBM for fine pitch solder ball and flip-chip packaging method using the same |
US20050151269A1 (en) * | 2003-12-18 | 2005-07-14 | Samsung Electronics Co., Ltd. | UBM for fine pitch solder balland flip-chip packaging method using the same |
US20060017160A1 (en) * | 2004-07-23 | 2006-01-26 | Advanced Semiconductor Engineering Inc. | Structure and formation method of conductive bumps |
US7636994B2 (en) * | 2004-09-06 | 2009-12-29 | Tdk Corporation | Method of making a piezoelectric device |
US20090271962A1 (en) * | 2004-09-06 | 2009-11-05 | Tdk Corporation | Electronic device and method of making same |
US8183749B2 (en) | 2004-09-06 | 2012-05-22 | Tdk Corporation | Electronic device and method of making same |
US20060205225A1 (en) * | 2004-09-06 | 2006-09-14 | Tdk Corporation | Electronic device and method of making same |
US20060068595A1 (en) * | 2004-09-30 | 2006-03-30 | Frank Seliger | Semiconductor substrate thinning method for manufacturing thinned die |
US7375032B2 (en) * | 2004-09-30 | 2008-05-20 | Advanced Micro Devices, Inc. | Semiconductor substrate thinning method for manufacturing thinned die |
US20070045388A1 (en) * | 2005-08-31 | 2007-03-01 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US11075146B2 (en) | 2005-08-31 | 2021-07-27 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US10541192B2 (en) | 2005-08-31 | 2020-01-21 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US8637994B2 (en) | 2005-08-31 | 2014-01-28 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US9737947B2 (en) | 2005-08-31 | 2017-08-22 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US8308053B2 (en) * | 2005-08-31 | 2012-11-13 | Micron Technology, Inc. | Microfeature workpieces having alloyed conductive structures, and associated methods |
US20070207608A1 (en) * | 2006-03-01 | 2007-09-06 | Jiun-Heng Wang | Semiconductor device and manufacturing process thereof |
US7651886B2 (en) * | 2006-03-01 | 2010-01-26 | Chipmos Technologies Inc. | Semiconductor device and manufacturing process thereof |
US20090230560A1 (en) * | 2006-03-31 | 2009-09-17 | Fujitsu Microelectronics Limited | Semiconductor device and manufacturing method thereof |
US20070228561A1 (en) * | 2006-03-31 | 2007-10-04 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
US7550844B2 (en) * | 2006-03-31 | 2009-06-23 | Fujitsu Microelectronics Limited | Semiconductor device and manufacturing method thereof |
US8395260B2 (en) | 2006-03-31 | 2013-03-12 | Fujitsu Semiconductor Limited | Semiconductor device and manufacturing method thereof |
US8084277B2 (en) | 2006-03-31 | 2011-12-27 | Fujitsu Semiconductor Limited | Semiconductor device and manufacturing method thereof |
US20070298601A1 (en) * | 2006-06-22 | 2007-12-27 | Booth Roger A | Method and System for Controlled Plating of Vias |
US8610279B2 (en) | 2006-08-28 | 2013-12-17 | Micron Technologies, Inc. | Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods |
TWI415197B (en) * | 2007-02-12 | 2013-11-11 | Ibm | Undercut-free blm process for pb-free and pb-reduced c4 |
US8169081B1 (en) | 2007-12-27 | 2012-05-01 | Volterra Semiconductor Corporation | Conductive routings in integrated circuits using under bump metallization |
US8664767B2 (en) | 2007-12-27 | 2014-03-04 | Volterra Semiconductor Corporation | Conductive routings in integrated circuits using under bump metallization |
US8933520B1 (en) | 2007-12-27 | 2015-01-13 | Volterra Semiconductor LLC | Conductive routings in integrated circuits using under bump metallization |
US20090200675A1 (en) * | 2008-02-11 | 2009-08-13 | Thomas Goebel | Passivated Copper Chip Pads |
US8822324B2 (en) | 2008-02-11 | 2014-09-02 | Infineon Technologies Ag | Passivated copper chip pads |
US9373596B2 (en) | 2008-02-11 | 2016-06-21 | Infineon Technologies Ag | Passivated copper chip pads |
US20120126405A1 (en) * | 2008-02-15 | 2012-05-24 | International Business Machines Corporation | Solder interconnect pads with current spreading layers |
TWI423413B (en) * | 2008-02-15 | 2014-01-11 | Ultratech Inc | Solder interconnect pads with current spreading layers |
US8338947B2 (en) * | 2008-02-15 | 2012-12-25 | Ultratech, Inc. | Solder interconnect pads with current spreading layers |
US8901753B2 (en) | 2008-06-30 | 2014-12-02 | Intel Corporation | Microelectronic package with self-heating interconnect |
US8378504B2 (en) * | 2008-06-30 | 2013-02-19 | Intel Corporation | Microelectronic package with self-heating interconnect |
US20090321962A1 (en) * | 2008-06-30 | 2009-12-31 | Daewoong Suh | Microelectronic package with self-heating interconnect |
US9165850B2 (en) * | 2012-10-31 | 2015-10-20 | Globalfoundries Inc. | Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
US20150044864A1 (en) * | 2012-10-31 | 2015-02-12 | International Business Machines Corporation | Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
US9059106B2 (en) * | 2012-10-31 | 2015-06-16 | International Business Machines Corporation | Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
US20140117535A1 (en) * | 2012-10-31 | 2014-05-01 | International Business Machines Corporation | Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
US10283694B2 (en) | 2013-10-07 | 2019-05-07 | Hypres, Inc. | Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit |
US9741918B2 (en) | 2013-10-07 | 2017-08-22 | Hypres, Inc. | Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit |
US20230005979A1 (en) * | 2014-04-23 | 2023-01-05 | Sony Group Corporation | Semiconductor device and method of manufacturing thereof |
US10438914B2 (en) * | 2016-04-01 | 2019-10-08 | Intel Corporation | Surface finishes for high density interconnect architectures |
US10998282B2 (en) | 2016-04-01 | 2021-05-04 | Intel Corporation | Surface finishes for high density interconnect architectures |
US20180323162A1 (en) * | 2016-04-01 | 2018-11-08 | Intel Corporation | Surface finishes for high density interconnect architectures |
US10420211B2 (en) * | 2017-08-09 | 2019-09-17 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device |
US20220163707A1 (en) * | 2020-11-20 | 2022-05-26 | Applied Materials, Inc. | Structure and method of mirror grounding in lcos devices |
US11880052B2 (en) * | 2020-11-20 | 2024-01-23 | Applied Materials, Inc. | Structure and method of mirror grounding in LCoS devices |
US11881539B2 (en) | 2020-11-20 | 2024-01-23 | Applied Materials, Inc. | Structure and method of advanced LCoS back-plane having highly reflective pixel via metallization |
US11908678B2 (en) | 2021-01-14 | 2024-02-20 | Applied Materials, Inc. | Method of CMP integration for improved optical uniformity in advanced LCOS back-plane |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5903058A (en) | Conductive bumps on die for flip chip application | |
US5736456A (en) | Method of forming conductive bumps on die for flip chip applications | |
US6147413A (en) | Mask repattern process | |
US7205221B2 (en) | Under bump metallization pad and solder bump connections | |
US5767010A (en) | Solder bump fabrication methods and structure including a titanium barrier layer | |
US7772115B2 (en) | Methods for forming through-wafer interconnects, intermediate structures so formed, and devices and systems having at least one solder dam structure | |
US6621164B2 (en) | Chip size package having concave pattern in the bump pad area of redistribution patterns and method for manufacturing the same | |
US6743660B2 (en) | Method of making a wafer level chip scale package | |
US8497584B2 (en) | Method to improve bump reliability for flip chip device | |
US6417089B1 (en) | Method of forming solder bumps with reduced undercutting of under bump metallurgy (UBM) | |
US6376279B1 (en) | method for manufacturing a semiconductor package | |
US5698465A (en) | Process for manufacturing an interconnect bump for flip-chip integrated circuit including integral standoff and hourglass shaped solder coating | |
US20030057559A1 (en) | Methods of forming metallurgy structures for wire and solder bonding | |
US6583039B2 (en) | Method of forming a bump on a copper pad | |
JP5064632B2 (en) | Method and apparatus for forming an interconnect structure | |
WO2013192054A1 (en) | Semiconductor chip with expansive underbump metallization structures | |
US6774026B1 (en) | Structure and method for low-stress concentration solder bumps |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
CC | Certificate of correction | ||
FPAY | Fee payment |
Year of fee payment: 4 |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT, CALIFORNIA Free format text: SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038669/0001 Effective date: 20160426 Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGEN Free format text: SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038669/0001 Effective date: 20160426 |
|
AS | Assignment |
Owner name: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT, MARYLAND Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038954/0001 Effective date: 20160426 Owner name: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:038954/0001 Effective date: 20160426 |
|
AS | Assignment |
Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT, CALIFORNIA Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:043079/0001 Effective date: 20160426 Owner name: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGEN Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST;ASSIGNOR:MICRON TECHNOLOGY, INC.;REEL/FRAME:043079/0001 Effective date: 20160426 |
|
AS | Assignment |
Owner name: MICRON TECHNOLOGY, INC., IDAHO Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT;REEL/FRAME:047243/0001 Effective date: 20180629 |
|
AS | Assignment |
Owner name: MICRON TECHNOLOGY, INC., IDAHO Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT;REEL/FRAME:050937/0001 Effective date: 20190731 |