US2401447A - Multiplier circuit - Google Patents

Description

June 4, w46. f F. P. WIPFF 2,401,447

MULTIPLIR CIRCUIT Filed April 25, 1943 2 sheets-sheet 2 Inventor I Gftorneg atented June 4, 1946 t MULTFPLIER CIRCUIT Frank P. Wipif, Princeton, N.A

J., assignor to Radio Corporation of America, a corporation of Delaware pplication April 23, 1943, Serial No. 484,303-

11 Claims.

M7 invention relates vto the multiplication oi voltages and particularly to methods of and means for obtaining the product of two signalsk for use in a secret communication system. In the copending application of Alda V. Bedford, Serial No. 456,578, filed August 29, 1942, and entitled Secret communication system, there is described a communication system in which the speech or other communication signal S is mulof the coding signal K to obtain the original is SK X 1/K=S. According to the application the product SK is obcorrect polarity to obtain the 4product SK.A

An object of the present invention is to provide an improved and simplified method of and means for multiplying a plurality of signal voltages by each other to obtain their product.

An additional object age swing in a be referred to as squaring circuits designated Q Where referred to in tion and drawings. In one embodiment of the invention the waves S and K to be multiplied are each separately squared in two squaring circuits Q1 and Q2. In a branch circuit the signals and will be the descripputting the positive cycles of either cause the voltage swing always ment of the invention shown in Fig.

S and K are added, then the sum S+K is squared in a, third squaring circuit Q3 and the squared signal is reversed in polarity. The three outputs of Q1, Q2 and Q3 are then added to obtain the sum as shown in the following equations:

-I- 2SA to be on the desired portion of the squaring circuit characteristic curve.

'I'he invention will be better understood from the following description taken in connection with the accompanying drawings in which Figure l is a block diagram of signalling apparatus embodying the invention,

Figure 2 is a block diagram of one multiplier circuit embodying the invention,

Figure 3 is a graph which is referred to in ex plaining the invention,

Figure i is a circuit diagram -of the embodi- Figures 5 and 6 are block and circuit diagrams, respectively, of another embodiment of the invention, and

Figure 7 is a, circuit diagram of a, reciprocal* circuit that may be employed in the system of Fig. 1.

In the several figures, similar parts are indicated by similar reference characters.

Referring to Fig. 1, the invention is shown applied to radio apparatus that may be switched for operation either as a transmitter or as a re ceiver. The several switches are shown in the position for transmitteroperation. This is the operation of the apparatus that will first be described. A microphone and a speech amplier are shown at 'i and 8, respectively. The signals S is Aapplied through a. switch 9 to a multiplier unit ifi which preferably is designed in accordance with the present invention. The code signal K may be produced by means of a, code disc i6, a

mask Il, a light source i8, a condensing lens i9, and a photo-electric ce11 20. The signal K is supplied through ampliflers 2i and 22 and through a switch to the multiplier unit it. 'I'he resulting multiplier output signal SK is supplied through an amplier 26 and through a switch 2 to a radio transmitter 2B or to a wire line, if preferred.

circuit 44 is illustrated in The multiplier Ii is unchanged. The signal SK is supplied from a radio receiver 3i through the switch 9-to the multiplier I4. The coding signal K produced by the disc i6 is supplied through the amplifier 2l to a reciprocal circuit 32 which may be designed in accordance with the invention described and claimed in application Serial No. 484,304, led on the same day as the present application in the name of Carl A. Meneley, and entitled Reciprocal circuits. The reciprocal circuit of this type is shown in Fig. 1. The reciprocal circuit 32 supplies the decoding signal l/K through the switch 23 to the multiplier i4. The resulting output of multiplier Il is the original communication signal S since SK X i/K =S. The signal S is ampliiied by the ampliiler 26 and supplied through the switch 21 to headphones or to the loudspeaker 33.

The code disc i at the transmitter and the corresponding code disc at the receiver are held in synchronisrn and in the proper phase relation by suitable synchronizing means. For example, at the transmitter a G-cycle per second current from a source 3% may be supplied through a switch 31 to a synchronous motor 38 which rotates the code disc i6. The 600-cycle current also modulates a radio transmitter 39 for the transmission oi synchronizing signal tothe receiver. At the receivervthe switch 31 is in its contact position R whereby the received 60G-cycle current is supplied from a radio receiver `lil to the synchronous motor 38. In some cases it may be preferable to transmit the synchronizing signal over a wire line.

One oi my preferred designs for the multiplier Figs. 2 and 4. As previously stated, the invention makes use of devices having a square law characteristic when used in a suitable circuit. Most such devices have a characteristic of the type shown in Fig. 3, i. e., voltages more negative .than Em (cutoff) produce no output. Hence, they must be operatedl with a bias voltage En of such value that negative signal swings will remain on the characteristic. In Fig. 3, El and E@ are the corresponding abscissa and ordinate values, respectively, at any point on the square law curve. 1f asignal el is applied to the input ci a squaring circuit Qa, the instantaneous input voltage will be equal to Ea-i-e.. The instantaneous output voltage will be given by A=EnE=the bias measured from cutoff. C=a constant.

If the signal voltage e. consists of the 'sum of two voltage waves S and K as indicated in Fig. 2, the output voltage will be the other unit Q5 54 i90 a 75 The arrangement common point are added with the proper polarity as indicated below:

Output of Q1= A2 -l- S 2AS Output of Q,= A2 K2 2.4K

Sum output Aa 2S K The term A2 is direct current and is dropped in the rst resistor-capacitor coupled stage iollowing the multiplier.

Fig. 4 shows a circuit diagram corresponding to the block diagram of Fig. 2 in which vacuum tubes 5B, 51 and 58 are utilized as the squaring circuits Q1, Q3 and Q2, respectively. These tubes must have plate current vs. grid voltage characteristic that follows substantially a square law,l Vacuum tubes of the types 6J5,6SN7, 605, and

other triodes have suitablecharacteristics. The

plate resistors for such tubes should be kept small, not more than 1000 ohms.

The signals S and K are applied to the grids of tubes 56 and 58 through resistors 53 and 6I, respectievly. Both of the signals S and K are applied to the grid of tube 5'! through resistors 02 and 63, respectively. A suitable negative bias is applied to the grids of the tubes 5i?, 51 and 58 through grid resistors 64 and B8. The resistors 5S,.B!, B2, 63, 64 and 66 all have the same com-- paratively high resistance, such as between 0.1 megohm and 1 megohrn, so as not to load the comparatively low impedance driving source too much. However, the resistance is not made so high as to permit excessive phase shift `due to grid-cathode capacity. Since the pairs of resistors 59-64, 62-53, and l-i act as voltage dividers for the applied signals, the voltages applied to the grids of tubes 5B, 51 and 58 will be S-K and common junction point S8 through the resistors I 52, 53 and 54. These 'resistors may have a resistance of from 0.05 megohm to 0.1 megohm, for example. If everything is properly adjusted, only the desired product term -2SK and the D.- component A2 appear at the junction. In practice it is necessary to adjust the system carefully for minimum residual signal when either the signal S or the signal K is removed.

A. somewhat simpler circuit requiring only two squaring devices Q4 and Q5 is shown in Fig. 5. To the unit Q4 is applied the signal K-i-S; and to is applied the signal KS. After the 'output of the unit Q5 has its polarity reversed,the two outputs are added through resistors 1 i yand 12 as shown below:

In order to cancel the term 4AS, an equal amount oi signal -4AS is added to the above sum output through a resistor 13.

of Fig. 5 has the advantage of providing a better ratio of signal SK to residual signal K, .but has the disadvantage of having to feed signal S around the squaring devices. If the gain of the squaring devices changes, cancellation will be impaired.

-Fig. 6 is a circuit diagram corresponding to the block diagram of Fig. where a pair of vacuum and 'IS are utilized as the squaring circuits Q4 and Qs, respectively. The signal S may be taken oi the anode and cathode circuits of an amplier tube 71 and applied with opposite polarities to the grids of tubes 14 and 18 through resistors 78 and 19, respectively. 'Ihe signal K may be taken oil the anode circuit of an amplifier tube 8| and applied through resistors 82 and 83, respectively, to the grids of the tubes 1d and 16. Thus the signal K+S is impressed upon the tube 'id While the signal K-S is impressed upon the tube 18. A suitable negative bias is applied to the grids of the tubes It and i6 through grid leak resistors 84 and 8S, respectively.

The outputs of tubes It and 76 are taken oil' their cathode resistor 81 and anode resistor 88, respectively, and applied to a common junction point 89 through resistors 9| and 02. The algebraic sum of the two ouwuts at the junction point 09 is IAS-HSK. The term 4AS is cancelled by applying a signal -ZS through a blocking capacitor 93 and a resistor 9d to the junction point 89 and by making the constant Z equal to the constant 4A. The signal ZS is given the de sired value -4AS by adjusting the resistor 03. Thus, the only term that will appear at the june tion point 89 is the desired term 48K.

It should be noted that in the circuits of Figs. 4 and 6, the signals S 'and K will never appear in the output with the product signal SK ii the circuits are properly balanced even though the signal K alone or the signal S alone is being applied to the multipler. This is particularly important where the multiplier is being employed in a secret communication system.

Fig. 7 shows, by way of example, one circuit that may be employed to obtain the reciprocal wave l/K. This circuit is described and claimed in the above-mentioned Meneley application. The resistor |02 is of high enough resistance so that the driving source for the non-linear resistance unit |03 is of high impedance whereby there is only a slight variation in the current ow through unit |03. The unit |03 may consist of a pair of copper oxide rectiflers |031: and |0312 connected to conduct current in opposite directions.

The voltage appearing across the non-linear unit |03 is the voltage m having a flattened wave form. This voltage is amplied by a cathode biased vacuum tube |04 and appears across an anode resistor |06 and a portion of the resistor IOL-|01' of a second amplifier tube |08.

The rectangular wave n is produced in this particular example by applying the output of the tube |04 through a blocking capacitor |09 and a high impedance resistor to a pair of diodes H2 and H3 which are connected to conduct in opposite directions. Output resistors H4 and IIB of comparatively low resistance are connected in series with the diodes ||2 and H3, respectively. A biasing voltage drop for opposing current flow through diode H3 is produced across the resistor ||B by connecting a source of voltage (not shown) thereacross, a resistor being in series with the voltage source. The diodes I I2 and ||3 clip axis because a bias voltage which causes current m add in the 6 now through the diode iii and resistor lis is built up across the capacitor |09 by the positive cycle pulses owing through the diode IIS. Thus the diodes H2 and H3 become conducting on alternate cycles when the signal voltage exceeds the D.C. voltage drop across the resistors Hd and H6, respectively. The resulting rectangular wave n is amplified and reversed in polarity byv wave n and the iiattened wave the tube |08. The

, portion of the anode resistor |01- |0'l that is common to the tubes |05 and |08v to produce the desired reciprocal wave l/K.

Ii the wave m. is ilattened correctly and if the waves m and n are added with the correct relative amplitudes, the resulting signal will be substantially a true reciprocal o! the wave K. 'Ihe waves m and n may be mixed with the correct relative amplitudes by adjusting a variable tap i2! on the anode resistor |01. The correct shaping ofthe flattened wave m may be obtained by selecting a non-linear resistorunit |03 having a suitable voltage-resistance characteristic and by adjusting the value of the resistor |02.

Since the above-described repirocal circuit is purely resistive whereby its operation is independent oi frequency, ii it is adjusted to produce the reciprocal oi an applied wave having one wave form, it will. then always produce the rejiprocal of an applied wave regardless of its wave I claim as my invention: v

1. The method of obtaining the product of a plurality ci voltages oi' varying amplitude which comprises the steps oi' adding said voltages, squaring the sum of said voltages whereby the desired product term is obtained and whereby undesired terms are obtained, and balancing out said undesired terms.

2. Apparatus for obtaining the product of a plurality -of voltages of varying 'amplitude which together, squaring the sum S-l-K whereby the desired product term SK is vobtained and whereby undesired terms are obtained, producing balancing out signals which are the same as said undesired terms, and adding the latter signals to said squared sum 'with a polarity opposite that of the squared sum whereeby the undesired terms are cancelled.

v the applied wave m symmetrically about its A.C. Y

5. A multiplier circuit for obtaining the product of two electrical signals S and K of varying the sum S-l-K whereby the desired product term squared sum cancelled.

comprises means for squarlng 6. The method of obtaining the product of a. plurality of voltages of varying amplitude which comprises the steps of squaring the sum of said voltages whereby the desired product term is obtained and whereby undesired terms are obtained, squaring said individual voltages and adding them to said squared sum with a polarity opposite to that of the squared sum whereby the undesired terms are cancelled.

7. The method of obtaining the product oi' two electrical signals S and K o! varying amplitude which comprises the steps of squaring the sum S-i-K whereby the desired product term SK is obtained and whereby undesired terms are obtained, .squaring said individual voltages S and K and adding them to said squared sum with a polarity opposite that of the squared sum whereby the undesired terms are cancelled.

8. A multiplier device for obtaining the productl of two electrical signals S and K of varying amplitude which comprises means for squaring the sum S-i-K whereby the desired product term SK is obtained and whereby undesired terms are obtained, means for squaring said individual voltages S and K and means for adding them to said squared sum with a polarity opposite that of the squared sum whereby the undesired terms are cancelled.

9. The method of obtaining the product of a plurality of electrical voltages of varying amplitude which comprises the steps of squaring the 8 sum of said voltages whereby the desired product term is obtained and. whereby undesired terms are obtained, squaring the diierence of said voltages, adding said squared sum and said squared difference after one of them has been reversed in polarity, and also adding with negative polarity the voltage that was subtracted to obtain said difference voltage.

10. (The method of obtaining the product of two electrical signals-S and K of varying amplitude which comprises the steps oi squaring the sum K+S whereby the desired product term SK is obtained and whereby undesired terms are obtained, squaring the diierence value K-S,` adding said squared `sum and said squared diierence after one of them has been reversed in polarity to cancel certain of said undesired terms, and also adding the signal -S to cancel the remaining undesired term.

11. A multiplier device for obtaining the product o1 two electrical signals S and K of varying amplitude which'comprises means for squaring the sum K-l-S whereby the desired product term SK is obtained and whereby undesired terms are obtained, means for squaring the difierence value K-S, means for adding said squared sum and said squared difference after one of them has been reversed in polarity to cancel certain of said undesired terms, and means for also adding the signal -S to cancel the remaining undesired term.

' FRANK P. WIPFF.

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