US20150318329A1 - Semiconductor device and method of fabricating the same - Google Patents

Semiconductor device and method of fabricating the same Download PDF

Info

Publication number
US20150318329A1
US20150318329A1 US14/799,099 US201514799099A US2015318329A1 US 20150318329 A1 US20150318329 A1 US 20150318329A1 US 201514799099 A US201514799099 A US 201514799099A US 2015318329 A1 US2015318329 A1 US 2015318329A1
Authority
US
United States
Prior art keywords
nitride
rich
semiconductor device
titanium
nitride material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US14/799,099
Inventor
Jin Hyock KIM
Keun Lee
Young Seok Kwon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
SK Hynix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SK Hynix Inc filed Critical SK Hynix Inc
Priority to US14/799,099 priority Critical patent/US20150318329A1/en
Assigned to SK Hynix Inc. reassignment SK Hynix Inc. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KIM, JIN HYOCK, KWON, YOUNG SEOK, LEE, KEUN
Publication of US20150318329A1 publication Critical patent/US20150318329A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/231Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H01L27/2409
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/021Formation of the switching material, e.g. layer deposition
    • H10N70/028Formation of the switching material, e.g. layer deposition by conversion of electrode material, e.g. oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/061Patterning of the switching material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides

Definitions

  • the inventive concept relates to a semiconductor device, and more particularly, to a semiconductor device and a method of fabricating the same.
  • Phase-change random access memory which are examples of such next-generation memory devices, store data using a resistance difference between an amorphous state and crystalline state of a phase-change layer (e.g., a chalcogenide compound) created by an electric pulse to the phase-change layer.
  • a phase-change layer e.g., a chalcogenide compound
  • a MOS transistor or a PN diode is employed as a switching element.
  • MOS transistor When the MOS transistor is used as the switching element, improvement in integration of the PCRAM is limited.
  • PN diode is used as the switching element, a plurality of PN diodes are electrically connected to each other through an N+ region formed in a surface of an active region. Thus, driving currents of cells are different from each other due to large resistance of the N+ region. Therefore, a PCRAM having an improved design and a method a manufacturing such an improved PCRAM is necessary.
  • the conventional PCRAM employs a metal word line on a semiconductor substrate and a Schottky diode formed on the word line.
  • the Schottky diode includes a barrier metal layer in contact with the word line and a P+ polysilicon layer formed on the barrier metal layer.
  • a height of the barrier metal layer has to be increased to control an off current and a work function of the barrier metal layer has to be lowered in order to increase the height of the barrier metal layer.
  • metal used for the word line or the barrier metal layer may include aluminum (Al), tungsten (W), titanium nitride (TiN), or copper (Cu).
  • Al aluminum
  • TiN titanium nitride
  • Cu copper
  • TiN is typically used as the metal for the word line or the barrier metal layer.
  • TiN has large work function, for example, approximately 4.7 eV to degrade performance of the PCRAM.
  • One or more exemplary embodiments are provided to a semiconductor device capable of enhancing reliability thereof by improving characteristics of a metal nitride layer, which is one of materials forming the semiconductor device, and a method of manufacturing the same.
  • the semiconductor device may include: a semiconductor substrate in which a word line region is formed; and a barrier metal layer, formed of a metal nitride, arranged on the word line region and causing a Schottky junction, the barrier metal layer including: a first nitride material formed of a nitrified first material; and a second nitride material formed of a nitrified second material, where the barrier metal layer is formed of a mixture of the first nitride material and the second nitride material, and where any one of the first material or the second material is rich in a metal used to form the metal nitride.
  • the semiconductor device may include: a semiconductor substrate in which a word line region is formed; and a barrier metal layer, formed of a metal nitride, arranged on the word line region and causing a Schottky junction, the word line region including a first nitride material formed of a nitrified first material; and a second nitride material formed of a nitrified second material, where the word line region is formed of a mixture of the first nitride material and the second nitride material, and where at least one of the first material or the second material is rich in a metal used to form the metal nitride.
  • a method of fabricating a semiconductor device may include: providing a semiconductor substrate in which a word line region is formed; depositing a first material on the word line region; forming a first nitride material by nitrifying the first material; determining whether the first nitride material has a desired thickness, where if the first nitride material has the desired thickness, then depositing a second material on the first nitride material, forming a second nitride material by nitrifying the second material, and determining whether the second nitride material is deposited to a desired thickness, where if the second nitride material has the desired thickness, then depositing a P+ polysilicon layer on the second nitride material, and where the first material or the second material is rich in a material used to form the first nitride material or the second nitride material.
  • the semiconductor device may include: providing a semiconductor substrate; depositing a first material on the semiconductor substrate; nitrifying the first material to form a first nitride material; determining whether the first nitride material has a desired thickness, where if the first nitride material has the desired thickness, then depositing a second material on the first nitride material, nitrifying the second material to form a second nitride material, and determining whether the second nitride material is deposited to a desired thickness, where if the second nitride material has the desired thickness, then forming a barrier metal layer on the second nitride material; and depositing a P+ polysilicon layer on the barrier metal layer, where at least one of the first material and the second material is rich in a metal used to form the first nitride material or the second nitride material.
  • FIG. 1 is a view illustrating a portion of a semiconductor device according to an exemplary embodiment of the inventive concept
  • FIG. 2 is a flowchart illustrating a method of fabricating a semiconductor device according to an exemplary embodiment of the inventive concept
  • FIG. 3 is a flowchart illustrating a method of fabricating Ti-rich titanium nitride according to an exemplary embodiment of the inventive concept
  • FIG. 4 is a flowchart illustrating a method of fabricating aluminum nitride according to an exemplary embodiment of the inventive concept
  • FIG. 5 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 4 and 5 ;
  • FIG. 6 is a flowchart illustrating a method of fabricating titanium nitride according to an exemplary embodiment of the inventive concept
  • FIG. 7 is a flowchart illustrating a method of fabricating Al-rich aluminum nitride according to an exemplary embodiment of the inventive concept
  • FIG. 8 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 6 and 7 ;
  • FIG. 9 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 3 and 7 .
  • Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of exemplary embodiments (and intermediate structures). As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments should not be construed as limited to the particular shapes of regions illustrated herein but may be to include deviations in shapes that result, for example, from manufacturing. In the drawings, lengths and sizes of layers and regions may be exaggerated for clarity. Like reference numerals in the drawings denote like elements. It is also understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other or substrate, or intervening layers may also be present.
  • FIG. 1 is a view illustrating a portion of a semiconductor device according to an exemplary embodiment of the present invention.
  • a semiconductor device 100 includes a word line region 120 .
  • the word line region 120 includes a metal layer or a metal nitride layer formed on a semiconductor substrate 110 .
  • the semiconductor device 100 may be a PCRAM.
  • a barrier metal layer 130 which causes a Schottky junction, includes a metal nitride layer formed on the word line region 120 .
  • An insulating layer 140 is formed on the barrier metal layer 130 and a P+ polysilicon layer 150 is formed in the insulating layer 140 and on the barrier metal layer corresponding to each of cells.
  • the metal nitride layer constituting the word line region 120 and the barrier metal layer 130 , may be formed by mixing a first nitride material, in which a first material is nitrified, and a second nitride material in which a second material is nitrified. At least one of the first material or the second material may be rich in a metal used to form the metal nitride layer.
  • the first material may be rich in titanium (Ti) and the second material may be rich in aluminum (Al).
  • the first material and second material are not limited thereto and may include any material that is capable of forming a metal nitride layer.
  • a composition of the metal nitride layer constituting the word line region 120 and the barrier metal layer 130 is controlled is to lower a work function thereof.
  • an off current can be reduced and reliability of the semiconductor device can be improved.
  • a method of fabricating a semiconductor device 100 according to an exemplary embodiment of the present invention will be described in detail below.
  • FIG. 2 is a flowchart illustrating a method of fabricating a semiconductor device according to an exemplary embodiment of the present invention.
  • a method of fabricating a semiconductor device includes providing a semiconductor substrate 110 (S 210 ).
  • a word line region 120 including a metal layer or a metal nitride layer, is formed on the semiconductor substrate 110 (S 220 ).
  • barrier metal layer 130 is formed in the word line region 120 .
  • a method of forming the barrier metal layer 130 will now be described.
  • a first material is deposited and nitrified on the word line region 120 to form a first nitride material (S 230 ).
  • the first material may include titanium (Ti).
  • the first nitride material may include a Ti-rich titanium nitride (Ti-rich TN) or a titanium nitride (TiN) in which Ti and N are mixed at a ratio of Ti:N of 1:1.
  • the first nitride material is formed to a desired thickness (S 240 ). If the first nitride material is formed to the desired thickness, then a second material is deposited and nitrified on the first nitride material to form a second nitride material (S 250 ).
  • the second material may include aluminum (Al).
  • the second nitride material may include Al-rich aluminum nitride (Al-rich Al—N) or aluminum nitride (TiN) in which Al and N are mixed at a ratio of Al:N of 1:1.
  • the second nitride material is deposited to a desired thickness (S 255 ). If it is determined that the second nitride material is formed to the desired thicknesses, then a P+ polysilicon is deposited on the second nitride material to form a P+ polysilicon layer (S 260 ).
  • the process of depositing the first material and nitrifying the first material to form the first nitride material (S 230 ) or the processes of depositing the second material and nitrifying the second material to form the second nitride material (S 250 ) is repeated until the first nitride material or the second nitride material achieves the desired thickness.
  • the barrier metal layer 130 includes a composition-controlled metal nitride layer.
  • the composition control may also be applied to the process of forming the word line region 120 , as set forth below.
  • the metal nitride layer constituting the word line region 120 or the barrier metal layer 130 is formed through a process which will now be described in detail with reference to FIGS. 3 to 6 .
  • FIG. 3 is a flowchart illustrating a method of fabricating a Ti-rich titanium nitride according to an exemplary embodiment of the present invention.
  • Ti-rich titanium nitride may be fabricated, for example, using an atomic layer deposition (ALD) method shown in FIG. 3 .
  • Ti titanium (Ti) precursor
  • Ti(NEtMe)4 TEMATi
  • TDMATi titanium chloride
  • TiI 4 titanium iodide
  • TiF 4 titanium fluoride
  • a hydrogen (H 2 ) plasma process is performed to remove ligands from the titanium (Ti) precursor (S 330 ).
  • a purge process is performed again to exhaust impurities (S 340 ).
  • the above-described process of four steps S 310 to S 340 may be performed multiple times to form titanium (Ti) to a desired thickness, as described above.
  • an ammonia (NH 3 ) gas or plasma process is performed to nitrify the deposited titanium (Ti) (S 350 ).
  • a degree of nitrification of the titanium (Ti) is determined based on a partial pressure or a supply time of the NH 3 gas.
  • Ti-rich TiN The Ti-rich titanium nitride (Ti-rich TiN) has a work function of around 4.3 eV to around 4.7 eV, depending on an amount of titanium (Ti) present in the Ti-rich titanium nitride (Ti-rich TiN). Therefore, the work function of the deposited Ti-rich titanium nitride (Ti-rich TiN) can be lowered by controlling the composition ratio of titanium (Ti), unlike the conventional art.
  • FIG. 4 is a flowchart illustrating a method of fabricating aluminum nitride according to an exemplary embodiment of the present invention.
  • AlN aluminum nitride
  • an aluminum (Al) precursor is provided (S 410 ).
  • the aluminum (Al) precursor trimethylaluminum (TMA), tritertiarybutylaluminum (TBA), or aluminum chloride (AlCl 3 ) may be used.
  • TMA trimethylaluminum
  • TSA tritertiarybutylaluminum
  • AlCl 3 aluminum chloride
  • aluminum (Al) has a low work function of about 4 eV to about 4.2 eV.
  • An NH 3 gas or plasma process is performed to nitrify the deposited aluminum (Al) (S 430 ).
  • a degree of nitrification of the aluminum (Al) is based on a partial pressure or a supply time of the NH 3 gas.
  • FIG. 5 shows a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 3 and 4 .
  • the metal nitride layer since the metal nitride layer, according to an exemplary embodiment of the present invention, uses Ti-rich titanium nitride (Ti-rich TiN), the Ti-rich TiN has a composition ratio of titanium (Ti) of more than about 0.5 to less than 1.
  • the content of Al:N in aluminum nitride (AlN) is 1:1, aluminum (Al) and nitrogen (N) all have a composition ratio of 0.5. Therefore, when Ti-rich TiN and AlN are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 5 .
  • FIG. 6 is a flowchart illustrating a method of fabricating titanium nitride according to an exemplary embodiment of the present invention.
  • titanium nitride (TiN) is fabricated through an ALD method, as shown in FIG. 6 .
  • a titanium (Ti) precursor is provided (S 610 ).
  • TEMATi, TDMATi, TiCl 4 , TiI 4 , or TiF 4 may be used.
  • a purge operation is performed to exhaust impurities (S 620 ).
  • an ammonia (NH 3 ) gas or plasma process is performed to nitrify the deposited titanium (Ti) (S 630 ).
  • the ammonia (NH 3 ) does not stoichiometrically affect a composition of titanium (Ti) and nitrogen (N), but rather, only reduces an amount of adsorbed titanium (Ti) precursor. Therefore, the NH 3 gas is a factor affecting the deposition rate.
  • a purge operation is performed again to exhaust impurities (S 640 ).
  • FIG. 7 is a flowchart illustrating a method of fabricating Al-rich aluminum nitride according to an exemplary embodiment of the present invention.
  • Al-rich aluminum nitride (Al-rich AlN) is also fabricated through an ALD method, as shown in FIG. 7 .
  • an aluminum (Al) precursor is provided (S 710 ).
  • TMA, TBA, or AlCl 3 may be used.
  • a hydrogen (H 2 ) plasma process is performed to remove ligands from the aluminum (Al) precursor (S 730 ).
  • a purge operation is performed to exhaust impurities (S 740 ).
  • the above-described process of four steps S 710 to S 740 may be performed multiple times to deposit aluminum (Al) to a desired thickness, as described above.
  • an ammonia (NH 3 ) gas or plasma process is performed to nitrify the deposited aluminum (Al) (S 750 ).
  • a degree of nitrification of the aluminum (Al) is based on a partial pressure or a supply time of the NH 3 gas.
  • Al-rich aluminum nitride (Al-rich AlN) has a work function of about 4.0 eV to about 4.2 eV. Therefore, the work function of the Al-rich aluminum nitride (Al-rich AlN) can be lowered by controlling a composition ratio of aluminum (Al), unlike the conventional art.
  • FIG. 8 shows a view illustrating a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 6 and 7 .
  • the metal nitride layer uses Al-rich aluminum nitride (Al-rich AlN), the Al-rich AlN has a composition ratio of aluminum (Al) of more than about 0.5 to less than 1.
  • the content of Ti:N in TIN is 1:1, titanium (Ti) and nitrogen (N) all have a composition ratio of 0.5. Therefore, when Al-rich AlN and TIN are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 8 .
  • FIG. 9 is a view illustrating a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 3 and 7 .
  • the metal nitride layer since the metal nitride layer, according to an exemplary embodiment of the present invention, uses TI-rich titanium nitride (Ti-rich TIN), a composition of titanium (Ti) has a composition ratio of more than about 0.5 to less than 1. Since the metal nitride layer, according to an exemplary embodiment of the present invention, uses Al-rich aluminum nitride (Al-rich AlN), a composition of aluminum (Al) has a composition ratio of more than about 0.5 to less than 1. Therefore, when Ti-rich titanium nitride (Ti-rich TiN) and Al-rich aluminum nitride (Al-rich AlN) are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 9 .
  • Ti-rich TiN Ti-rich TiN
  • Al-rich aluminum nitride Al-rich aluminum nitride
  • the metal nitride layer is formed by mixing Ti-rich titanium nitride (Ti-rich TiN), which has a work function that can be lowered, and Al-rich aluminum nitride (Al-rich AlN), which has a low work function. Therefore, the work function of the metal nitride layer can have a low work function, when compared with the conventional art.
  • Ti-rich TiN Ti-rich titanium nitride
  • Al-rich AlN Al-rich aluminum nitride
  • the methods of fabricating a metal nitride layer according to exemplary embodiments of the present invention may be applied to a process of fabricating a multicomponent-based metal nitride layer such as Ti—Si—N, Ta—Al—N, or Ta—Si—N, in addition to Ti—Al—N.
  • the semiconductor device 100 and the method of fabricating the same can, according to exemplary embodiments of the present invention, lower the work function of the metal nitride layer for the word line region 120 or the barrier metal layer 130 by controlling a composition of the metal nitride layer, so that reliability of the semiconductor device can be improved.

Abstract

A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate in which a word line region is formed, and a barrier metal layer arranged on the word line region and causing a Schottky junction. The barrier metal layer includes a first nitride material, in which a first material is nitrified, and a second nitride material, in which a second material is nitrified. The barrier metal layer is formed of a mixture of the first nitride material and the second nitride material. At least one of the first material or the second material is rich in a metal used to form the first nitride material or the second nitride material.

Description

    CROSS-REFERENCES TO RELATED APPLICATION
  • This application claims priority under 35 U.S.C. 119(a) to Korean application number 10-2011-0122303, filed on Nov. 22, 2011, in the Korean Patent Office, which is incorporated by reference in its entirety.
  • BACKGROUND OF THE INVENTION
  • 1. Technical Field
  • The inventive concept relates to a semiconductor device, and more particularly, to a semiconductor device and a method of fabricating the same.
  • 2. Related Art
  • With demands on low power consumption from memory devices, next-generation memory devices with non-volatility and non-refresh have been researched. Phase-change random access memory (PCRAMs), which are examples of such next-generation memory devices, store data using a resistance difference between an amorphous state and crystalline state of a phase-change layer (e.g., a chalcogenide compound) created by an electric pulse to the phase-change layer.
  • In conventional PCRAMs, a MOS transistor or a PN diode is employed as a switching element. When the MOS transistor is used as the switching element, improvement in integration of the PCRAM is limited. When the PN diode is used as the switching element, a plurality of PN diodes are electrically connected to each other through an N+ region formed in a surface of an active region. Thus, driving currents of cells are different from each other due to large resistance of the N+ region. Therefore, a PCRAM having an improved design and a method a manufacturing such an improved PCRAM is necessary.
  • In recent years, a Schottky diode has generally been used as the switching element of the conventional PCRAM.
  • The conventional PCRAM employs a metal word line on a semiconductor substrate and a Schottky diode formed on the word line.
  • The Schottky diode includes a barrier metal layer in contact with the word line and a P+ polysilicon layer formed on the barrier metal layer.
  • In the conventional PCRAM employing the Schottky diode, a height of the barrier metal layer has to be increased to control an off current and a work function of the barrier metal layer has to be lowered in order to increase the height of the barrier metal layer.
  • When the conventional PCRAM is fabricated, metal used for the word line or the barrier metal layer may include aluminum (Al), tungsten (W), titanium nitride (TiN), or copper (Cu). However, since a subsequent thermal process is performed at a temperature of 700° C. or more, it is difficult to use a metal material such as Al or Cu. Thus TiN is typically used as the metal for the word line or the barrier metal layer.
  • However, TiN has large work function, for example, approximately 4.7 eV to degrade performance of the PCRAM.
  • SUMMARY
  • One or more exemplary embodiments are provided to a semiconductor device capable of enhancing reliability thereof by improving characteristics of a metal nitride layer, which is one of materials forming the semiconductor device, and a method of manufacturing the same.
  • According to one aspect of an exemplary embodiment, there is a provided a semiconductor device. The semiconductor device may include: a semiconductor substrate in which a word line region is formed; and a barrier metal layer, formed of a metal nitride, arranged on the word line region and causing a Schottky junction, the barrier metal layer including: a first nitride material formed of a nitrified first material; and a second nitride material formed of a nitrified second material, where the barrier metal layer is formed of a mixture of the first nitride material and the second nitride material, and where any one of the first material or the second material is rich in a metal used to form the metal nitride.
  • According to another aspect of an exemplary embodiment, there is a provided a semiconductor device. The semiconductor device may include: a semiconductor substrate in which a word line region is formed; and a barrier metal layer, formed of a metal nitride, arranged on the word line region and causing a Schottky junction, the word line region including a first nitride material formed of a nitrified first material; and a second nitride material formed of a nitrified second material, where the word line region is formed of a mixture of the first nitride material and the second nitride material, and where at least one of the first material or the second material is rich in a metal used to form the metal nitride.
  • According to another aspect of an exemplary embodiment, there is a provided a method of fabricating a semiconductor device. The method may include: providing a semiconductor substrate in which a word line region is formed; depositing a first material on the word line region; forming a first nitride material by nitrifying the first material; determining whether the first nitride material has a desired thickness, where if the first nitride material has the desired thickness, then depositing a second material on the first nitride material, forming a second nitride material by nitrifying the second material, and determining whether the second nitride material is deposited to a desired thickness, where if the second nitride material has the desired thickness, then depositing a P+ polysilicon layer on the second nitride material, and where the first material or the second material is rich in a material used to form the first nitride material or the second nitride material.
  • According to another aspect of an exemplary embodiment, there is a provided a method of fabricating a semiconductor device. The semiconductor device may include: providing a semiconductor substrate; depositing a first material on the semiconductor substrate; nitrifying the first material to form a first nitride material; determining whether the first nitride material has a desired thickness, where if the first nitride material has the desired thickness, then depositing a second material on the first nitride material, nitrifying the second material to form a second nitride material, and determining whether the second nitride material is deposited to a desired thickness, where if the second nitride material has the desired thickness, then forming a barrier metal layer on the second nitride material; and depositing a P+ polysilicon layer on the barrier metal layer, where at least one of the first material and the second material is rich in a metal used to form the first nitride material or the second nitride material.
  • These and other features, aspects, and embodiments are described below in the section entitled “DETAILED DESCRIPTION”.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above and other aspects, features and other advantages of the subject matter of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
  • FIG. 1 is a view illustrating a portion of a semiconductor device according to an exemplary embodiment of the inventive concept;
  • FIG. 2 is a flowchart illustrating a method of fabricating a semiconductor device according to an exemplary embodiment of the inventive concept;
  • FIG. 3 is a flowchart illustrating a method of fabricating Ti-rich titanium nitride according to an exemplary embodiment of the inventive concept;
  • FIG. 4 is a flowchart illustrating a method of fabricating aluminum nitride according to an exemplary embodiment of the inventive concept;
  • FIG. 5 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 4 and 5;
  • FIG. 6 is a flowchart illustrating a method of fabricating titanium nitride according to an exemplary embodiment of the inventive concept;
  • FIG. 7 is a flowchart illustrating a method of fabricating Al-rich aluminum nitride according to an exemplary embodiment of the inventive concept;
  • FIG. 8 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 6 and 7; and
  • FIG. 9 is a view illustrating a composition region of Ti—Al—N formed through fabrication processes shown in FIGS. 3 and 7.
  • DETAILED DESCRIPTION
  • Hereinafter, exemplary embodiments will be described in greater detail with reference to the accompanying drawings.
  • Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of exemplary embodiments (and intermediate structures). As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, exemplary embodiments should not be construed as limited to the particular shapes of regions illustrated herein but may be to include deviations in shapes that result, for example, from manufacturing. In the drawings, lengths and sizes of layers and regions may be exaggerated for clarity. Like reference numerals in the drawings denote like elements. It is also understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other or substrate, or intervening layers may also be present.
  • FIG. 1 is a view illustrating a portion of a semiconductor device according to an exemplary embodiment of the present invention.
  • Referring to FIG. 1, a semiconductor device 100, according to an exemplary embodiment of the present invention, includes a word line region 120. The word line region 120 includes a metal layer or a metal nitride layer formed on a semiconductor substrate 110. Here, the semiconductor device 100 may be a PCRAM.
  • A barrier metal layer 130, which causes a Schottky junction, includes a metal nitride layer formed on the word line region 120.
  • An insulating layer 140 is formed on the barrier metal layer 130 and a P+ polysilicon layer 150 is formed in the insulating layer 140 and on the barrier metal layer corresponding to each of cells.
  • In the above-described semiconductor device 100, the metal nitride layer, constituting the word line region 120 and the barrier metal layer 130, may be formed by mixing a first nitride material, in which a first material is nitrified, and a second nitride material in which a second material is nitrified. At least one of the first material or the second material may be rich in a metal used to form the metal nitride layer. For example, the first material may be rich in titanium (Ti) and the second material may be rich in aluminum (Al). However, the first material and second material are not limited thereto and may include any material that is capable of forming a metal nitride layer.
  • The reason that a composition of the metal nitride layer constituting the word line region 120 and the barrier metal layer 130 is controlled is to lower a work function thereof. In particular, when the work function of the barrier metal layer 130 is lowered, an off current can be reduced and reliability of the semiconductor device can be improved.
  • A method of fabricating a semiconductor device 100 according to an exemplary embodiment of the present invention will be described in detail below.
  • FIG. 2 is a flowchart illustrating a method of fabricating a semiconductor device according to an exemplary embodiment of the present invention.
  • Referring to FIG. 2, a method of fabricating a semiconductor device according to an exemplary embodiment of the present invention includes providing a semiconductor substrate 110 (S210). A word line region 120, including a metal layer or a metal nitride layer, is formed on the semiconductor substrate 110 (S220).
  • Then, a barrier metal layer 130 is formed in the word line region 120. A method of forming the barrier metal layer 130 will now be described.
  • A first material is deposited and nitrified on the word line region 120 to form a first nitride material (S230). As described above, the first material may include titanium (Ti). The first nitride material may include a Ti-rich titanium nitride (Ti-rich TN) or a titanium nitride (TiN) in which Ti and N are mixed at a ratio of Ti:N of 1:1.
  • Then, it is determined whether or not the first nitride material is formed to a desired thickness (S240). If the first nitride material is formed to the desired thickness, then a second material is deposited and nitrified on the first nitride material to form a second nitride material (S250). As described above, the second material may include aluminum (Al). The second nitride material may include Al-rich aluminum nitride (Al-rich Al—N) or aluminum nitride (TiN) in which Al and N are mixed at a ratio of Al:N of 1:1.
  • Then, it is determined whether or not the second nitride material is deposited to a desired thickness (S255). If it is determined that the second nitride material is formed to the desired thicknesses, then a P+ polysilicon is deposited on the second nitride material to form a P+ polysilicon layer (S260).
  • If it is determined that the first nitride material or the second nitride material is not formed to the desired thicknesses, then the process of depositing the first material and nitrifying the first material to form the first nitride material (S230) or the processes of depositing the second material and nitrifying the second material to form the second nitride material (S250) is repeated until the first nitride material or the second nitride material achieves the desired thickness.
  • In the method of fabricating a semiconductor device according to an exemplary embodiment of the present invention, the example in which the barrier metal layer 130 includes a composition-controlled metal nitride layer has been described. However, the composition control may also be applied to the process of forming the word line region 120, as set forth below.
  • The metal nitride layer constituting the word line region 120 or the barrier metal layer 130 is formed through a process which will now be described in detail with reference to FIGS. 3 to 6.
  • FIG. 3 is a flowchart illustrating a method of fabricating a Ti-rich titanium nitride according to an exemplary embodiment of the present invention.
  • In an exemplary embodiment of the present invention, the Ti-rich titanium nitride (Ti-rich TIN), may be fabricated, for example, using an atomic layer deposition (ALD) method shown in FIG. 3.
  • First, a titanium (Ti) precursor is provided (S310). As the titanium (Ti) precursor, Ti(NEtMe)4 (TEMATi), tetrakis(dimethylamino)titanium I (TDMATi), titanium chloride (TiCl4), titanium iodide (TiI4), or titanium fluoride (TiF4) may be used.
  • Then, a purge operation is performed to exhaust impurities (S320).
  • A hydrogen (H2) plasma process is performed to remove ligands from the titanium (Ti) precursor (S330).
  • Next, a purge process is performed again to exhaust impurities (S340). The above-described process of four steps S310 to S340 may be performed multiple times to form titanium (Ti) to a desired thickness, as described above.
  • Subsequently, an ammonia (NH3) gas or plasma process is performed to nitrify the deposited titanium (Ti) (S350). A degree of nitrification of the titanium (Ti) is determined based on a partial pressure or a supply time of the NH3 gas.
  • The Ti-rich titanium nitride (Ti-rich TiN) has a work function of around 4.3 eV to around 4.7 eV, depending on an amount of titanium (Ti) present in the Ti-rich titanium nitride (Ti-rich TiN). Therefore, the work function of the deposited Ti-rich titanium nitride (Ti-rich TiN) can be lowered by controlling the composition ratio of titanium (Ti), unlike the conventional art.
  • FIG. 4 is a flowchart illustrating a method of fabricating aluminum nitride according to an exemplary embodiment of the present invention.
  • In an exemplary embodiment of the present invention, aluminum nitride (AlN) is also fabricated through an ALD method, as shown in FIG. 4.
  • First, an aluminum (Al) precursor is provided (S410). As the aluminum (Al) precursor, trimethylaluminum (TMA), tritertiarybutylaluminum (TBA), or aluminum chloride (AlCl3) may be used. Here, aluminum (Al) has a low work function of about 4 eV to about 4.2 eV.
  • Then, a purge operation is performed to exhaust impurities (S420).
  • An NH3 gas or plasma process is performed to nitrify the deposited aluminum (Al) (S430). A degree of nitrification of the aluminum (Al) is based on a partial pressure or a supply time of the NH3 gas.
  • Next, a purge operation is performed to exhaust impurities (S440).
  • FIG. 5 shows a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 3 and 4.
  • As shown in FIG. 5, since the metal nitride layer, according to an exemplary embodiment of the present invention, uses Ti-rich titanium nitride (Ti-rich TiN), the Ti-rich TiN has a composition ratio of titanium (Ti) of more than about 0.5 to less than 1. The content of Al:N in aluminum nitride (AlN) is 1:1, aluminum (Al) and nitrogen (N) all have a composition ratio of 0.5. Therefore, when Ti-rich TiN and AlN are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 5.
  • FIG. 6 is a flowchart illustrating a method of fabricating titanium nitride according to an exemplary embodiment of the present invention.
  • In an exemplary embodiment of the present invention, titanium nitride (TiN) is fabricated through an ALD method, as shown in FIG. 6.
  • First, a titanium (Ti) precursor is provided (S610). As the titanium (Ti) precursor, TEMATi, TDMATi, TiCl4, TiI4, or TiF4 may be used.
  • A purge operation is performed to exhaust impurities (S620).
  • Next, an ammonia (NH3) gas or plasma process is performed to nitrify the deposited titanium (Ti) (S630). The ammonia (NH3) does not stoichiometrically affect a composition of titanium (Ti) and nitrogen (N), but rather, only reduces an amount of adsorbed titanium (Ti) precursor. Therefore, the NH3 gas is a factor affecting the deposition rate.
  • A purge operation is performed again to exhaust impurities (S640).
  • FIG. 7 is a flowchart illustrating a method of fabricating Al-rich aluminum nitride according to an exemplary embodiment of the present invention.
  • In an exemplary embodiment of the present invention, Al-rich aluminum nitride (Al-rich AlN) is also fabricated through an ALD method, as shown in FIG. 7.
  • First, an aluminum (Al) precursor is provided (S710). As the aluminum (Al) precursor, TMA, TBA, or AlCl3 may be used.
  • Then, a purge operation is performed to exhaust impurities (S720).
  • A hydrogen (H2) plasma process is performed to remove ligands from the aluminum (Al) precursor (S730).
  • Next, a purge operation is performed to exhaust impurities (S740). The above-described process of four steps S710 to S740 may be performed multiple times to deposit aluminum (Al) to a desired thickness, as described above.
  • Subsequently, an ammonia (NH3) gas or plasma process is performed to nitrify the deposited aluminum (Al) (S750). A degree of nitrification of the aluminum (Al) is based on a partial pressure or a supply time of the NH3 gas.
  • The Al-rich aluminum nitride (Al-rich AlN) has a work function of about 4.0 eV to about 4.2 eV. Therefore, the work function of the Al-rich aluminum nitride (Al-rich AlN) can be lowered by controlling a composition ratio of aluminum (Al), unlike the conventional art.
  • FIG. 8 shows a view illustrating a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 6 and 7.
  • As shown in FIG. 8, since the metal nitride layer, according to an exemplary embodiment of the present invention, uses Al-rich aluminum nitride (Al-rich AlN), the Al-rich AlN has a composition ratio of aluminum (Al) of more than about 0.5 to less than 1. The content of Ti:N in TIN is 1:1, titanium (Ti) and nitrogen (N) all have a composition ratio of 0.5. Therefore, when Al-rich AlN and TIN are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 8.
  • FIG. 9 is a view illustrating a composition region of Ti—Al—N formed through the fabrication processes of FIGS. 3 and 7.
  • As shown in FIG. 9, since the metal nitride layer, according to an exemplary embodiment of the present invention, uses TI-rich titanium nitride (Ti-rich TIN), a composition of titanium (Ti) has a composition ratio of more than about 0.5 to less than 1. Since the metal nitride layer, according to an exemplary embodiment of the present invention, uses Al-rich aluminum nitride (Al-rich AlN), a composition of aluminum (Al) has a composition ratio of more than about 0.5 to less than 1. Therefore, when Ti-rich titanium nitride (Ti-rich TiN) and Al-rich aluminum nitride (Al-rich AlN) are mixed, the Ti—Al—N has a composition region A, as shown in FIG. 9.
  • In particular, the metal nitride layer, described in FIG. 9, is formed by mixing Ti-rich titanium nitride (Ti-rich TiN), which has a work function that can be lowered, and Al-rich aluminum nitride (Al-rich AlN), which has a low work function. Therefore, the work function of the metal nitride layer can have a low work function, when compared with the conventional art.
  • The methods of fabricating a metal nitride layer according to exemplary embodiments of the present invention may be applied to a process of fabricating a multicomponent-based metal nitride layer such as Ti—Si—N, Ta—Al—N, or Ta—Si—N, in addition to Ti—Al—N.
  • The semiconductor device 100 and the method of fabricating the same can, according to exemplary embodiments of the present invention, lower the work function of the metal nitride layer for the word line region 120 or the barrier metal layer 130 by controlling a composition of the metal nitride layer, so that reliability of the semiconductor device can be improved.
  • While certain embodiments have been described above, it will be understood that the embodiments described are by way of example only. Accordingly, the devices and methods described herein should not be limited based on the described embodiments. Rather, the systems and methods described herein should only be limited in light of the claims that follow when taken in conjunction with the above description and accompanying drawings.

Claims (4)

1. A semiconductor device, comprising:
a semiconductor substrate in which a word line region is formed; and
a barrier metal layer, formed of a metal nitride, arranged on the word line region and causing a Schottky junction, the barrier metal layer including:
a first nitride material formed of a nitrified first material; and
a second nitride material formed of a nitrified second material,
wherein the barrier metal layer is formed of a mixture of the first nitride material and the second nitride material, and
where any one of the first material or the second material is rich in a metal used to form the metal nitride.
2. The semiconductor device of claim 1, wherein the first material is titanium (Ti) and the second material is aluminum (Al).
3. The semiconductor device of claim 2, wherein the first nitride material and the second nitride material include nitride materials deposited by atomic layer deposition (ALD.
4-26. (canceled)
US14/799,099 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same Abandoned US20150318329A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/799,099 US20150318329A1 (en) 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20110122303A KR20130056608A (en) 2011-11-22 2011-11-22 Phase-change random access memory device and method of manufacturing the same
KR10-2011-0122303 2011-11-22
US13/599,489 US9112137B2 (en) 2011-11-22 2012-08-30 Semiconductor device and method of fabricating the same
US14/799,099 US20150318329A1 (en) 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US13/599,489 Division US9112137B2 (en) 2011-11-22 2012-08-30 Semiconductor device and method of fabricating the same

Publications (1)

Publication Number Publication Date
US20150318329A1 true US20150318329A1 (en) 2015-11-05

Family

ID=48425919

Family Applications (3)

Application Number Title Priority Date Filing Date
US13/599,489 Active 2033-03-04 US9112137B2 (en) 2011-11-22 2012-08-30 Semiconductor device and method of fabricating the same
US14/799,099 Abandoned US20150318329A1 (en) 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same
US14/799,156 Abandoned US20150318330A1 (en) 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US13/599,489 Active 2033-03-04 US9112137B2 (en) 2011-11-22 2012-08-30 Semiconductor device and method of fabricating the same

Family Applications After (1)

Application Number Title Priority Date Filing Date
US14/799,156 Abandoned US20150318330A1 (en) 2011-11-22 2015-07-14 Semiconductor device and method of fabricating the same

Country Status (3)

Country Link
US (3) US9112137B2 (en)
KR (1) KR20130056608A (en)
CN (1) CN103137864A (en)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9611544B2 (en) 2010-04-15 2017-04-04 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US9373500B2 (en) 2014-02-21 2016-06-21 Lam Research Corporation Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
US9892917B2 (en) 2010-04-15 2018-02-13 Lam Research Corporation Plasma assisted atomic layer deposition of multi-layer films for patterning applications
US9997357B2 (en) 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US8637411B2 (en) 2010-04-15 2014-01-28 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US9685320B2 (en) 2010-09-23 2017-06-20 Lam Research Corporation Methods for depositing silicon oxide
US9112003B2 (en) 2011-12-09 2015-08-18 Asm International N.V. Selective formation of metallic films on metallic surfaces
JP6538300B2 (en) 2012-11-08 2019-07-03 ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated Method for depositing a film on a sensitive substrate
TWI661072B (en) 2014-02-04 2019-06-01 荷蘭商Asm Ip控股公司 Selective deposition of metals, metal oxides, and dielectrics
US9214334B2 (en) * 2014-02-18 2015-12-15 Lam Research Corporation High growth rate process for conformal aluminum nitride
US10047435B2 (en) 2014-04-16 2018-08-14 Asm Ip Holding B.V. Dual selective deposition
US10643925B2 (en) 2014-04-17 2020-05-05 Asm Ip Holding B.V. Fluorine-containing conductive films
US9564312B2 (en) 2014-11-24 2017-02-07 Lam Research Corporation Selective inhibition in atomic layer deposition of silicon-containing films
US10014383B2 (en) * 2014-12-17 2018-07-03 Infineon Technologies Ag Method for manufacturing a semiconductor device comprising a metal nitride layer and semiconductor device
US9490145B2 (en) 2015-02-23 2016-11-08 Asm Ip Holding B.V. Removal of surface passivation
US10566187B2 (en) 2015-03-20 2020-02-18 Lam Research Corporation Ultrathin atomic layer deposition film accuracy thickness control
US9502238B2 (en) 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch
US10428421B2 (en) 2015-08-03 2019-10-01 Asm Ip Holding B.V. Selective deposition on metal or metallic surfaces relative to dielectric surfaces
US10121699B2 (en) 2015-08-05 2018-11-06 Asm Ip Holding B.V. Selective deposition of aluminum and nitrogen containing material
US10566185B2 (en) * 2015-08-05 2020-02-18 Asm Ip Holding B.V. Selective deposition of aluminum and nitrogen containing material
CN106558482B (en) * 2015-09-25 2019-12-24 中芯国际集成电路制造(上海)有限公司 Semiconductor device and manufacturing method thereof
US10695794B2 (en) 2015-10-09 2020-06-30 Asm Ip Holding B.V. Vapor phase deposition of organic films
US11081342B2 (en) 2016-05-05 2021-08-03 Asm Ip Holding B.V. Selective deposition using hydrophobic precursors
US10373820B2 (en) 2016-06-01 2019-08-06 Asm Ip Holding B.V. Deposition of organic films
US10453701B2 (en) 2016-06-01 2019-10-22 Asm Ip Holding B.V. Deposition of organic films
US9803277B1 (en) 2016-06-08 2017-10-31 Asm Ip Holding B.V. Reaction chamber passivation and selective deposition of metallic films
US9773643B1 (en) 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10062563B2 (en) 2016-07-01 2018-08-28 Lam Research Corporation Selective atomic layer deposition with post-dose treatment
US10037884B2 (en) 2016-08-31 2018-07-31 Lam Research Corporation Selective atomic layer deposition for gapfill using sacrificial underlayer
US11430656B2 (en) 2016-11-29 2022-08-30 Asm Ip Holding B.V. Deposition of oxide thin films
US11094535B2 (en) 2017-02-14 2021-08-17 Asm Ip Holding B.V. Selective passivation and selective deposition
US10170321B2 (en) * 2017-03-17 2019-01-01 Applied Materials, Inc. Aluminum content control of TiAIN films
US11501965B2 (en) 2017-05-05 2022-11-15 Asm Ip Holding B.V. Plasma enhanced deposition processes for controlled formation of metal oxide thin films
KR20200007823A (en) 2017-05-16 2020-01-22 에이에스엠 아이피 홀딩 비.브이. Selective PEALD of Oxide on Dielectric
US10900120B2 (en) 2017-07-14 2021-01-26 Asm Ip Holding B.V. Passivation against vapor deposition
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
JP7146690B2 (en) 2018-05-02 2022-10-04 エーエスエム アイピー ホールディング ビー.ブイ. Selective layer formation using deposition and removal
JP2020056104A (en) 2018-10-02 2020-04-09 エーエスエム アイピー ホールディング ビー.ブイ. Selective passivation and selective deposition
TWI807195B (en) 2019-06-28 2023-07-01 美商應用材料股份有限公司 Fluorine-doped nitride films for improved high-k reliability
US11139163B2 (en) 2019-10-31 2021-10-05 Asm Ip Holding B.V. Selective deposition of SiOC thin films
TW202140833A (en) 2020-03-30 2021-11-01 荷蘭商Asm Ip私人控股有限公司 Selective deposition of silicon oxide on dielectric surfaces relative to metal surfaces
TW202204658A (en) 2020-03-30 2022-02-01 荷蘭商Asm Ip私人控股有限公司 Simultaneous selective deposition of two different materials on two different surfaces
TW202140832A (en) 2020-03-30 2021-11-01 荷蘭商Asm Ip私人控股有限公司 Selective deposition of silicon oxide on metal surfaces

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030091871A1 (en) * 2001-10-10 2003-05-15 Semiconductor Energy Laboratory Co., Ltd. Film, packaging material, container, lens, window, spectacles, recording medium, and deposition apparatus
US20100176368A1 (en) * 2009-01-14 2010-07-15 Ko Nikka Method of manufacturing semiconductor memory device, and semiconductor memory device
US20110017997A1 (en) * 2009-05-28 2011-01-27 Arvind Kamath Diffusion Barrier Coated Substrates and Methods of Making the Same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100368311B1 (en) * 2000-06-27 2003-01-24 주식회사 하이닉스반도체 Method of forming a gate in a semiconductor device
US7847344B2 (en) * 2002-07-08 2010-12-07 Micron Technology, Inc. Memory utilizing oxide-nitride nanolaminates
US7335958B2 (en) * 2003-06-25 2008-02-26 Micron Technology, Inc. Tailoring gate work-function in image sensors
US7807995B2 (en) * 2006-07-27 2010-10-05 Panasonic Corporation Nonvolatile semiconductor memory apparatus and manufacturing method thereof
KR100827661B1 (en) * 2006-10-31 2008-05-07 삼성전자주식회사 Phase change memory devices having dual lower electrodes and methods fabricating the same
US7994536B2 (en) * 2008-02-19 2011-08-09 Qimonda Ag Integrated circuit including U-shaped access device
WO2010026625A1 (en) * 2008-09-02 2010-03-11 株式会社 東芝 Nonvolatile semiconductor memory device
KR20110011779A (en) * 2009-07-29 2011-02-09 주식회사 하이닉스반도체 Method of manufacturing phase change memory device improved gap-fill property between diodes
US8686419B2 (en) * 2010-02-23 2014-04-01 Sandisk 3D Llc Structure and fabrication method for resistance-change memory cell in 3-D memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030091871A1 (en) * 2001-10-10 2003-05-15 Semiconductor Energy Laboratory Co., Ltd. Film, packaging material, container, lens, window, spectacles, recording medium, and deposition apparatus
US20100176368A1 (en) * 2009-01-14 2010-07-15 Ko Nikka Method of manufacturing semiconductor memory device, and semiconductor memory device
US20110017997A1 (en) * 2009-05-28 2011-01-27 Arvind Kamath Diffusion Barrier Coated Substrates and Methods of Making the Same

Also Published As

Publication number Publication date
US20130126815A1 (en) 2013-05-23
CN103137864A (en) 2013-06-05
KR20130056608A (en) 2013-05-30
US9112137B2 (en) 2015-08-18
US20150318330A1 (en) 2015-11-05

Similar Documents

Publication Publication Date Title
US9112137B2 (en) Semiconductor device and method of fabricating the same
US9355837B2 (en) Methods of forming and using materials containing silicon and nitrogen
US7473637B2 (en) ALD formed titanium nitride films
US8802453B2 (en) Phase change random access memory and method for manufacturing the same
US8395137B2 (en) Memory cell constructions
US20090321708A1 (en) Phase change memory device having protective layer and method for manufacturing the same
US11805714B2 (en) Phase change memory with conductive bridge filament
US8148231B2 (en) Method of fabricating capacitor
US20210359205A1 (en) Method of forming chalcogenide-based thin film using atomic layer deposition process, method of forming phase change material layer and switching device, and method of fabricating memory device using the same
US8802536B2 (en) Phase-change memory device and method of fabricating the same
Dingemans et al. Merits of batch ALD
US10930848B2 (en) Variable resistance memory device and method of manufacturing the same
US8921822B2 (en) Phase-change random access memory device and method of manufacturing the same
US20220336673A1 (en) Oxide electrode for device with polarizable material layer
KR20140003189A (en) Multicomponent dielectric layer and capacitor having the same
KR102529144B1 (en) Method of forming chalcogenide-based thin film using atomic layer deposition process, method of forming switching device using the same and method of manufacturing memory device
US20220310917A1 (en) Encapsulation layer for chalcogenide material
US20230301073A1 (en) Semiconductor device with programmable element and method for fabricating the same
KR101094996B1 (en) Fabricating of phase change random access memory and fabricating thereof
KR101050863B1 (en) Method of forming diffusion barrier in semiconductor device
KR20210142320A (en) Method of forming chalcogenide-based thin film using atomic layer deposition process, method of forming phase change material layer using the same and method of fabricating phase change memory device
KR20120140398A (en) Phase-change random access memory device and method of manufacturing the same

Legal Events

Date Code Title Description
AS Assignment

Owner name: SK HYNIX INC., KOREA, REPUBLIC OF

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KIM, JIN HYOCK;LEE, KEUN;KWON, YOUNG SEOK;REEL/FRAME:036081/0893

Effective date: 20150625

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION