US20060219654A1 - Silicon substrate comprising positive etching profiles with a defined slope angle, and production method - Google Patents
Silicon substrate comprising positive etching profiles with a defined slope angle, and production method Download PDFInfo
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- US20060219654A1 US20060219654A1 US10/553,728 US55372804A US2006219654A1 US 20060219654 A1 US20060219654 A1 US 20060219654A1 US 55372804 A US55372804 A US 55372804A US 2006219654 A1 US2006219654 A1 US 2006219654A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
- H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00103—Structures having a predefined profile, e.g. sloped or rounded grooves
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00555—Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
- B81C1/00563—Avoid or control over-etching
- B81C1/00571—Avoid or control under-cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/03—Static structures
- B81B2203/0323—Grooves
- B81B2203/033—Trenches
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2203/00—Basic microelectromechanical structures
- B81B2203/03—Static structures
- B81B2203/0369—Static structures characterized by their profile
- B81B2203/0384—Static structures characterized by their profile sloped profile
Definitions
- Numerous devices of the micro-system technology are produced on the basis of structured silicon substrates. This concerns in particular devices of the micro-mechanics, the micro-fluidic field and the power electronics.
- the process of silicon structuring is an important aspect in connection with the production of components.
- microstructures Since the position of the crystal planes is fixed according to angle and grid, the realization possibilities for microstructures are substantially limited relative to lateral shape and cross-sectional shape of the etched trenches.
- An anisotropy of the etching process can be obtained in the following way amongst others:
- the lateral etching is prevented by passivation of the side wall.
- the composition of the etching gas is adjusted thus for this purpose that during the etching process also such chemical reactions occur, which reactions lead to the covering of the side walls with etch resistant layers, compare I. W. Ragelow, H. Loeschner: journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399 and K.-M. Chang, T.-H. Yeh, I.-C. Deng, H.-C. Lin: journal of applied physics—Sep. 1, 1996, volume 80, issue 5, 3048-3055.
- etching gas Frequently a mixture of SF 6 and oxygen is employed as an etching gas.
- the silicon reacts with the oxygen species to SiO 2 in the structures.
- the oxygen layer is quick to be again removed at the floor by fluorine radicals supported by ion impact as compared with the side walls, such that the etching process obtains a preferred direction.
- An optimum ratio between sufficient side wall passivation and high etching speed is very difficult to adjust.
- the control of the passivation limits the achievable etching depth, compare I. W. Rangelow, H. Loeschner: Journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399 and others.
- a high concentration of reactive etching species is the precondition to obtain high etching speeds. In this case however, a more intense etching attack occurs also on the side walls. The probability of spontaneous reactions between silicon and fluorine at the side walls is reduced drastically by cooling of the substrates to temperatures of about ⁇ 110 degrees centigrade. The lateral etching rate decreases together with the chemical reaction rate. However, an intensive ion impact occurs at the floor of the structures. This intensive ion impact generates radical places and excites reactive particles such that chemical reactions occur furthermore. A clearly increased vertical etching rate results therefrom, compare, compare I. W. Rangelow, H. Loeschner: Journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399.
- the ASE process is based on a known method according to the German printed Patent document DE 4241045 C1, which was developed by Laermer and Schilp.
- a cyclical process is here concerned, wherein the cyclical process is composed out of alternating deposition steps and etching steps.
- a passivation of the complete substrate surface occurs during the deposition interval by deposition of a polymer layer.
- the polymer layer is removed on all horizontal planes by ion impact.
- the silicon laid bare reacts with fluorine to volatile reaction products at the floor of the structures.
- FIG. 1 A typical structure is illustrated in FIG. 1 .
- the object of the Invention comprises to disclose a solution by way of which positive etching profiles with a defined slope angle ⁇ of the side walls can be generated.
- the object is achieved with the silicon substrate with the features stated in claim 1 .
- the object is achieved by a method with the features recited in claim 2 .
- the silicon substrate covered the mask is etched iso-tropically such that the mask under etching u is approximately equal to the etching depth A t , in the following the etching depth is enlarged to such an extent that the mask under etching remains constant and the etching front obtains a new course, wherein the side walls of the structure are covered with a polymer in this step, whereupon the polymer is removed from the side walls of the structure.
- the previously recited steps are repeated as many times until the desired etching profile and the desired etching depth are generated.
- the method according to the present Invention is a plasma etching process (PPE-process—positive profile etching process) which allows to structure silicon substrates such that thereby positive etching profiles are generated.
- PPE-process positive profile etching process
- the slope angle of the side walls of the etched structures can be defined adjusted in the region between 60 degrees and 88 degrees by suitable selection of the process parameters. Etching rates of three to five micrometers per minute and etching depth up to 200 ⁇ m can be obtained depending on the aspect ratio, on the opened (that is to be etched) face and on the process variation. A limitation of the reachable etching depth results only from the standing time of the etching masks, however not from process associated parameters.
- FIG. 1 a typical structure according to an iso-tropic etching process in pure SF 6 plasma
- FIG. 2 a structure generated by the ASE-process
- FIG. 3 a desired etching profile with defined slope angle ⁇
- FIG. 4 a schematic construction of a plasma etching plant
- FIG. 5 a silicon wafer with an etching mask
- FIG. 6 a result of the iso-tropic silicon etching in pure SF 6 plasma
- FIG. 7 a result after iso-tropic silicon etching and followed by a modified ASE process
- FIG. 8 a laying bare of the side walls of the edge structure with a O 2 -plasma
- FIG. 9 a presentation of the dependence of the slope angle of the edge structure from the time ratio Z
- FIG. 18 an embossing tool out of silicon
- FIG. 19 two structures made in silicon with a Y-shaped etching profile
- FIG. 20 a silicon structure for liquid storage cells
- FIG. 21 a trench in silicon with slightly inclined side walls
- FIG. 22 a metal bridge structure on silicon
- FIG. 24 a Cu-bridge laid bare
- FIGS. 1 and 2 serve for illustrating the state-of-the-art.
- FIG. 1 shows a typical structure according to an iso-tropic etching process in a pure SF 6 -plasma.
- FIG. 2 shows a structure generated by the ASE-process.
- FIG. 3 shows schematically the desired positive etched profile with the illustrated slope angle ⁇ .
- a plasma etching plant of the company Surface Technology Systems Ltd. (STS), Great Britain is suitable for performing the structuring of the silicon substrate according to the present Invention as illustrated in FIG. 3 .
- Such a plant is the schematically illustrated in FIG. 4 .
- Nitrogen (N 2 ), oxygen (O 2 ), argon (Ar), tetra fluoro methane (CF 4 ), sulfur hexa fluoride (SF 6 ) and octa fluoro cyclo butane (C 4 F 8 ) can be fed in as process gases through a gas inlet port 7 .
- a main component of the plant is the highly sealed ICP-plasma source 6 , wherein a high frequency power of maximum one kilo Watt can be coupled into the ICP-plasma source 6 .
- the substrate electrode is capable of being biased and can be charged with a high frequency power of maximum 300 watts.
- An adapter network 8 and a high frequency generator 9 are furnished for this purpose. In each case the frequency amounts to 13.56 MHz. The performance of cyclical processes is possible at the plant.
- etching depth can be performed with the aid of a surface profile meter of the company TENCOR INSTRUMENTS with an accuracy of plus minus 5 nm.
- the method according to the present Invention is performed cyclically.
- the method is composed out of three steps, wherein the three steps are repeated always in the same sequence.
- the method exhibits the following course.
- the silicon substrate is furnished with an etching mask as shown in FIG. 5 .
- mask materials such as photo resist, thermal silicon oxide (SiO 2 ), photo resist and SiO 2 combined as well as metal masks of aluminum or copper are employed.
- the silicon substrate is iso-tropically etched in a pure SF 6 -plasma according to the representation shown in FIG. 6 .
- the mask under etching u is approximately equal to the etching depth A t .
- the silicon substrate is subjected to a modified ASE-process as shown in FIG. 7 . Since the ASE-process etches absolutely vertically, thereby the etching depth is increased but the mask under etching remains constant, and the etching front obtains a new course.
- the side walls of the structures are covered with a polymer according to the ASE-process.
- the method steps 1 to 3 are now repeated so many times until the desired etching depth has been reached.
- the etching fonts which result from the two silicon etching processes according to the steps a) and b
- the process parameters for each interval are contained in table 1.
- the parameters of the modified ASE-process are disposed opposite to those of the known Bosch process in table 2.
- a reproducible setting of a desired slope angle is possible by the selection of suitable time ratio Z for the steps 1 and 2 .
- Z t SF6 ⁇ - ⁇ RIE t ASE ⁇ ( modified )
- FIG. 9 shows this relationship.
- the FIGS. 10 to 17 show examples for real structures with the decreasing slope angle ⁇ , which were correspondingly etched.
- Structured silicon substrates can be employed as molds for the casting of devices of polymers or other substances capable of being cast.
- the result of the silicon structuring is of decisive importance for the capabilities of separating the cast parts from the mold.
- the slope angles of the side walls smaller than 90 degrees alleviate the removal of the formed parts substantially.
- FIG. 18 shows a silicon structure with a slope angle of 88 degrees, where the silicon structure is suitable as an embossing tool for the production of polymer parts with channel structures for medical technology.
- Micro-fluidic devices contain frequently channel systems and nozzles, where the channel systems and nozzles are generated by corresponding structuring of silicon substrates. Increasingly the requirement exists in this context to realize structures with complex lateral forms and vertical forms. This contains amongst others the generation of structures with composed etching profile all of etching profiles with alternating slope angle. Examples for this are shown in FIGS. 19 a ) and b ).
- Storage sells for liquids can for example have a shape as is the shown in FIG. 20 .
- the illustrated structures have also been generated by the method according to the present Invention.
- the trenches are etched into silicon in the context of the production of devices of the power electronics, wherein the trenches are in the following covered with dielectrics or, respectively, are filled with metals. Capacitors or through contacts are to be generated in this manner.
- the homogeneous coating and void free filling of the trenches is alleviated, if the slope angle is disposed between 85 and 88 degrees.
- FIG. 21 shows an example for such a trench.
Abstract
The invention relates to a silicon substrate comprising positive etching profiles with defined slope angle. Said silicon substrate is obtained by etching the silicon substrate that is covered with a mask and by carrying out the following steps: a) the silicon substrate is isotropically etched, the undercut u of the mask being approximately identical to the etching depht At; b) the etching depth is increased by means of anisotropic etching in alternating etching steps and polynerization steps during which the undercut of the mask remains constant and the etching front follows a new course, the sidewalls of the structure being coated with a polymer in said step; c) the polymer is removed from the structure; and d) steps a) to c) are repeated until the predefined etching profile has been obtained. Also disclosed is a method.
Description
- The invention relates to a silicon substrate with positive etching profiles with a defined slope angle. The invention concerns furthermore a method for the production of a silicon substrate with a positive etching profile with a defined slope angle.
- The following can be generated with this method:
-
- silicon casting molds or silicon embossing tools for the production of polymer mold parts
- micro-fluid devices with channel systems and nozzles
- devices of power electronics with trench structures
- special bridge structures for devices of the electron microscopy or the like.
- Numerous devices of the micro-system technology are produced on the basis of structured silicon substrates. This concerns in particular devices of the micro-mechanics, the micro-fluidic field and the power electronics. The process of silicon structuring is an important aspect in connection with the production of components.
- The wet chemical etching of silicon substrates is described in the document J. P. John et al.: Journal electrochemical society, volume 140, No. 9 (1993), 2622-2625. For example mixtures of nitric acid (HNO3), fluoric acid (HF) and water can be employed for this purpose. The etching process runs completely iso-tropic in this case, that is the mask under etching is nearly as large as the etching depth. Limits for the application of this method result from the advancing minimization of the lateral structural dimensions, which minimization results from the requirement of increasing miniaturerization of the device elements of the micro-system technology.
- An aniso-tropic wet chemical structuring of silicon according to H. Seidel, L. Csepregi, A. Heuberger, H. Baumgaertel: Journal electrochemical society, volume 137, No. 11, November 1990, 3612-3632, 4, respectively, B. Kim, D. D. Cho: Journal electrochemical society, volume 145, No. 7, July 1998, 2499-2508 is possible by employment of an alkaline etching solution preferring directions, such as potassium hydroxide, lithium hydroxide, or sodium hydroxide. The non iso-tropic character of the etching is based on the different dissolution speeds of the silicon in the various crystal planes. The <111>-plane is most slowly abraded and therefore operates as a structural limitation. During etching of <100>-silicon thus there result frustrated pyramid like recesses where the (111)-faces form the structural walls with a defined angle of 54.74 degrees. With a structural width bM in the etching mask, there can be achieved a maximum etching depth At of
- Since the position of the crystal planes is fixed according to angle and grid, the realization possibilities for microstructures are substantially limited relative to lateral shape and cross-sectional shape of the etched trenches.
- Various plasma supported silicon etching processes have been developed in connection with the quick development of semiconductor technology. A multitude of possible plant concepts for plasma etching plants and a multitude of process parameters enable the variation of the etching processes over a wide region. The plasma etching processes are associated in principle and in particular with the advantage, that an iso-tropic structuring is possible independent of the crystal orientation.
- Plasma chemical silicon etch processes are based in most cases on the chemistry of fluorine. If silicon is etched for example in pure SF6 plasma (SF6: sulfur hexa fluoride), then the process runs usually iso-tropical, such that the mask under etching is approximately equal to the etching depth, compare H. von Boenig: Fundamentals of plasma chemistry and technology, p. 174, The research Institute of plasma chemistry and technology Carlsbad, Calif.
- An anisotropy of the etching process can be obtained in the following way amongst others:
- Employment of Chlorine-Bromine-Fluorine Chemistry
- The lateral etching is prevented by passivation of the side wall. The composition of the etching gas is adjusted thus for this purpose that during the etching process also such chemical reactions occur, which reactions lead to the covering of the side walls with etch resistant layers, compare I. W. Ragelow, H. Loeschner: journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399 and K.-M. Chang, T.-H. Yeh, I.-C. Deng, H.-C. Lin: journal of applied physics—Sep. 1, 1996,
volume 80,issue 5, 3048-3055. - The high expenditure for the safety technology as well as gas furnishing and gas discharge for assuring compatibility with the environment is a problem associated with this method.
- Employment of Fluorine Chemistry in Connection with Oxygen
- Frequently a mixture of SF6 and oxygen is employed as an etching gas. The silicon reacts with the oxygen species to SiO2 in the structures. The oxygen layer is quick to be again removed at the floor by fluorine radicals supported by ion impact as compared with the side walls, such that the etching process obtains a preferred direction. An optimum ratio between sufficient side wall passivation and high etching speed is very difficult to adjust. The control of the passivation limits the achievable etching depth, compare I. W. Rangelow, H. Loeschner: Journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399 and others.
- Employment of Cryogenic Processes in Connection with SF6—O2 Chemistry
- A high concentration of reactive etching species is the precondition to obtain high etching speeds. In this case however, a more intense etching attack occurs also on the side walls. The probability of spontaneous reactions between silicon and fluorine at the side walls is reduced drastically by cooling of the substrates to temperatures of about −110 degrees centigrade. The lateral etching rate decreases together with the chemical reaction rate. However, an intensive ion impact occurs at the floor of the structures. This intensive ion impact generates radical places and excites reactive particles such that chemical reactions occur furthermore. A clearly increased vertical etching rate results therefrom, compare, compare I. W. Rangelow, H. Loeschner: Journal vacuum science and technology, B 13 (6), November/December 1995, 2394-2399.
- Advanced Silicon Etch Process' (ASE)
- The ASE process is based on a known method according to the German printed Patent document DE 4241045 C1, which was developed by Laermer and Schilp. A cyclical process is here concerned, wherein the cyclical process is composed out of alternating deposition steps and etching steps. A passivation of the complete substrate surface occurs during the deposition interval by deposition of a polymer layer. During the etch interval, the polymer layer is removed on all horizontal planes by ion impact. The silicon laid bare reacts with fluorine to volatile reaction products at the floor of the structures.
- Characteristic features of the ASE process include:
-
- realization of etching depth of from 10 to 500 micrometer
- achievable aspect ratio: larger than 25
- slope angle in the side walls: nearly 90 degrees
- mask under etching goes towards zero
- arbitrary lateral shape of the structures (for example channel structures, passage holes through the silicon wafer, comb like structures, grid structures)
- application of conventional etching masks (for example SiO2, photo resist)
- etching rate: three to five micrometers per minute
- Based on the present state of the art it has to be determined that presently hardly any technological possibilities exist for varying the etching profile in the silicon structuring. These possibilities are limited essentially to the following two variations:
- a) Completely Iso-Tropic Etching (For Example by Way of SF6-Plasma)
- A typical structure is illustrated in
FIG. 1 . - b) Realization of Silicon Structures with Completely Vertical Side Walls with the Mask Underetchings Nearly Zero (Compare
FIG. 2 ). - Therefore the object of the Invention comprises to disclose a solution by way of which positive etching profiles with a defined slope angle β of the side walls can be generated.
- According to the present Invention the object is achieved with the silicon substrate with the features stated in
claim 1. - Furthermore the object is achieved by a method with the features recited in
claim 2. According to the method the silicon substrate covered the mask is etched iso-tropically such that the mask under etching u is approximately equal to the etching depth At, in the following the etching depth is enlarged to such an extent that the mask under etching remains constant and the etching front obtains a new course, wherein the side walls of the structure are covered with a polymer in this step, whereupon the polymer is removed from the side walls of the structure. The previously recited steps are repeated as many times until the desired etching profile and the desired etching depth are generated. - Advantageous variations of the method result from the features recited in the subclaims.
- The method according to the present Invention is a plasma etching process (PPE-process—positive profile etching process) which allows to structure silicon substrates such that thereby positive etching profiles are generated. The slope angle of the side walls of the etched structures can be defined adjusted in the region between 60 degrees and 88 degrees by suitable selection of the process parameters. Etching rates of three to five micrometers per minute and etching depth up to 200 μm can be obtained depending on the aspect ratio, on the opened (that is to be etched) face and on the process variation. A limitation of the reachable etching depth results only from the standing time of the etching masks, however not from process associated parameters.
- The Invention is in the following illustrated in more detail by way of embodiment examples. There is shown in the drawings:
-
FIG. 1 a typical structure according to an iso-tropic etching process in pure SF6 plasma -
FIG. 2 a structure generated by the ASE-process -
FIG. 3 a desired etching profile with defined slope angle β -
FIG. 4 a schematic construction of a plasma etching plant -
FIG. 5 a silicon wafer with an etching mask -
FIG. 6 a result of the iso-tropic silicon etching in pure SF6 plasma -
FIG. 7 a result after iso-tropic silicon etching and followed by a modified ASE process -
FIG. 8 a laying bare of the side walls of the edge structure with a O2-plasma -
FIG. 9 a presentation of the dependence of the slope angle of the edge structure from the time ratio Z -
FIG. 10 a structure with a slope angle β=89 degrees, etched at Z=0.1 -
FIG. 11 a structure with a slope angle β=85 degrees, etched at Z=0.167 -
FIG. 12 a structure with a slope angle β=83 degrees, etched at Z=0.25 -
FIG. 13 a structure with a slope angle β=81 degrees, etched at Z=0.33 -
FIG. 14 a structure with a slope angle β=77 degrees, etched at Z=0.5 -
FIG. 15 a structure with a slope angle β=74 degrees, etched at Z=0.67 -
FIG. 16 a structure with a slope angle β=66 degrees, etched at Z=1 -
FIG. 17 a structure with a slope angle β=60 degrees, etched at Z=2 -
FIG. 18 an embossing tool out of silicon -
FIG. 19 two structures made in silicon with a Y-shaped etching profile -
FIG. 20 a silicon structure for liquid storage cells -
FIG. 21 a trench in silicon with slightly inclined side walls -
FIG. 22 a metal bridge structure on silicon -
FIG. 23 a Cu-bridge structure, produced by way of the PPE-process -
FIG. 24 a Cu-bridge laid bare - The
FIGS. 1 and 2 serve for illustrating the state-of-the-art.FIG. 1 shows a typical structure according to an iso-tropic etching process in a pure SF6-plasma.FIG. 2 shows a structure generated by the ASE-process.FIG. 3 shows schematically the desired positive etched profile with the illustrated slope angle β. - A plasma etching plant of the company Surface Technology Systems Ltd. (STS), Great Britain is suitable for performing the structuring of the silicon substrate according to the present Invention as illustrated in
FIG. 3 . Such a plant is the schematically illustrated inFIG. 4 . - 4″ or 6″ silicon wafers can be processed in this plant. The plasma reactor is fed through a
sluice 1. The silicon wafers are held by amechanical clamping 3 on the substrate electrode and are cooled by way of helium backside cooling. A pump system comprising arotary slider pump 4 and a turbomolecular pump 5 is furnished for vacuum generation. The gas pressure of the process can be set in the range of 1 to 15 Pa. Nitrogen (N2), oxygen (O2), argon (Ar), tetra fluoro methane (CF4), sulfur hexa fluoride (SF6) and octa fluoro cyclo butane (C4F8) can be fed in as process gases through agas inlet port 7. A main component of the plant is the highly sealed ICP-plasma source 6, wherein a high frequency power of maximum one kilo Watt can be coupled into the ICP-plasma source 6. The substrate electrode is capable of being biased and can be charged with a high frequency power of maximum 300 watts. Anadapter network 8 and ahigh frequency generator 9 are furnished for this purpose. In each case the frequency amounts to 13.56 MHz. The performance of cyclical processes is possible at the plant. - The measurement of etching depth can be performed with the aid of a surface profile meter of the company TENCOR INSTRUMENTS with an accuracy of plus minus 5 nm.
- The method according to the present Invention, the so-called PPE-process is performed cyclically. The method is composed out of three steps, wherein the three steps are repeated always in the same sequence. The method exhibits the following course.
- It is noted that the silicon substrate is furnished with an etching mask as shown in
FIG. 5 . Here mask materials such as photo resist, thermal silicon oxide (SiO2), photo resist and SiO2 combined as well as metal masks of aluminum or copper are employed. - According to a first step the silicon substrate is iso-tropically etched in a pure SF6-plasma according to the representation shown in
FIG. 6 . With this etching step the mask under etching u is approximately equal to the etching depth At. - According to a second step the silicon substrate is subjected to a modified ASE-process as shown in
FIG. 7 . Since the ASE-process etches absolutely vertically, thereby the etching depth is increased but the mask under etching remains constant, and the etching front obtains a new course. The side walls of the structures are covered with a polymer according to the ASE-process. - According to a third step the polymer at the side walls of the structure is removed by O2-RIE and an etched structure is obtained as shown in
FIG. 8 . - The method steps 1 to 3 are now repeated so many times until the desired etching depth has been reached. By superposition of the etching fonts, which result from the two silicon etching processes according to the steps a) and b), there are generated positive etching profiles with a slope angle between 60 degrees and 88 degrees.
- The process parameters for each interval are contained in table 1. The parameters of the modified ASE-process are disposed opposite to those of the known Bosch process in table 2. A reproducible setting of a desired slope angle is possible by the selection of suitable time ratio Z for the
steps - The larger the time part of the iso-tropic etching in pure SF6-plasma, the smaller the slope angle becomes.
FIG. 9 shows this relationship. The FIGS. 10 to 17 show examples for real structures with the decreasing slope angle β, which were correspondingly etched. - Structured silicon substrates can be employed as molds for the casting of devices of polymers or other substances capable of being cast. The result of the silicon structuring is of decisive importance for the capabilities of separating the cast parts from the mold. The slope angles of the side walls smaller than 90 degrees alleviate the removal of the formed parts substantially.
FIG. 18 shows a silicon structure with a slope angle of 88 degrees, where the silicon structure is suitable as an embossing tool for the production of polymer parts with channel structures for medical technology. - Micro-fluidic devices contain frequently channel systems and nozzles, where the channel systems and nozzles are generated by corresponding structuring of silicon substrates. Increasingly the requirement exists in this context to realize structures with complex lateral forms and vertical forms. This contains amongst others the generation of structures with composed etching profile all of etching profiles with alternating slope angle. Examples for this are shown in
FIGS. 19 a) and b). - Storage sells for liquids can for example have a shape as is the shown in
FIG. 20 . The illustrated structures have also been generated by the method according to the present Invention. - Frequently the trenches are etched into silicon in the context of the production of devices of the power electronics, wherein the trenches are in the following covered with dielectrics or, respectively, are filled with metals. Capacitors or through contacts are to be generated in this manner. The homogeneous coating and void free filling of the trenches is alleviated, if the slope angle is disposed between 85 and 88 degrees.
FIG. 21 shows an example for such a trench. - Special metal bridge structures on silicon are required in the field of electron microscopy. A free metal bridge, which is connected to contact pads can be generated on the silicon substrate for such a case (
FIG. 22 ). - The laying bare of such metal bridges represents up to now a problem for the silicon structuring. On the one hand the silicon on the backside of the metal strip is to be completely removed up to an etching depth of from 200 up to 500 micrometers, and on the other hand a minimum under etching of the SiO2 under the contact pads is desired. Despite miniaturization of the device element, the stability of the structure should therewith remain assured. The
FIGS. 23 and 24 show structures of this kind realizable with the Invention method. -
- 1—sluice
- 2—silicon wafer
- 3—mechanical clamping
- 4—rotary slider pump
- 5—turbo molecular pump
- 6—ICP-plasma source
- 7—gas inlet port
- 8—adapter network
- 9—high frequency generator
Claims (8)
1. Silicon substrate with positive etching profiles having a defined slope angle, obtained by etching of the silicon substrate, wherein the silicon substrate is covered by a mask and the following steps
a) iso-tropic etching of the silicon substrate, wherein the mask under etching u is approximately equal to the etching depth At,
b) enlargement of the etching depth by iso-tropic etching with alternating, successively following etching steps and polymerization steps, wherein the mask under etching remains constant and wherein the etching front obtains a new course, and wherein the side walls of structure are covered with a polymer with this step,
c) removal of the polymer from the structure, and
d) repeating the steps a) through c) until the predetermined etching profile has been reached.
2. Method for plasma etching for generating positive etched profiles with defined slope angle in silicon substrates, wherein this silicon substrate is covered with a mask and wherein
a) silicon substrate is initially iso-tropically etched such that the mask under etching u is approximately equal to the etching depth At,
b) following thereto the etching depth becomes enlarged by aniso-tropic etching with alternatingly successively following etching steps and polymerization steps, such that the mask under etching remains constant and the etching frowned obtains a new course, wherein the side walls of the structure are covered with a polymer in this step,
c) thereupon the polymer is removed at the side walls of the structure, and
d) the steps a) through c) and I repeated as many times until the predetermined etched profile has been reached.
3. Method according to claim 2 characterized in that the silicon substrate is iso-tropically etched in a SF6-plasma.
4. Method according to claim 2 characterized in that the enlargement of the etching depth is performed by an aniso-tropic etching process, wherein the pressures for the process gases are from 1.0 to 5.3 Pa and the interval times amount to 3 to 12 seconds in the aniso-tropic etching process.
5. Method according to one of the claim 2 characterized in that the removal of the polymer is performed by way of an O2-plasma.
6. Method according to one of claim 2 characterized in that the slope angle β in the etching profile is determined by adjustment of a time ratio between the steps a) and b).
7. Method according to claim 6 characterized in that the step b) is prolonged and that the time ratio is therefrom determined.
8. Method according to claim 6 characterized in that the step a) is prolonged and that the time ratio is therefrom determined.
Priority Applications (1)
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US11/261,241 US7498266B2 (en) | 2003-04-15 | 2005-10-27 | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
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DE10318568.2 | 2003-04-15 | ||
DE10318568A DE10318568A1 (en) | 2003-04-15 | 2003-04-15 | Silicon substrate with positive etching profiles with a defined angle of repose and method of production |
PCT/DE2004/000804 WO2004093162A2 (en) | 2003-04-15 | 2004-04-15 | Silicon substrate comprising positive etching profiles with a defined slope angle, and production method |
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PCT/DE2004/000804 A-371-Of-International WO2004093162A2 (en) | 2003-04-15 | 2004-04-15 | Silicon substrate comprising positive etching profiles with a defined slope angle, and production method |
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US11/261,241 Continuation-In-Part US7498266B2 (en) | 2003-04-15 | 2005-10-27 | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
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US10/553,728 Abandoned US20060219654A1 (en) | 2003-04-15 | 2004-04-15 | Silicon substrate comprising positive etching profiles with a defined slope angle, and production method |
US11/261,241 Expired - Fee Related US7498266B2 (en) | 2003-04-15 | 2005-10-27 | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
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US (2) | US20060219654A1 (en) |
EP (1) | EP1614145A2 (en) |
DE (1) | DE10318568A1 (en) |
WO (1) | WO2004093162A2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060099811A1 (en) * | 2003-04-15 | 2006-05-11 | Karola Richter | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
CN102910572A (en) * | 2011-08-05 | 2013-02-06 | 美新半导体(无锡)有限公司 | Etching method for releasing MEMS (Micro-electromechanical Systems) suspension bridge structure |
US9069033B2 (en) | 2013-03-26 | 2015-06-30 | Industrial Technology Research Institute | 3-axis magnetic field sensor, method for fabricating magnetic field sensing structure and magnetic field sensing circuit |
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DE102006043389A1 (en) * | 2006-09-06 | 2008-03-27 | Technische Universität Dresden | Plasma etching process for producing positive etch profiles in silicon substrates |
US20150011073A1 (en) * | 2013-07-02 | 2015-01-08 | Wei-Sheng Lei | Laser scribing and plasma etch for high die break strength and smooth sidewall |
US11268927B2 (en) | 2016-08-30 | 2022-03-08 | Analog Devices International Unlimited Company | Electrochemical sensor, and a method of forming an electrochemical sensor |
US10620151B2 (en) | 2016-08-30 | 2020-04-14 | Analog Devices Global | Electrochemical sensor, and a method of forming an electrochemical sensor |
US11022579B2 (en) | 2018-02-05 | 2021-06-01 | Analog Devices International Unlimited Company | Retaining cap |
CN109725375A (en) * | 2018-12-21 | 2019-05-07 | 中国电子科技集团公司第四十四研究所 | A kind of III-V race's material nano grating lithographic method |
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2003
- 2003-04-15 DE DE10318568A patent/DE10318568A1/en not_active Ceased
-
2004
- 2004-04-15 EP EP04727512A patent/EP1614145A2/en not_active Withdrawn
- 2004-04-15 WO PCT/DE2004/000804 patent/WO2004093162A2/en active Application Filing
- 2004-04-15 US US10/553,728 patent/US20060219654A1/en not_active Abandoned
-
2005
- 2005-10-27 US US11/261,241 patent/US7498266B2/en not_active Expired - Fee Related
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US4639288A (en) * | 1984-11-05 | 1987-01-27 | Advanced Micro Devices, Inc. | Process for formation of trench in integrated circuit structure using isotropic and anisotropic etching |
US4855017A (en) * | 1985-05-03 | 1989-08-08 | Texas Instruments Incorporated | Trench etch process for a single-wafer RIE dry etch reactor |
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US6198150B1 (en) * | 1996-12-23 | 2001-03-06 | Intersil Corporation | Integrated circuit with deep trench having multiple slopes |
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US20060099811A1 (en) * | 2003-04-15 | 2006-05-11 | Karola Richter | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
US7498266B2 (en) | 2003-04-15 | 2009-03-03 | Technische Universitát Dresden | Method for structuring of silicon substrates for microsystem technological device elements and associated silicon substrate |
CN102910572A (en) * | 2011-08-05 | 2013-02-06 | 美新半导体(无锡)有限公司 | Etching method for releasing MEMS (Micro-electromechanical Systems) suspension bridge structure |
US9069033B2 (en) | 2013-03-26 | 2015-06-30 | Industrial Technology Research Institute | 3-axis magnetic field sensor, method for fabricating magnetic field sensing structure and magnetic field sensing circuit |
Also Published As
Publication number | Publication date |
---|---|
WO2004093162A2 (en) | 2004-10-28 |
WO2004093162A3 (en) | 2005-02-24 |
EP1614145A2 (en) | 2006-01-11 |
US20060099811A1 (en) | 2006-05-11 |
US7498266B2 (en) | 2009-03-03 |
DE10318568A1 (en) | 2004-11-25 |
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