EP1445756A2

EP1445756A2 - Plasma display device provided with drive means suitable for carrying out rapid charge-equalization operations

Info

Publication number: EP1445756A2
Application number: EP04075385A
Authority: EP
Inventors: Pascal Denoyelle; Claude Meysen; Hassan Guermoud
Original assignee: Thomson Plasma SAS
Priority date: 2003-02-06
Filing date: 2004-02-06
Publication date: 2004-08-11
Also published as: EP1445756A3; CN1521716A; FR2851073A1; JP2004240430A; KR20040071627A; CN100410987C; TW200428331A; JP4838983B2; KR101049866B1

Abstract

Conventionally, the drive means are suitable for generating charge-equalization or reset operations, then address operations and then sustain operations: the invention relates to division of the reset operations into two successive steps: a metastable space charge-generation step P1; an accelerated charge-generation end step P2 during which the system operates in the mode with weak discharges between the electrodes E1, E2, serving at least for addressing. Thanks to this division, the reset operations may be shortened and the luminous performance of the panel and/or the manufacturing yields of plasma panels may be improved.

Description

The invention relates to a display device comprising a plasma panel, of the AC type with memory effect, having intersecting electrodes serving at least for addressing, the said device being optionally provided with coplanar electrodes serving at least for sustaining, and with means for driving this panel that are suitable for carrying out charge-equalization (or reset), address and sustain operations in the discharge regions of this panel.
An AC plasma display panel (PDP) with memory effect generally comprises two parallel plates leaving a space containing a discharge gas between them; between the plates, generally on the internal faces of these plates, a panel such as this has several arrays of electrodes:

generally two arrays of intersecting electrodes, each placed on a different plate, and therefore non-coplanar, and serving for addressing the discharges, at the intersections of which electrodes, in the space between the plates, light discharge regions are defined; and
at least two arrays of parallel coplanar electrodes, placed on the same plate and serving for sustaining the discharges; these arrays are covered with a dielectric layer, especially for providing a memory effect; this dielectric layer is itself covered with a protective and secondary-electron-emitting layer, generally based on magnesia.

Each electrode of a sustain array forms, with an electrode of the other sustain array, a pair of electrodes that define between them a succession of light discharge regions, generally distributed along a row of discharge regions of the panel.
The light discharge regions form a two-dimensional matrix on the panel; each region is capable of emitting light so that the matrix displays the image to be displayed.
In general, one of the arrays of coplanar electrodes serves both for addressing and for sustaining. In this particular case, that array of electrodes will be called hereafter Y, the second array of coplanar electrodes being called X and the array of address electrodes orthogonal to Y and X, and placed on the other plate, will be called A. The arrays of electrodes X and Y therefore supply rows of discharge regions, whereas the array of electrodes A, serving only for addressing, supplies columns of discharge regions.
The adjacent discharge regions, at least those that emit different colours, are generally bounded by barrier ribs; these ribs generally serve as spacers between the plates.
The walls of the light discharge regions are in general partly coated with phosphors sensitive to the ultraviolet radiation coming from the light discharges; adjacent discharge regions are provided with phosphors emitting different primary colours, in such a way that the combination of three adjacent regions forms a picture element or pixel.
In practice, these phosphors cover the sloping walls of the barrier ribs and the plate bearing these ribs, which is generally the plate bearing the array of electrodes serving only for addressing; the address electrodes are therefore covered with phosphors.
When the plasma panel is in operation, in order to display an image a succession of display or subdisplay operations is carried out using the matrix of discharge regions; each subdisplay operation generally comprises the following steps:

firstly, a selective address step, the purpose of which is to modify the electrical charges on the dielectric layer in each of the discharge regions to be activated, by applying at least one voltage pulse between the intersecting address electrodes in these regions;
secondly, a non-selective sustain step during which a succession of voltage pulses is applied between the electrodes of the sustain pairs so as to cause a succession of light discharges only in the discharge regions that had been activated beforehand.

After a subdisplay operation, the discharge regions may be in very different internal electrical voltage states, especially depending on whether or not these regions have been activated during this subdisplay operation; other factors contribute to this dispersion in the internal voltage states, such as the nature of the phosphors corresponding to these regions, the inevitable fluctuations in the dimensional characteristics of these discharge regions and the fluctuations in surface compositions of the walls of these regions, which are associated with the panel fabrication processes.
In order to make the internal voltage state the same for all the discharge regions to be addressed, most of the address steps are preceded by a step of equalizing these regions, the aim especially being to reset all the discharge regions to be addressed to the same internal voltage state, whether or not they had been activated during the preceding subdisplay operation; this reset step conventionally comprises an electrical charge-forming or priming operation followed by a charge adjusting operation, also called a charge erase operation, after which, ideally, the internal voltages within each discharge region are close to the ignition thresholds between address electrodes and between sustain electrodes.
For each pair of address or sustain electrodes of a discharge region, it is possible to associate an external voltage applied between these electrodes and an internal voltage in the gas space separating the materials that cover these electrodes. The internal voltage generally differs from the external voltage because of the surface charges that are on the surface of the insulating materials covering the electrodes, at the interface between these dielectric materials and the gas in the discharge region.
These surface charges result, on the one hand, from a capacitive effect owing to the dielectric properties of the materials that define the discharge regions and, on the other hand, from an accumulation of what are called "memory" charges produced by the previous discharges in the gas of these discharge regions.
The internal ignition threshold of a discharge region in a given direction corresponds to an internal voltage limit value along this direction, above which the gas ionizes in this region. This value depends on the characteristics of the gas in this region, on those of the materials in contact with the gas in this region, and on the geometry of the electrodes passing over this region outside of this region.
In the particular case described above of three arrays of electrodes X, Y, A, six internal threshold values are generally associated with each discharge region:

an internal threshold V_{IT_XY} for ignition between anode X and cathode Y;
an internal threshold V_{IT_YX} for ignition between cathode X and anode Y;
an internal threshold V_{IT_XA} for ignition between anode X and cathode A;
an internal threshold V_{IT_AX} for ignition between cathode X and anode A;
an internal threshold V_{IT_YA} for ignition between anode Y and cathode A; and
an internal threshold V_{IT _AY} for ignition between cathode Y and anode A.

The terms "anode" and "cathode" are relative to the internal potentials in the gas of a discharge region near the electrodes passing over this region: an electrode is said to be an anode relative to another electrode if the potential in the gas near it is greater than that near the other electrode, this other electrode then being cathodic.
The next two internal thresholds have the same value because they characterize discharges in coplanar mode, which are generated by electrodes carried by the same plate and placed generally symmetrically one with respect to the other:
V_{IT_XY} = V_{IT_ YX}, denoted by V_{IT_S}.
However, the next two internal thresholds, which characterize the discharges in matrix mode and are therefore between two different plates, are different depending on whether the electrode in question acts as an anode or as a cathode: VIT_XA = VIT_YA, denoted by VIT_A_ca VIT_AX = VIT_AY, denoted by VIT_A_an.
This is because, when the column address electrode A acts as cathode, since the secondary emission from the phosphor carrying it is less than that from the magnesia on the surface of the dielectric covering the row electrode X or Y, the discharges are produced at higher voltages than when its acts as an anode.
In general:

during a charge-forming or priming operation, each electrode Y serving both for addressing and sustaining is an anode relative to the other two electrodes X and A;
during a charge-adjusting or erase operation, each electrode Y serving both for addressing and sustaining is a cathode relative to the other two electrodes X and A.

These operations are generally carried out by applying a slowly increasing potential difference, on the one hand, between the two coplanar sustain electrodes and, on the other hand, between the two matrix electrodes for addressing all the discharge regions of a group to be addressed; documents FR 2 417 848 (THOMSON-1978) and US 5 745 086 (PLASMACO-1998) thus describe the application of ramp voltage signals to the electrode or to the electrodes serving both for addressing and for sustaining during application of a constant voltage signal to the other, only address or only sustain, electrodes.
Patent US 5 745 086 shows that the reset operations for the regions of a panel are thus carried out advantageously, in each region, without a strong discharge but with a series of so-called "weak" discharges between the electrodes when the slope of the ramp signal applied does not exceed 10 V/µs. These "weak" discharges compensate for the increase in external voltage applied to the electrodes by surface discharges being deposited on the walls of the regions supplied by these electrodes, and since there is no "strong" discharge the internal voltage in the gas of these regions therefore remains equal to or slightly below the internal ignition threshold defined above.
The known advantages of resetting by weak discharges, also called "positive resistance" resetting, are that they allow precise adjustment of the internal electrical voltages within the discharge regions by producing a weak light emission. Precise adjustment is essential with respect to performance and to efficiency of the subsequent address operation. Limiting this light emission is essential for the contrast performance of the display device.
The maximum slope of the ramp signal producing weak discharges in a discharge region is dependent in particular on the characteristics of the materials covering the cathode of this region, especially on the secondary emission coefficient of these materials and on the quantity of space charge and of the metastable elements in the gas in this region. The slope values commonly used do not exceed 5 V/µs for the priming operation in which the Y electrode acts as anode relative to the X and A electrodes. Since the total amplitude of the ramp typically covers 200 V, the duration of the priming operation therefore reaches several tens of microseconds. This duration represents wasted time as regards the other operations to be carried out during a scan or subscan, namely the address and sustain operations, thereby limiting the performance of the display device, especially as regards its emission maximum. In addition, certain panels may be rejected at the end of the production line as they exhibit operating defects associated with the existence of strong discharges during the priming ramp, with standard ramp values, which further increases the production costs of the panels.
It is an objective of the invention to limit these drawbacks; it is also an objective of the invention to shorten the duration of these discharge region reset operations without reducing the efficiency thereof, that is to say while still maintaining the level of equalization of the various discharge regions.
For this purpose, the subject of the invention is a display device comprising:

an AC plasma panel with memory effect, comprising two plates, leaving a space containing a discharge gas between them, and two arrays of intersecting electrodes serving at least for addressing, at the intersections of which, in the space between the plates, light discharge regions are defined;
drive means suitable for applying, to the said electrodes, voltage signals suitable for carrying out operations intended to equalize the charges in or reset the said discharge regions;

_{ET_E2E1}

_E2E1

_{ET_E2E1}

_E2E1

_{ET_E2E1}

The invention therefore corresponds to case 1 or the 1^st embodiment described in further detail below.
The subject of the invention is also, according to the same principle, a display device comprising:

an AC plasma panel with memory effect, comprising two plates leaving a space containing a discharge gas between them, two arrays of intersecting electrodes serving at least for addressing, at the intersections of which, in the space between the plates, light discharge regions are defined, at least two arrays of electrodes serving at least for sustaining and placed so that one of the electrodes of each of these arrays passes over each discharge region;
drive means suitable for applying, to the said electrodes, voltage signals suitable for carrying out reset operations intended to equalize the charges in or reset the said discharge regions,

_{ET_EA2EA1}

_{ET_ES2ES1}

either the potential difference V_EA2EA1, applied between the electrodes serving at least for addressing and intersecting the said regions of this group does not exceed the value Min[V_{ET_EA2EA1}] while the potential difference V_ES2ES1 applied between the electrodes serving at least for sustaining and passing over the said regions of this group does not exceed the value Max[V_{ET_ES2ES1}] and increases with what is called a positive end-of-operation slope as soon as the potential difference V_ES2ES1 applied between these electrodes serving at least for sustaining has exceeded the value Max[V_{ET_ES2ES1}] ;
or the potential difference V_EA2EA1 applied between the electrodes serving at least for addressing and intersecting the said regions of this group increases, as soon as the potential difference V_ES2ES1 applied between the electrodes serving at least for sustaining and passing over the said regions has exceeded the value Max[V_{ET_ES2ES1}], with what is called a positive end-of-operation slope, which is steeper than the maximum slope for growth of V_EA2EA1 during the instants when V_ES2ES1 is between Min[V_{ET_ES2ES1}] and Max[V_{ET_ES2ES1}].

The invention therefore corresponds, either to case 2 or the 2^nd embodiment described in greater detail below, or to case 3 or the 3^rd embodiment described in greater detail below.
In general, the drive means are suitable for furthermore carrying out:

selective address operations for selectively activating or deactivating discharge regions; they are carried out by applying voltage pulses between the electrodes serving at least for addressing;
non-selective sustain operations for initiating discharges only in the preactivated discharge regions of the panel; they are carried out by applying voltage pulses between the electrodes serving at least for sustaining.

Such a panel is said to have a "memory effect" because, during sustain periods, discharges are generated only in those regions that were activated beforehand; for this purpose, in each discharge region, at least one of the electrodes serving at least for sustaining is coated with a dielectric layer which is itself covered with a protective and secondary-electron-emitting layer.
The dielectric layer provides the memory effect which, during the sustain operations, makes it possible to initiate discharges only in the activated regions; the protective layer is generally based on magnesia and has a high secondary electron emission coefficient, higher than the secondary electron emission coefficient of the material that coats, in each discharge region, one of the electrodes serving at least for addressing, this material generally being a phosphor.
Preferably, the drive means are designed so that, during the said specific charge-equalization or reset operations, in each of the regions of the said group, the electrode covered with the protective layer serves as anode; the specific reset operations are then charge-forming or priming operations; in this case there is therefore no charge adjustment or erase operation, in which, in contrast, this electrode covered with the protective layer generally acts as cathode.
Each reset operation generally relates to a group of rows of discharge regions of the panel, or even all of the rows; these operations are generally initiated before a selective address operation.
The term "matrix ignition" is understood to mean the initiation of discharges between electrodes serving at least for addressing and the term "coplanar ignition" is understood to mean the initiation of discharges between electrodes serving at least for sustaining.
If the panel comprises arrays of coplanar electrodes carried by the same plate, these electrodes serve at least for sustaining; the other plate then generally carries an array of electrodes serving mainly for addressing, or even in addition for initiating sustain discharges; in this case, one of the arrays of electrodes serving at least for addressing is preferably merged with one of the arrays of electrodes serving at least for sustaining, and forms one of the arrays of coplanar electrodes; it is therefore this array of electrodes that acts as anode during the priming operations. Conventional coplanar plasma panels of the prior art are then used.
If the panel does not have arrays of coplanar electrodes, the sustain operations are generally carried out by applying voltage pulses between electrodes serving also for addressing; the panel then generally has two arrays of electrodes, one on each plate; as a variant, the sustain operations could be carried out by applying a radiofrequency field in the discharge regions, in which case the electrodes of the array serve only for addressing.
By virtue of the invention, it is possible to shorten the period needed for the reset operations, to devote additional time to the sustain operations and thus improve the luminous performance of the panel.
By virtue of the invention, it is possible to substantially improve the manufacturing yields of plasma panels by reducing the amount of scrap.
Preferably, the end-of-operation slope for increasing the potential difference between the electrodes serving at least for addressing is greater than 5 V/µs.
Thus, as soon as all the matrix ignition thresholds in case 1 have been exceeded, and as soon as all the coplanar ignition thresholds in case 2 or case 3 have been exceeded, the reset operations take place much more rapidly than in the prior art, without at all losing out on the quality of these operations and without any risk of strong discharges that may prejudice the contrast; more time may therefore be devoted to the other drive operations, especially the sustain operation, thereby making it possible to improve the display performance, especially in the case of video image display.
Preferably, the end-of-operation slope for increasing the potential difference between the electrodes serving at least for addressing is greater than 10V/µs. The performance of the device and the advantages of the invention are even further improved.
Preferably, in case 2 or case 3, while V_ES2ES1 is between Min[V_{ET_ES2ES1}] and Max[V_{ET_ES2ES1}] during the said reset operations, the potential difference V_ES2ES1 applied between the electrodes serving at least for sustaining increases with what is called a start-of-operation slope that is greater than 5 V/µs, preferably greater than 10 V/µs. The performance of the device and the advantages of the invention are improved even further.
Preferably, during each of the said specific reset operations, the potential difference (V_E2E1 ; V_EA2EA1) applied between the electrodes serving at least for addressing is uniform and strictly increasing when Min[V_{ET_E2E1}] < V_E2E1 < Max[V_{ET_E2E1}], or when Min[V_{ET_EA2EA1}] < V_EA2EA1 < Max[V_{ET_EA2EA1}]. The expression "uniform and strictly increasing" is understood to mean a non-zero increase. Preferably, this increase is linear with time; this is therefore achieved with linear voltage ramps applied to one of the arrays of electrodes, this being easier to implement.
Preferably, in case 2 or 3, during each of the said specific reset operations, the potential difference (V_ES2ES1) applied between the electrodes serving at least for sustaining is uniform and strictly increasing when Min[V_{ET_ES2ES1}] < V_ES2ES1 < Max[V_{ET_ES2ES1}].
The expression "uniform and strictly increasing" is understood to mean a non-zero increase. Preferably, this increase is linear with time; this is therefore implemented with linear voltage ramps applied to one of the arrays of electrodes, this being simpler to implement.
Given below is a summary of the principles upon which the invention applied to priming operations is based:

To obtain a weak discharge mode with the highest possible slope value between two electrodes serving for addressing, E1 and E2, or EA1 and EA2, E1 or EA1 acting as cathode, the initial level for conditioning the discharge regions is raised before a steep-slope signal is applied between these electrodes.
The invention therefore relates to two successive steps within one and the same reset operation:
o a step P1 of generating metastable space charges obtained by discharges;
o an accelerated charge-generation end step P2, corresponding to making all these charges the same, during which the system operates in the mode in which there are weak discharges between the electrodes serving at least for addressing, E1 and E2, or between EA1 and EA2, with the highest possible slope, generally greater than 10 V/µs.
The invention may apply to plasma panels having various cell or discharge-region structures, for example those of the "ACM", "ACC" or "ACC3E" type.
In case 1, applicable to any type of "ACM"-type matrix panel with two electrodes E1, E2 per cell, or ACC panel with 3 electrodes or more per cell (including EA1 and EA2), step P1 consists in applying a gently sloping ramp for a time long enough to generate discharges between the two electrodes E1 and E2 (or alternatively EA1 and EA2), whatever the previous state of the cells. This gentle slope value corresponds in fact to the slopes normally used in the prior art, namely less than 10 V/µs. The E1-E2 (or alternatively EA1-EA2) discharges thus produced serve both for conditioning the cell and for part of equalization of the voltage internal to the cell, between the electrodes E1 and E2 (or alternatively EA1 and EA2).
In cases 2 and 3, applicable to coplanar panels of the "ACC" type, which comprise at least three electrodes EA1, EA2 = ES2, ES1 per cell, step P1 consists in applying a ramp of steeper slope than in the prior art, generally greater than 10 V/µs, between the coplanar electrodes of the cell, ES1 acting as cathode being covered with a material having a secondary emission coefficient greater than that covering EA1, and ES2 which may be EA2 (the standard "ACC" case: EA1: column, EA2 = ES2 = "scan/sustain" row, ES1 = "common" row). The ES1-ES2 coplanar discharges thus produced serve both for conditioning the cell and for part of the equalization of the internal voltage between ES1 and ES2. Cases 2 and 3 are distinguished as follows:
o Case 2: no discharge is generated between EA1 and EA2 during step P1, the ignition voltage not being internally exceeded between these electrodes. This may be achieved with various signals between EA1 and EA2 (constant signal, ramp signal or other signals) provided that the ignition threshold is not exceeded. During this step P1, the weak coplanar discharges are initiated and the weak matrix discharges are prevented, the amplitude of the ramp signal applied matrix-wise not exceeding the matrix threshold voltage at any instant.
o Case 3: matrix discharges are generated between EA1 and EA2 during step P1 simultaneously with the coplanar discharges between ES1 and ES2. In this case, the slope of the signal between EA1 and EA2 must be small in order to allow operation in weak-discharge mode, until a sufficient level of conditioning of the cell has been reached. In this case, the slope of the signal between EA1 and EA2 is less than that between ES1 and ES2.
Step P2 is characterized by the application of a ramp signal with a higher slope than in the prior art, generally greater than 10 V/µs, between EA1 and EA2. At this stage, it is of little importance what happens between the other electrodes.
Steps P1 and P2 may optionally be separated by a period without any discharge in the cell (for example if the voltages applied temporarily cease to increase). This period must not exceed 20 µs in order for the conditioning effect created during P1 to still be active in P2.
The embodiments described are derived from these general principles and from the conditions under which discharges are generated between electrodes specific to each cell of the panel, since they are tied:
o to the ignition thresholds that vary according to the cells;
o to the state of the surface memory charges dependent on the history of the cell (previously lit or unlit).

The invention will be more clearly understood on reading the description that follows, given by way of non-limiting example and with reference to the appended drawings in which:

Figure 1 describes a timing diagram for applying potential differences between the electrodes of a matrix panel during a charge creation operation according to a first embodiment of the invention;
Figure 2 describes a timing diagram for applying potential differences between the address electrodes and between the sustain electrodes of a coplanar panel during a charge creation operation according to a second embodiment of the invention;
Figure 3 describes a timing diagram for applying potential differences between the address electrodes and between the sustain electrodes of a coplanar panel during a charge creation operation according to a third embodiment of the invention;
Figure 4 is a general timing diagram for applying voltage to the three arrays of electrodes of a conventional coplanar panel during a charge creation operation, in order to illustrate, according to the detailed example given in the description, the benefit of the invention compared with the timing diagrams of the prior art;
Figures 5 to 7 describe the strong discharges that unfortunately are obtained when voltages are applied to the three arrays of electrodes according to a rapid timing diagram, but fall outside the scope defined by the invention; and
Figure 8 illustrates the advantage afforded by the invention, namely the absence of strong discharges when voltages are applied to the three arrays of electrodes according to a rapid timing diagram.

Various general embodiments of the invention will now be described; the first embodiment applies to matrix-type plasma panels that have only two arrays of electrodes E1, E2, one on each plate, which serve both for addressing and for sustaining the discharges; the other embodiments apply to coplanar-type plasma panels which have two arrays of sustain electrodes ES1, ES2 on the same plate, called the coplanar plate, and two arrays of address electrodes EA1 on the plate, called the address plate, opposite the coplanar plate and EA2 on the coplanar plate. These other embodiments apply to conventional coplanar panels in which an array of coplanar electrodes serves both for addressing and for sustaining, which means that EA2 then merges with ES2.
The sustain electrodes, E2 or ES1 and ES2, are coated with a dielectric layer which is itself covered with a material such as magnesia, having a high secondary electron emission coefficient, and in any case higher than the material covering the electrodes E1 or EA1 of the address plate; the material covering the electrodes E1 or EA1 is generally a phosphor; by extension, the plate bearing these electrodes and the magnesia layer is termed the sustain plate, or coplanar plate in the case of coplanar panels.
A matrix panel comprises a large number of discharge regions; after an image scan or subscan, each region of the panel has an external ignition threshold voltage, V_{ET_E2E1} in the case of a charge creation operation where E2, on the sustain plate, acts as anode. The minimum value of the ignition voltage of all the regions of the panel is denoted by Min[V_{ET_E2E1}] and the maximum value of the ignition voltage of all the regions of the panel is denoted by Max[V_{ET_E2E1}].
A coplanar panel comprises a large number of discharge regions; after an image scan or subscan, each region of the panel has an external matrix ignition threshold voltage V_{ET_EA2EA1}, and an external coplanar ignition threshold voltage V_{ET_ES2ES1}, this being so in the case of a charge creation operation in which EA2 and ES2 on the coplanar plate act as anodes. The minimum value of the matrix ignition voltage and of the coplanar ignition voltage of all the regions of the panel are denoted by Min[V_{ET_EA2EA1}] and Min[V_{ET_ES2ES1}] respectively and the maximum value of the matrix ignition voltage and of the coplanar ignition voltage of all the regions of the panel are denoted by Max[V_{ET_EA2EA1}] and Max[V_{ET_ES2ES1}] respectively.
All the embodiments of the invention presented below relate to charge-creation or priming operations; according to an essential feature of the invention, each of these operations comprises a step P1 called the charge-creation and conditioning start step, of duration τ1, followed by a step P2 called the accelerated charge-creation end step, of duration τ2, the time separating the end of the first step and the start of the second step necessarily not exceeding 20 µs if it is desired to derive full benefit from the conditioning of the discharge regions in the second step P2.
In Figure 1, which describes the charge-creation or priming operations of a matrix panel, the following external voltages between the electrodes E2 (anode) and E1 (cathode) may therefore be distinguished in succession:

V_{E2E1_P1_ST} at the start of step P1;
V_{E2E1_P1_NO} at the end of step P1;
V_{E2E1_P2_ST} at the start of step P2; and
V_{E2E1_P2_ND} at the end of step P2.

In Figures 2 and 3, which describe the charge-creation or priming operations of coplanar panels, the following external voltages between the address electrodes EA2 (anode) and EA1 (cathode) on the one hand and between the sustain electrodes ES2 (anode) and ES1 (cathode) on the other may therefore be distinguished in succession:

V_{EA2EA1_P1_ST} and V_{ES2ES1_P1_ST} at the start of step P1;
V_{EA2EA1_P1_ND} and V_{ES2ES1_P1_ND} at the end of step P1;
V_{EA2EA1_P2_ST} and V_{ES2ES1_P2_ST} at the start of step P2; and
V_{EA2EA1_P2_ND} and V_{ES2ES1_P2_ND} at the end of step P2.

To simplify the description, identical references are used in the various embodiments for the elements that fulfil the same functions.

1^st embodiment: the case of a matrix or coplanar panel

Referring to Figure 1, the two steps P1 and P2 are defined as follows:

V_{E2E1_P1_ST} < Min[V_{ET_E2E1}]; thus, at the start of step P1, the discharge ignition threshold is not exceeded in any of the cells of the panel, whatever their charge state resulting from the operations during the preceding scans or subscans; preferably, V_{E2E1_P1_ST} ≥ 0.9 x Min[V_{ET_E2E1}], so that weak discharges start to be initiated in regions of the panel right from the start of the conditioning step P1;
V_{E2E1_P1_ND} > Max[V_{ET_E2E1}]; thus, the discharge ignition threshold is exceeded in each cell of the panel after the conditioning step P1, whatever their charge state resulting from the preceding operations, so as to create an initial conditioning state; preferably, V_{E2E1_P1_ND} ≤ 1.1 x Max[V_{ET_E2E1}], so as not to unnecessarily extend the period P1 of slow potential increase and to engage as soon as possible the period P2 of rapid potential increase;
V_{E2E1_P2_ST} = V_{E2E1_P1_ND}, so that the two steps P1 and P2 link together without a transition; and
V_{E2E1_P2_ND} is defined in the same way as in the prior art, namely so as to obtain, at the end of step P2, the desired priming level in all the discharge regions of the panel.

During step P1, the rate of increase of the potential V_E2E1 between the electrodes, or the instantaneous value of the slope dV_E2E1/dτ, is in accordance with the prior art, that is to say it is less than 5 V/µs throughout the duration τ1 of this step; in contrast, according to the invention, during step P2, the rate of increase in the potential V_E2E1 between the electrodes, or the instantaneous value of the slope dV_E2E1/dτ, is substantially greater than in the prior art throughout the duration τ2 of this step, preferably greater than 10 V/µs.
In general, according to the invention, the potential between the electrodes therefore increases much more rapidly at the end of the charge creation period, during step P2, than at the start of this period, during step P1; the time for the priming operations is therefore very considerably reduced, without losing any of the quality of these operations.

2^nd embodiment: the case of a coplanar panel

Referring to Figure 2, the two steps P1 and P2 are defined as follows:

V_{ES2ES1_P1_ST} < Min[V_{ET_ES2ES1}]; thus, at the start of P1, the coplanar discharge ignition threshold is not exceeded in any of the cells of the panel whatever their charge state resulting from the preceding operations; preferably, V_{ES2ES1_P1_ST} ≥ 0.9 x Min[V_{ET_ES2ES1}], so that weak coplanar discharges start to be initiated in regions of the panel right from the start of step P1;
V_{ES2ES1_P1}_ND > Max[V_{ET_ES2ES1}], thus, at the end of step P1, the coplanar discharge ignition threshold is exceeded in each cell of the panel, whatever their charge state resulting from the preceding operations, so as to create an initial conditioning state; preferably, V_{ES2ES1_P1_ND}≥ 1.xMax[V_{ET_ES2ES1}], so as not to unnecessarily extend the period P1 and to engage as soon as possible the period P2;
V_{EA2EA1_P1} < Min[V_{ET_EA2EA1}], which means that, at each instant τ of the conditioning step P1, the potential difference between the address electrodes V_{EA2EA1_P1} is kept below Min[V_{ET_EA2EA1}], so that no matrix discharge is generated in the panel during this step; it will be noted that this inequality is satisfied for any instant of P1, knowing that V_{ET_EA2EA1} may vary during P1 depending on the charges created near the electrodes;
V_{EA2EA1_P2_ST} < Min[V_{ET_EA2EA1}], thus, at the start of step P2, the matrix discharge ignition threshold is not exceeded in any of the cells of the panel, whatever their charge state resulting from the preceding operations; preferably, V_{EA2EA1_P2_ST}≥ 0.9 × Min[V_{ET_EA2EA_1}], so that weak matrix discharges start to be initiated in regions of the panel right from the start of step P2; and
V_{EA2EA1_P2_ND} is defined in the same way as in the prior art, namely so as to obtain the desired priming level in all the discharge regions of the panel.

During step P1, the rate of increase of the potential V_ES2ES1 between the sustain electrodes, or the instantaneous value of the slope dV_ES2ES1/dτ is substantially higher than in the prior art, preferably greater than 10 V/µs; during this step P1, the rate of increase of the potential V_EAZEA1 may be zero, low or high, provided that this potential remains less than Min(V_{ET_EA2EA1}].
During step P2, the rate of increase of the potential V_EA2EA1 between the address electrodes, or the instantaneous value of the slope dV_EA2EA1/dτ, is substantially greater than in the prior art, preferably greater than 10 V/µs; during this step P2, the rate of increase of the potential V_ES2ES1 may be zero, low or high.
In general, according to the invention, the charge creation operation is carried out by exceeding all the coplanar discharge thresholds before starting to exceed the first matrix discharge threshold, in such a way that the gas is conditioned before the matrix discharges are started; this is advantageous because the coplanar discharges take place on the material having a high secondary electron emission coefficient, which coats the electrodes of the coplanar plate, thereby making it possible to generate weak coplanar discharges ES1-ES2 with a steep slope during step P1; the conditioning thus achieved during this step P1 then makes it possible to generate, during step P2, weak matrix discharges EA1-EA2 with a gentler slope than in the prior art, despite the generally mediocre secondary emission properties of the material, in general a phosphor, which coats the electrodes of the address plate, this material being used here as cathode; by virtue of the invention, the time for the priming operations can thus be very considerably reduced and correct operation can be achieved with panels having poor phosphor secondary emission properties without in any way losing out on the quality of these operations.

3^rd embodiment: the case of a coplanar panel

This embodiment differs from the previous one in that limited matrix discharges are "tolerated" during the coplanar conditioning period.
Referring to Figure 3, the two steps P1 and P2 are defined as follows:

V_{ES2ES1_P1_ST}< Min[V_{ET_ES2ES}1] and V_{EA2EA1_P1_ST}< MIn[V_{ET_EA2EA1}]; thus, at the start of step P1, the coplanar or matrix discharge ignition threshold is not exceeded in any of the cells of the panel whatever their charge state resulting from the preceding operations; preferably, V_{ES2ES1 P1 ST} ≥ 0.9xMin[V_{ET ES2ES1}] and/or V_{EA2EA1_P1_ST}≥0.9xMin[V_{ET_EA2EA1}], so that coplanar or matrix discharges start to be initiated right from the start of step P1 ;
V_{ES2ES1_P1_ND} > Max[V_{ET_ES2ES1}] and V_{EA2EA1_P1_ND} > Min[V_{ET_EA2EA1}]; thus, at the end of step P1, the coplanar discharge ignition threshold is exceeded in each cell of the panel whatever the charge state resulting from the preceding operations, and also the matrix discharge ignition threshold in all or some of these cells, so as to create an initial conditioning state;
V_{EA2EA1_P2_ND} is defined in the same way as in the prior art, namely so as to obtain the desired priming level in all the discharge regions of the panel.

During step P1, the rate of increase of the potential V_ES2ES1 between the sustain electrodes, or the instantaneous value of the slope dV_ES2ES1/dτ, is substantially greater than in the prior art, preferably greater than 10 V/µs; during this step P1, the rate of increase of the potential V_EA2EA1 is in accordance with the prior art, that is to say less than 5 V/µs.
During step P2, the rate of increase of the potential V_EA2EA1 between the address electrodes or the instantaneous value of the slope dV_EA2EA1/dτ, is substantially greater than in the prior art, preferably greater than 10 V/µs; during this step P2, the rate of increase of the potential V_ES2ES1 may be zero, low or high.
By virtue of the invention, the time for the priming operations can thus be very considerably reduced or correct operation can be achieved with panels having poor phosphor secondary emission properties, without in any way losing out on the quality of these operations.

4^th embodiment: the case of a coplanar or matrix panel

This embodiment provides for the conditioning generated during P1 to be carried out in all or some of the cells by means of a strong discharge, and in the other cells by means of weak discharges. This is not the preferred embodiment, unless the strong discharge is a sustain discharge.

5^th embodiment: the case of a coplanar or matrix panel

The fifth embodiment adds to the four preceding embodiments the possibility of including, between steps P1 and P2, a period without any discharge in all or some of the cells, this period not exceeding a time of 20 µs so that the conditioning effect of P1 is still active at the start of the discharges during P2. The practical use of a period without discharge is known in the prior art and will not be described here in detail: the internal voltages must be kept below the ignition thresholds.
The various embodiments described above by way of non-limiting illustration of the invention make it possible, during the panel reset operations, for the rate of increase of the potentials applied between the electrodes to be increased compared with the prior art; the invention therefore makes it possible:

either to reduce the time allocated to the priming operation and to use it for addressing or sustaining, thereby allowing the fidelity or the peak luminance of the panel to be improved;
or to increase the efficiency of panel manufacture by not rejecting panels that have strong discharges during the priming with a standard slope.

Finally, it is obvious to those skilled in the art to apply the invention to other possible cases in which ramp signals are used for driving plasma panels, without departing from the scope of the claims appended hereto.

Example of the invention and comparative examples

Using the same coplanar-type plasma panel having three arrays of electrodes, comprising two coplanar electrodes X and Y on the front plate and an electrode A on the rear plate for addressing, various types of charge-equalization or reset signals will be applied and their impact on the discharges during applications of these signals will be evaluated.
Such a coplanar panel is known from the prior art and described in the introduction of the present document, with the same references X, Y and A for the electrodes.
Figure 4 shows the timing diagrams for the voltage signals applied to the various electrodes X, Y and A of the panel during a priming operation: a linear voltage ramp characterized by a ramp peak level V_pY, here 400 V, is applied to the sustain and address electrodes Y (corresponding to the electrodes EA2 coincident here with ES2 of the general embodiments described above); over this time, a constant signal V_pX is applied to the X electrode serving only for sustaining (often called the "common" electrode) and a constant signal V_A = 0 is applied to the address electrode A located on the other plate. These signals are used to illustrate the response of a panel to an excessively steep ramp with and without the use of the invention.
During each priming operation, the intensity of the strong discharges D_S which may occur accidentally and are crippling in normal use, is recorded using a photosensitive sensor placed in front of a group of discharge regions of the screen.
The recordings obtained correspond to Figures 5 to 7; all these recordings are produced under the same priming operation conditions, especially application of the linear ramp signal, except for the value of the constant bias signal V_pX of the coplanar electrode X:

Figure 5: V_pX = + 100 V: the internal ignition threshold between the electrodes serving at least for sustaining, Y and X, is then reached later than the internal ignition threshold between the address electrodes Y and A; matrix discharges are therefore given preference; many strong discharges D_S due to an excessively high slope value in the absence of prior conditioning of the cells are observed;
Figure 8: V_pX = - 120 V: the internal ignition threshold between the address electrodes Y and A is then reached later than the internal ignition threshold between the electrodes serving at least for sustaining, Y and X; the initiation of coplanar discharges is therefore given preference; the figure shows the absence of strong discharges D_S thanks to the prior conditioning of the cells by weak coplanar discharges; such a configuration illustrates the invention.

Figures 6 and 7 correspond to intermediate situations, in which V_pX is equal to 0 V and - 80 V respectively, and in which an unacceptable residual of strong discharges D_S is observed.
During each priming operation, the potential difference between the electrodes serving at least for sustaining, Y and X, and the potential difference between the address electrodes Y and A therefore increase with the same linear slope and a situation similar to one of the cases shown in Figure 2, corresponding to the 2^nd general embodiment of the invention described above, occurs; according to the invention as illustrated by Figure 8, the priming operation therefore starts with a first step P1, in which the coplanar discharges are given sufficient preference, by negatively biasing the coplanar electrode X relative to the address electrode A sufficiency; above a certain voltage level between the address electrodes Y and A, matrix discharges are inevitably produced because the matrix ignition thresholds are exceeded, without this time generating strong discharges because the discharge regions have been "conditioned" beforehand by coplanar discharges. The respective bias voltages on X and A therefore determine step P1, which is characterized by only coplanar discharges creating an initial conditioning state of each cell. The intermediate situations shown in Figures 6 and 7 correspond to a simultaneous activation of the coplanar and matrix discharges in certain cells. Since the slope applied between Y and A is as high as that applied between Y and X, the insufficient conditioning results in strong discharges. To prevent the strong discharges D_S, a solution according to the invention would apply a gentler initial slope between the electrodes Y and A, as in the third general embodiment of the invention described above.

Claims

Display device comprising:

an AC plasma panel with memory effect, comprising two plates, leaving a space containing a discharge gas between them, and two arrays of intersecting electrodes (E2, E1) serving at least for addressing, at the intersections of which, in the space between the plates, light discharge regions are defined;

drive means suitable for applying, to the said electrodes, voltage signals suitable for carrying out operations intended to equalize the charges in or reset the said discharge regions;

characterized in that the said drive means are designed so that, during specific operations of resetting a group of discharge regions,
if each discharge region of the panel has an external matrix ignition threshold voltage (V_{ET_E2E1}) between the electrodes serving at least for addressing and intersecting the said region, if Min[V_{ET_E2E1}] and Max[V_{ET_E2E1}] are respectively the minimum value and the maximum value of the matrix ignition voltage (V_{ET_E2E1}) of the regions of the said group,
the potential difference V_E2E1 applied between the electrodes serving at least for addressing and intersecting the said regions of this group increases as soon as V_E2E1 has exceeded the value 1.1 x Max[V_{ET_E2E1}] during the said reset operation, with what is called an end-of-operation slope that is steeper than the maximum slope of the growth of V_E2E1 during the instants when V_E2E1 is between Min[V_{ET_E2E1}] and Max[V_{ET_E2E1}].
Display device comprising:

an AC plasma panel with memory effect, comprising two plates leaving a space containing a discharge gas between them, two arrays of intersecting electrodes (EA2, EA1) serving at least for addressing, at the intersections of which, in the space between the plates, light discharge regions are defined, at least two arrays of electrodes (ES2, ES1,) serving at least for sustaining and placed so that one of the electrodes (ES2, ES1) of each of these arrays passes over each discharge region;

drive means suitable for applying, to the said electrodes (EA2, EA1, ES2, ES1), voltage signals suitable for carrying out reset operations intended to equalize the charges in or reset the said discharge regions,

characterized in that the said drive means are designed so that, during specific operations of resetting a group of discharge regions,
if each discharge region of the panel has an external matrix ignition threshold voltage (V_{ET_EA2EA1}) between the electrodes (EA2, EA1) serving at least for addressing and intersecting the said region, if Min[V_{ET_EA2EA1}] and Max[V_{ET_EA2EA1}] are respectively the minimum value and the maximum value of the matrix ignition voltage (V_{ET_EA2EA1}) of the regions of the said group, if each discharge region of the panel has an external coplanar ignition threshold voltage (V_{ET_ES2ES1}) between the electrodes (ES2, ES1) serving at least for sustaining and passing over the said region and if Min[V_{ET_ES2ES1}] and Max[V_{ET_ES2ES1}] are respectively the minimum value and the maximum value of the coplanar ignition voltage (V_{ET_ES2ES1}) of the regions of the said group,

either the potential difference V_EA2EA1 applied between the electrodes (EA2, EA1) serving at least for addressing and intersecting the said regions of this group does not exceed the value Min[V_{ET_EA2EA1}] while the potential difference V_ES2ES1 applied between the electrodes (ES2, ES1) serving at least for sustaining and passing over the said regions of this group does not exceed the value Max[V_{ET_ES2ES1}] and increases with what is called a positive end-of-operation slope as soon as the potential difference V_ES2S1 applied between these electrodes (ES2, ES1) serving at least for sustaining has exceeded the value Max[V_{ET_ES2ES1}],

or the potential difference V_EA2EA1 applied between the electrodes (EA2, EA1) serving at least for addressing and intersecting the said regions of this group increases, as soon as the potential difference V_ES2ES1 applied between the electrodes (ES2, ES1) serving at least for sustaining and passing over the said regions has exceeded the value Max[V_{ET_ES2ES1}], with what is called a positive end-of-operation slope, which is steeper than the maximum slope for growth of V_EA2EA1 during the instants when V_ES2ES1 is between Min[V_{ET_ES2ES1}] and Max[V_{ET_ES2ES1}].
Device according to Claim 1 or 2, characterized in that the said end-of-operation slope for increasing the potential difference between the electrodes serving at least for addressing is greater than 5 V/µs.
Device according to Claim 3, characterized in that the said end-of-operation slope for increasing the potential difference between the electrodes serving at least for addressing is greater than 10V/µs.
Device according to any one of the preceding claims when it depends on Claim 2, characterized in that, when V_ES2ES1 is between Min[V_{ET_ES2ES1}] and MaX[V_{ET_ES2ES1}], the potential difference V_ES2ES1 applied between the electrodes serving at least for sustaining increases with what is called a start-of-operation slope that is greater than 5 V/µs.
Device according to Claim 5, characterized in that the said start-of-operation slope for increasing the potential difference between the electrodes serving at least for sustaining is greater than 10 V/µs.
Device according to any one of the preceding claims, characterized in that during each of the said specific reset operations, the said potential difference (V_E2E1; V_EA2EA1) applied between the electrodes serving at least for addressing is uniform and strictly increasing when Min[V_{ET_E2E1}] < V_E2E1 < Max[V_{ET_E2E1}], or when Min[V_{ET_EA2EA1}] < V_EA2EA1 < Max[V_{ET_EA2EA1}].
Device according to any one of the preceding claims when it depends on Claim 2, characterized in that, during each of the said specific charge-equalization or reset operations, the said potential difference (V_ES2ES1) applied between the electrodes serving at least for sustaining is uniform and strictly increasing when Min[V_{ET_ES2ES1}] < V_ES2ES1 < Max[V_{ET_ES2ES1}].