EP0237193A3 - Backplane structure for a computer superpositioning scalar and vector operations - Google Patents

Backplane structure for a computer superpositioning scalar and vector operations Download PDF

Info

Publication number
EP0237193A3
EP0237193A3 EP87301170A EP87301170A EP0237193A3 EP 0237193 A3 EP0237193 A3 EP 0237193A3 EP 87301170 A EP87301170 A EP 87301170A EP 87301170 A EP87301170 A EP 87301170A EP 0237193 A3 EP0237193 A3 EP 0237193A3
Authority
EP
European Patent Office
Prior art keywords
backplane
computer
sections
series
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP87301170A
Other languages
German (de)
French (fr)
Other versions
EP0237193A2 (en
Inventor
Hanan Potash
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Scientific Computer Systems Corp
Original Assignee
Scientific Computer Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Scientific Computer Systems Corp filed Critical Scientific Computer Systems Corp
Publication of EP0237193A2 publication Critical patent/EP0237193A2/en
Publication of EP0237193A3 publication Critical patent/EP0237193A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/14—Mounting supporting structure in casing or on frame or rack
    • H05K7/1438—Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1439—Back panel mother boards
    • H05K7/1445—Back panel mother boards with double-sided connections

Abstract

A backplane structure for a computer includes first and second spaced apart backplane sections each having a series of spaced, vertical connector assemblies for receiving edge connectors of a series of parallel spaced apart circuit boards in a vertical orientation. Spaced bus lines run horizontally across each backplane section for interconnecting appropri­ ate pins of the respective circuit board connectors. One of the backplane sections receives circuit boards of the memory section of a computer, and the other section receives the computer functional unit boards. A third backplane section extends between the first and second sections and has a series of spaced horizontal connector assemblies for receiv­ ing connector edges of a series of circuit boards in a horizontal orientation. At least some of the horizontal connector assemblies receive circuit boards of the buffer section of a computer. Each horizontal buffer board connec­ tor assembly is connected at each end to a respective selected portion of the bus lines of the first and second backplane sections, respectively, so a connected buffer board can act as a bridge between these sections.
EP87301170A 1986-02-28 1987-02-11 Backplane structure for a computer superpositioning scalar and vector operations Withdrawn EP0237193A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US834942 1986-02-28
US06/834,942 US4777615A (en) 1986-02-28 1986-02-28 Backplane structure for a computer superpositioning scalar and vector operations

Publications (2)

Publication Number Publication Date
EP0237193A2 EP0237193A2 (en) 1987-09-16
EP0237193A3 true EP0237193A3 (en) 1989-02-15

Family

ID=25268176

Family Applications (1)

Application Number Title Priority Date Filing Date
EP87301170A Withdrawn EP0237193A3 (en) 1986-02-28 1987-02-11 Backplane structure for a computer superpositioning scalar and vector operations

Country Status (3)

Country Link
US (1) US4777615A (en)
EP (1) EP0237193A3 (en)
JP (1) JPS6324315A (en)

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US4831634A (en) * 1988-07-15 1989-05-16 Bull Hn Information Systems Inc. Modem backplane interconnections
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US5359714A (en) * 1992-01-06 1994-10-25 Nicolas Avaneas Avan computer backplane-a redundant, unidirectional bus architecture
WO1993025968A1 (en) * 1992-06-10 1993-12-23 Furtek Frederick C A modular computer based on reconfigurable logic
US5296748A (en) * 1992-06-24 1994-03-22 Network Systems Corporation Clock distribution system
DE4229644A1 (en) * 1992-09-04 1994-03-10 Luetze Friedrich Elektro Field station for a serial bus system controlled by a control computer
US5548734A (en) * 1993-03-26 1996-08-20 Intel Corporation Equal length symmetric computer bus topology
US5379193A (en) * 1993-07-27 1995-01-03 International Business Machines Corporation Parallel processor structure and package
US6092139A (en) * 1994-03-11 2000-07-18 Crane, Jr.; Stanford W. Passive backplane capable of being configured to a variable data path width corresponding to a data size of the pluggable CPU board
EP0977127A2 (en) * 1994-03-11 2000-02-02 The Panda Project Method for configuring a computer system
US5680536A (en) * 1994-03-25 1997-10-21 Tyuluman; Samuel A. Dual motherboard computer system
US5625802A (en) * 1994-12-12 1997-04-29 Digital Equipment Corporation Apparatus and method for adapting a computer system to different architectures
US5603044A (en) * 1995-02-08 1997-02-11 International Business Machines Corporation Interconnection network for a multi-nodal data processing system which exhibits incremental scalability
FI971718A (en) 1997-04-22 1998-10-23 Nokia Telecommunications Oy Adding card slots to a high-capacity bus
US6351786B2 (en) 1998-08-24 2002-02-26 Racal Instr Inc VXI backplane system improvements and methods
US5991163A (en) * 1998-11-12 1999-11-23 Nexabit Networks, Inc. Electronic circuit board assembly and method of closely stacking boards and cooling the same
FI991028A (en) * 1999-05-05 2000-11-06 Nokia Networks Oy Arrangement and procedure at cross node node stand
US6609169B1 (en) * 1999-06-14 2003-08-19 Jay Powell Solid-state audio-video playback system
DE19938429B4 (en) * 1999-08-13 2007-03-15 Force Computers Gmbh computer
US6356966B1 (en) * 2000-09-12 2002-03-12 Apw Ltd. System and method for bridging bus segments on a backplane and coupling single board computers to a backplane
US7308357B2 (en) * 2004-11-12 2007-12-11 John Edgar Jones Component navigation system for a sailing vessel
WO2006082480A2 (en) * 2005-02-05 2006-08-10 Jones John E Component navigation system for a sailing vessel
US7469201B2 (en) * 2005-06-17 2008-12-23 Dspace Digital Signal Processing And Control Engineering Gmbh Process and means for block-based modeling
JP4582082B2 (en) * 2006-11-30 2010-11-17 ブラザー工業株式会社 Circuit unit
US9829935B2 (en) * 2012-04-23 2017-11-28 Microsoft Technology Licensing, Llc SAS integration with tray and midplane server architecture
CN108121412A (en) * 2016-11-30 2018-06-05 中兴通讯股份有限公司 Backboard equipment, signal interconnection method and device

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US4144565A (en) * 1977-01-06 1979-03-13 International Business Machines Corporation Input/output interface connector circuit for repowering and isolation

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Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
US4128880A (en) * 1976-06-30 1978-12-05 Cray Research, Inc. Computer vector register processing
US4144565A (en) * 1977-01-06 1979-03-13 International Business Machines Corporation Input/output interface connector circuit for repowering and isolation

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELECTRONICS WEEK, vol. 58, no. 4, January 1985, pages 51-54, New York, US; G LAWRENCE: "Connectors boost system" *
IEEE INTERNATIONAL CONFERENCE ON CIRCUITS AND COMPUTERS 82, New York, 28th September - 1st October 1982, pages 60-62; IEEE Computer Society L.A, USA, V.A. TRUYILLO: "Implementation of a fully reconfigurable multimicroprocessor *

Also Published As

Publication number Publication date
US4777615A (en) 1988-10-11
JPS6324315A (en) 1988-02-01
EP0237193A2 (en) 1987-09-16

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Inventor name: POTASH, HANAN