EP0107028A2 - Circuit arrangement with a transistor output circuit and a protection circuit for limiting the output current of the transistor output circuit - Google Patents

Circuit arrangement with a transistor output circuit and a protection circuit for limiting the output current of the transistor output circuit Download PDF

Info

Publication number
EP0107028A2
EP0107028A2 EP83109227A EP83109227A EP0107028A2 EP 0107028 A2 EP0107028 A2 EP 0107028A2 EP 83109227 A EP83109227 A EP 83109227A EP 83109227 A EP83109227 A EP 83109227A EP 0107028 A2 EP0107028 A2 EP 0107028A2
Authority
EP
European Patent Office
Prior art keywords
transistor
emitter
base
collector
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP83109227A
Other languages
German (de)
French (fr)
Other versions
EP0107028B1 (en
EP0107028A3 (en
Inventor
Bernd Dipl.-Ing. Kalkhof
Karl Nagel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP0107028A2 publication Critical patent/EP0107028A2/en
Publication of EP0107028A3 publication Critical patent/EP0107028A3/en
Application granted granted Critical
Publication of EP0107028B1 publication Critical patent/EP0107028B1/en
Expired legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0826Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in bipolar transistor switches

Definitions

  • the invention relates to a circuit arrangement according to the preamble of the main claim.
  • Circuit arrangements of this type are already known in which the output transistor is used to switch the load on and off.
  • the load can be designed as an ohmic or an inductive load (for example an incandescent lamp or relay). Furthermore, it is possible to design such circuit arrangements in discrete technology, in monolithically integrated technology or in hybrid technology. If the load is short-circuited in the event of a fault, there is a risk that the output transistor will be destroyed.
  • the circuit arrangement according to the invention with the characterizing features of the main claim has the advantage that the output current flowing over the emitter-collector path of the output transistor is limited and that the output transistor is thereby protected against destruction in the event of a short circuit. Further advantages result from the subclaims.
  • Claim 2 provides an increase in the accuracy of the short-circuit current limitation by increasing the gain.
  • Claim 5 offers the possibility of keeping the power loss in the load constant.
  • the measures specified in claim 6 serve to suppress unwanted vibrations.
  • FIG. 1 a circuit arrangement is shown with an output transistor, which consists of two npn transistors T 7 , T 8 , which are connected to each other in a Darlington circuit.
  • the collector of the output transistor T 73 T 8 is located at one end of a load L, the other end of which is connected to the positive terminal of a battery.
  • the emitter of the output transistor T 7 , T 8 is connected to the negative terminal of the battery via an ohmic resistor R 1 .
  • T 7 , T 8 is a control circuit, not shown in the drawing, which is used to control the output transistor T 79 T 8 during normal operation of the circuit arrangement.
  • the ohmic resistor R 1 lying between the emitter of the output transistor T 7 , T 8 and the negative terminal of the battery forms the controlled system of a reference current source which is independent of the supply voltage and is known per se and is designed as a ring current source and which is between a positive operating current line 10 and a negative operating current line 9 is arranged.
  • the positive operating current line 10 is connected to the positive terminal of the battery and the negative operating current line 9 to the negative terminal of the battery.
  • the decoupling current I 1 of the reference current source is also fed to the control connection 20 of the output transistor T 7 , T 8 .
  • a reference current source of this type is known, for example, from the magazine "Philips Technische Rundschau", 32nd year, 1971/72, No. 1, page 8, Fig. 10.
  • an npn transistor T 9 can be provided, the emitter-base path of which is parallel to the emitter-base path of the transistor T 8 and the collector of which is connected to the base 20 of the transistor T 7 .
  • the transistor T 9 then forms, together with the transistors T 7 , T 8, a current mirror circuit, the input of which is formed by the collector of the transistor T 9 and the output of which is formed by the collector of the transistor T 8 , the pretransistor T 7 of the Darlington circuit as the base current amplifier of the Current mirror acts.
  • the emitter area of the transistor T 9 is denoted by E.
  • the transistor T 8 can have an emitter area mE different from the area E, wherein m is preferably greater than one.
  • the reference current source designed as a ring current source can consist of the transistors T 1 , T 2 , T 3 , T 4 , T 5 , T 6 , the transistors T 1 and T 2 as npn transistors and the transistors T 3 , T 4 , T 5 , T 6 are designed as p n p transistors.
  • the transistors T 1 to T 6 are interconnected as described below: the transistor T 3 is connected with its emitter to the positive operating current line 10 and with its collector to the collector of the transistor T, while its base is connected to the bases of the transistors T 4 and T 6 is connected.
  • the emitter of the transistor T 3 has the area E, the emitter of the transistor T 4 is connected to the operating current line 10 and its collector is connected to the collector of the transistor T 2 .
  • the transistor T 4 has the emitter area E.
  • the bases of the transistors T 3 and T 4 are connected to the collector of the transistor T 3 via the emitter-base path of the transistor T 5 , the collector of the transistor T 5 being connected to the negative operating current line 9 is connected.
  • the transistors T 3 , T 4 , T 5 act as a current mirror, the transistor T 5 serving as a base current amplifier.
  • the emitter of the transistor T 1 has the emitter area kE and is connected via the resistor R 1 to the negative operating current line 9, while its base is connected to the base and to the collector of the transistor T 2 .
  • the emitter of transistor T 2 has the area nE and is connected to the negative operating current line 9.
  • the coupling-out transistor T 6 the emitter of which is used to provide the coupling-out current I 1 of the reference current source has the area pE and is connected to the positive operating current line 10, while the collector of the transistor T 6 supplies the output current I 1 and is connected to the control terminal 20 of the output transistor T 7 , T 8 .
  • the ring current source described represents a simplified embodiment of the above-mentioned current source known from the magazine "Philips Technische Rundschau".
  • the collector of the transistor T 6 is connected via a capacitance 13 to the collector of the output transistor T 7 , T 8 .
  • the temperature voltage U T is proportional to the absolute temperature.
  • the temperature coefficient is + 3.3 ⁇ / K. If one chooses a resistor with the same temperature coefficient for the resistor R 1 , the arrangement is temperature compensated. It is even more favorable to choose the temperature coefficient of the resistance R 1 larger than the temperature coefficient of the temperature voltage U T in order to obtain a smaller and smaller output power as the temperature rises, ie also a lower power loss.
  • a metal resistor with a temperature coefficient of 3.9 ⁇ / K is ideal here.
  • the positive operating current line 10 is connected to the collector of the output transistor T 73 T 8 , which in turn is connected to the positive terminal of the battery via the load L.
  • the reference current source is again between the positive operating current line 10 and the negative operating current line 9.
  • the resistor R 1 lies between the emitter of the transistor T 8 and the negative operating current line 9.
  • the interconnected emitters of the two transistors T 8 and T 9 are via the resistor R. 3 connected to the emitter of the transistor T 1 , while a resistor R 2 leads from the emitter of the transistor T 1 to the positive operating current line 10.
  • Figure 3 shows a further variant of a circuit arrangement according to the invention.
  • the structure largely corresponds to the exemplary embodiment according to FIGS. 1 and 2.
  • the load L lies in the emitter lead of the output transistor T 7 , T 8 , while its collector is connected to the positive battery terminal to which the positive operating current line 10 is connected directly.
  • the controlled system R 1 of the reference current source lies between the emitter of the output transistor T 7 , T 8 and the load L, the negative operating current line 9 being connected to the connecting line leading from the controlled system R 1 to the load L.
  • the potential of the first operating current line is not derived 1 0 of the reference current source of the potential of the positive terminal of the battery. Rather, there the operating current line 10 is disconnected from the positive terminal of the battery and instead connected to an external connection 20 ', which serves as the control connection of the entire circuit arrangement and acts instead of the connection 20 as the "base" of the output transistor T 73 T 8 .
  • this connection 20 ' is supplied with the control signal which is to be supplied to the base 20 of the output transistor T 7 , T 8 and is used to control this transistor.
  • the entire circuit arrangement therefore acts as a modified Darlington transistor.
  • the exemplary embodiment according to FIG. 5 also contains the resistors R 2 , R 3 already used in the exemplary embodiment according to FIG. 2 for current feedback control.
  • the switching elements R 6 , Z 1 , Z 2 , R 5 , T 12 and T 13 are also provided for overvoltage shutdown.
  • the resistor R 5 has the transit sis t e n T or derive the object, reverse currents 12 and T 13 and to operate the Zener diodes Z 1 and Z 2 in a defined operating point.
  • the overvoltage cut-off or the use of reverse regulation can be adapted to the various applications by appropriately selecting the Zener voltages.

Abstract

Es wird eine Schaltungsanordnung mit einem mit seinem Kollektor an dem einen Ende einer Last (L) liegenden Ausgangstransistor (T7, TB) vorgeschlagen, bei der das andere Ende der Last (L) an eine erste Batterieklemme (+) angeschlossen ist und der Emitter des Ausgangstransistors (T7, T8) mit einer zweiten Batterieklemme (-) verbunden ist, wobei an den Steueranschluß (20) des Ausgangstransistors (T7, TB) eine Steuerschaltung angeschlossen ist. Zur Begrenzung des über die Emitter-Kollektor-Strecke des Ausgangstransistors (T7, T8) fließenden Ausgangsstroms ist eine Bezugsstromquelle vorgesehen, die zwischen einer ersten Betriebsstromleitung (10) und einer zweiten Betriebsstromleitung (9) angeordnet ist, wobei die erste Betriebsstromleitung (10) an die erste Batterieklemme (+) und die zweite Betriebsstromleitung (9) an die zweite Batterieklemme (-) angeschlossen ist. Die aus einem ohmschen Widerstand (R1) bestehende Regelstrecke der Bezugsstromquelle liegt dabei zwischen dem Emitter des Ausgangstransistors (T7, TB) und der zweiten Betriebsstromleitung (9), und der Auskoppelstrom (I1) der Bezugsstromquelle ist dem Steueranschluß (20) des Ausgangstransistors (T7, T8) zugeführt.

Figure imgaf001
A circuit arrangement is proposed with an output transistor (T 7 , T B ) with its collector at one end of a load (L), in which the other end of the load (L) is connected to a first battery terminal (+) and the Emitter of the output transistor (T 7 , T 8 ) is connected to a second battery terminal (-), a control circuit being connected to the control terminal (20) of the output transistor (T 7 , T B ). To limit the output current flowing through the emitter-collector path of the output transistor (T 7 , T 8 ), a reference current source is provided, which is arranged between a first operating current line (10) and a second operating current line (9), the first operating current line (10 ) is connected to the first battery terminal (+) and the second operating current line (9) to the second battery terminal (-). The controlled system consisting of an ohmic resistor (R 1 ) of the reference current source lies between the emitter of the output transistor (T 7 , T B ) and the second operating current line (9), and the decoupling current (I 1 ) of the reference current source is the control connection (20) of the output transistor (T 7 , T 8 ) supplied.
Figure imgaf001

Description

Stand der TechnikState of the art

Die Erfindung betrifft eine Schaltungsanordnung nach der Gattung des Hauptanspruchs.The invention relates to a circuit arrangement according to the preamble of the main claim.

Es.sind bereits Schaltungsanordnungen dieser Art bekannt, bei denen der Ausgangstransistor zum Ein- und Ausschalten der Last dient. Die Last kann dabei als ohmsche oder als induktive Last (beispielsweise Glühlampe oder Relais) ausgebildet sein. Ferner ist es möglich, derartige Schaltungsanordnungen in diskreter Technik, in monolithisch integrierter Technik oder in Hybridtechnik auszubilden. Wird im Störfall die Last kurzgeschlossen, so besteht die Gefahr, daß der Ausgangstransistor zerstört wird.Circuit arrangements of this type are already known in which the output transistor is used to switch the load on and off. The load can be designed as an ohmic or an inductive load (for example an incandescent lamp or relay). Furthermore, it is possible to design such circuit arrangements in discrete technology, in monolithically integrated technology or in hybrid technology. If the load is short-circuited in the event of a fault, there is a risk that the output transistor will be destroyed.

Aus der Zeitschrift "Philips Technische Rundschau", 32. Jahrgang, 1971/72, Nr. 1, Seite 8, Abb. 10, ist ferner eine von der Versorgungsspannung unabhängige, als Ringstromquelle ausgebildete Bezugsstromquelle bekannt. In der deutschen Patentanmeldung P 31 46 600 wurde darüber hinaus eine modifizierte Ringstromquelle dieser Art vorgeschlagen.From the magazine "Philips Technische Rundschau", 32nd year, 1971/72, No. 1, page 8, Fig. 10, a reference current source which is independent of the supply voltage and is designed as a ring current source is also known. In the German patent application P 31 46 600, a modified ring current source of this type has also been proposed.

Vorteile der ErfindungAdvantages of the invention

Die erfindungsgemäße Schaltungsanordnung mit den kennzeichnenden Merkmalen des Hauptanspruchs hat den Vorteil, daß der über die Emitter-Kollektor-Strecke des Ausgangstransistors fließende Ausgangsstrom begrenzt wird und daß dadurch der Ausgangstransistor im Kurzschlußfall vor Zerstörung geschützt wird. Weitere Vorteile ergeben sich aus den Unteransprüchen. Anspruch 2 liefert dabei eine Erhöhung der Genauigkeit der Kurzschlußstrombegrenzung durch Vergrößerung der Verstärkung. Anspruch 5 bietet die Möglichkeit, die Verlustleistung in der Last konstant zu halten. Die im Anspruch 6 angegebenen Maßnahmen dienen zur Unterdrückung unerwünschter Schwingungen.The circuit arrangement according to the invention with the characterizing features of the main claim has the advantage that the output current flowing over the emitter-collector path of the output transistor is limited and that the output transistor is thereby protected against destruction in the event of a short circuit. Further advantages result from the subclaims. Claim 2 provides an increase in the accuracy of the short-circuit current limitation by increasing the gain. Claim 5 offers the possibility of keeping the power loss in the load constant. The measures specified in claim 6 serve to suppress unwanted vibrations.

Zeichnungdrawing

Fünf Ausführungsbeispiele der erfindungsgemäßen Schaltungsanordnung sind in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert. Es zeigen:

  • Figuren 1 bis 5 je eines der Ausführungsbeispiele.
Five exemplary embodiments of the circuit arrangement according to the invention are shown in the drawing and explained in more detail in the following description. Show it:
  • Figures 1 to 5 each one of the embodiments.

Beschreibung der AusführungsbeispieleDescription of the embodiments

In Figur 1 ist eine Schaltungsanordnung mit einem Ausgangstransistor dargestellt, der aus zwei npn-Transistoren T7, T8 besteht, die in Darlingtonschaltung miteinander verbunden sind. Der Kollektor des Ausgangstransistors T73 T8 liegt an dem einen Ende einer Last L, deren anderes Ende an die Plusklemme einer Batterie angeschlossen ist. Der Emitter des Ausgangstransistors T7, T8 ist über einen ohmschen Widerstand R1 mit der Minusklemme der Batterie verbunden. An einen Steueranschluß 20 des AusgangstransistorsIn Figure 1, a circuit arrangement is shown with an output transistor, which consists of two npn transistors T 7 , T 8 , which are connected to each other in a Darlington circuit. The collector of the output transistor T 73 T 8 is located at one end of a load L, the other end of which is connected to the positive terminal of a battery. The emitter of the output transistor T 7 , T 8 is connected to the negative terminal of the battery via an ohmic resistor R 1 . To a control terminal 20 of the output transistor

T7, T8 ist eine in der Zeichnung nicht dargestellte Steuerschaltung gelegt, die beim normalen Betrieb der Schaltungsanordnung zur Ansteuerung des Ausgangstransistors T79 T8 dient.T 7 , T 8 is a control circuit, not shown in the drawing, which is used to control the output transistor T 79 T 8 during normal operation of the circuit arrangement.

Erfindungsgemäß bildet der zwischen dem Emitter des Ausgangstransistors T7, T8 und der Minusklemme der Batterie liegende ohmsche Widerstand R1 die Regelstrecke einer von der Versorgungsspannung unabhängigen, an sich bekannten, als Ringstromquelle ausgebildeten Bezugsstromquelle, die zwischen einer positiven Betriebsstromleitung 10 und einer negativen Betriebsstromleitung 9 angeordnet ist. Die positive Betriebsstromleitung 10 ist dabei an die Plusklemme der Batterie und die negative Betriebsstromleitung 9 an die Minusklemme der Batterie angeschlossen. Erfindungsgemäß wird ferner der Auskoppelstrom I1 der Bezugsstromquelle dem Steueranschluß 20 des Ausgangstransistors T7, T8 zugeführt. Eine Bezugsstromquelle dieser Art ist beispielsweise aus der Zeitschrift "Philips Technische Rundschau", 32. Jahrgang, 1971/72, Nr. 1, Seite 8, Abb. 10, bekannt.According to the invention, the ohmic resistor R 1 lying between the emitter of the output transistor T 7 , T 8 and the negative terminal of the battery forms the controlled system of a reference current source which is independent of the supply voltage and is known per se and is designed as a ring current source and which is between a positive operating current line 10 and a negative operating current line 9 is arranged. The positive operating current line 10 is connected to the positive terminal of the battery and the negative operating current line 9 to the negative terminal of the battery. According to the invention, the decoupling current I 1 of the reference current source is also fed to the control connection 20 of the output transistor T 7 , T 8 . A reference current source of this type is known, for example, from the magazine "Philips Technische Rundschau", 32nd year, 1971/72, No. 1, page 8, Fig. 10.

Darüber hinaus kann ein npn-Transistor T9 vorgesehen sein, dessen Emitter-Basis-Strecke parallel zur Emitter-Basis-Strecke des Transistors T8 liegt und dessen Kollektor an die Basis 20 des Transistors T7 angeschlossen ist. Der Transistor T9 bildet dann zusammen mit den Transistoren T7, T8 eine Stromspiegelschaltung, deren Eingang durch den Kollektor des Transistors T9 und deren Ausgang durch den Kollektor des Transistors T8 gebildet wird, wobei der Vortransistor T7 der Darlingtonschaltung als Basisstromverstärker des Stromspiegels wirkt. Die Emitterfläche des Transistors T9 ist dabei mit E bezeichnet. Der Transistor T8 kann eine von der Fläche E verschiedene Emitterfläche mE haben, wobei m vorzugsweise größer als Eins ist.In addition, an npn transistor T 9 can be provided, the emitter-base path of which is parallel to the emitter-base path of the transistor T 8 and the collector of which is connected to the base 20 of the transistor T 7 . The transistor T 9 then forms, together with the transistors T 7 , T 8, a current mirror circuit, the input of which is formed by the collector of the transistor T 9 and the output of which is formed by the collector of the transistor T 8 , the pretransistor T 7 of the Darlington circuit as the base current amplifier of the Current mirror acts. The emitter area of the transistor T 9 is denoted by E. The transistor T 8 can have an emitter area mE different from the area E, wherein m is preferably greater than one.

Die als Ringstromquelle ausgebildete Bezugsstromquelle kann aus den Transistoren T1, T2, T3, T4, T5, T6 bestehen, wobei die Transistoren T1 und T2 als npn-Transistoren und die Transistoren T3, T4, T5, T6 als pnp- Transistoren ausgebildet sind. Die Transistoren T1 bis T6 sind dabei wie im folgenden beschrieben zusammengeschaltet: Der Transistor T3 ist mit seinem Emitter an die positive Betriebsstromleitung 10 und mit seinem Kollektor an den Kollektor des Transistors T angeschlossen, während seine Basis an die Basen der Transistoren T4 und T6 angeschlossen ist. Der Emitter des Transistors T3 hat die Fläche E, der Emitter des Transistors T4 ist an die Betriebsstromleitung 10, sein Kollektor an den Kollektor des Transistors T2 angeschlossen. Der Transistor T4 hat die Emitterfläche E. Die Basen der Transistoren T3 und T4 sind über die Emitter-Basis-Strecke des Transistors T5 mit dem Kollektor des Transistors T3 verbunden, wobei der Kollektor des Transistors T5 an die negative Betriebsstromleitung 9 angeschlossen ist. Die Transistoren T3, T4, T5 wirken dabei als Stromspiegel, wobei der Transistor T5 als Basisstromverstärker dient. Der Emitter des Transistors T1 hat die Emitterfläche kE und ist über den Widerstand R1 an die negative Betriebsstromleitung 9 angeschlossen, während seine Basis an die Basis und an den Kollektor des Transistors T2 angeschlossen ist. Der Emitter des Transistors T2 hat die Fläche nE und ist an die negative Betriebsstromleitung 9 angeschlossen. Zur Bereitstellung des Auskoppelstroms I1 der Bezugsstromquelle dient der Auskoppeltransistor T6, dessen Emitter die Fläche pE hat und an die positive Betriebsstromleitung 10 angeschlossen ist, während der Kollektor des Transistors T6 den Auskoppelstrom I1 liefert und an den Steueranschluß 20 des Ausgangstransistors T7, T8 angeschlossen ist. Die beschriebene Ringstromquelle stellt eine vereinfachte Ausführungsform der obenerwähnten, aus der Zeitschrift "Philips Technische Rundschau" bekannten Stromquelle dar.The reference current source designed as a ring current source can consist of the transistors T 1 , T 2 , T 3 , T 4 , T 5 , T 6 , the transistors T 1 and T 2 as npn transistors and the transistors T 3 , T 4 , T 5 , T 6 are designed as p n p transistors. The transistors T 1 to T 6 are interconnected as described below: the transistor T 3 is connected with its emitter to the positive operating current line 10 and with its collector to the collector of the transistor T, while its base is connected to the bases of the transistors T 4 and T 6 is connected. The emitter of the transistor T 3 has the area E, the emitter of the transistor T 4 is connected to the operating current line 10 and its collector is connected to the collector of the transistor T 2 . The transistor T 4 has the emitter area E. The bases of the transistors T 3 and T 4 are connected to the collector of the transistor T 3 via the emitter-base path of the transistor T 5 , the collector of the transistor T 5 being connected to the negative operating current line 9 is connected. The transistors T 3 , T 4 , T 5 act as a current mirror, the transistor T 5 serving as a base current amplifier. The emitter of the transistor T 1 has the emitter area kE and is connected via the resistor R 1 to the negative operating current line 9, while its base is connected to the base and to the collector of the transistor T 2 . The emitter of transistor T 2 has the area nE and is connected to the negative operating current line 9. The coupling-out transistor T 6 , the emitter of which is used to provide the coupling-out current I 1 of the reference current source has the area pE and is connected to the positive operating current line 10, while the collector of the transistor T 6 supplies the output current I 1 and is connected to the control terminal 20 of the output transistor T 7 , T 8 . The ring current source described represents a simplified embodiment of the above-mentioned current source known from the magazine "Philips Technische Rundschau".

Darüber hinaus ist der Kollektor des Transistors T6 über eine Kapazität 13 mit dem Kollektor des Ausgangstransistors T7, T8 verbunden.In addition, the collector of the transistor T 6 is connected via a capacitance 13 to the collector of the output transistor T 7 , T 8 .

Wenn die Stromverstärkungender pnp-Transistoren und der npn-Transistoren beide groß gegenüber Eins sind, dann erzwingt der aus den Transistoren T3, T4 und T5 bestehende Stromspiegel Stromgleichheit. Es gilt dann für die Flußspannungen der Transistoren T1 und T2:

Figure imgb0001
und
Figure imgb0002
wobei UT =
Figure imgb0003
T die Temperaturspannung, K die Boltzmannkonstante, q die Elementarladung, T die absolute Temperatur und IS der Sättigungsstrom ist. Der Spannungsabfall am Widerstand R1 ist:
Figure imgb0004
If the current gains of the pnp transistors and the npn transistors are both large compared to one, then the current mirror consisting of the transistors T 3 , T 4 and T 5 enforces current equality. It then applies to the forward voltages of transistors T 1 and T 2 :
Figure imgb0001
and
Figure imgb0002
where U T =
Figure imgb0003
T is the temperature voltage, K is the Boltzmann constant, q is the elementary charge, T is the absolute temperature and I S is the saturation current. The voltage drop across resistor R 1 is:
Figure imgb0004

Dabei ist

Figure imgb0005
Figure imgb0006
It is
Figure imgb0005
Figure imgb0006

Der Spannungsumlauf an den Schaltungselementen T1, T2 und R1 ergibt:

Figure imgb0007
The voltage circulation at the circuit elements T 1 , T 2 and R 1 results in:
Figure imgb0007

Durch Einsetzen der Werte aus den Gleichungen (1) bis (5) in Gleichung (6) erhält man:

Figure imgb0008
By inserting the values from equations (1) to (5) into equation (6) one obtains:
Figure imgb0008

Durch die anhand der Figur 1 beschriebenen Schaltungsmaßnahmen wird also der über die Emitter-Kollektor-Strecke des Ausgangstransistors T73 T8 im Kurzschlußfall fließende Ausgangsstrom unter Einbeziehung des dritten Transistors T9 auf den in Gleichung (7) angegebenen Wert begrenzt, wobei UT, wie oben angegeben, die Temperaturspannung ist. In der Praxis werden m und p groß sein, um größere Ausgangsströme zu erreichen. Entfällt der dritte Transistor T9, so geht p gegen unendlich. Damit wird aus Gleichung (7)

Figure imgb0009
The circuit measures described with reference to FIG. 1 thus limit the output current flowing over the emitter-collector path of the output transistor T 73 T 8 in the event of a short circuit, including the third transistor T 9, to the value given in equation (7), where U T , as stated above, the temperature voltage is. In practice, m and p will be large to achieve larger output currents. If the third transistor T 9 is omitted , then p goes to infinity. Equation (7)
Figure imgb0009

Die Temperaturspannung UT ist proportional zur absoluten Temperatur. Der Temperaturkoeffizient beträgt dabei + 3,3 ‰/K. Wählt man für den Widerstand R1 einen Widerstand mit demselben Temperaturkoeffizienten, so wird die Anordnung temperaturkompensiert. Günstiger ist noch, den Temperaturkoeffizienten des Widerstandes R1 größer als den Temperaturkoeffizienten der Temperaturspannung UT zu wählen, um mit steigender Temperatur einen kleiner werdenden Ausgangsstrom, d.h. auch eine geringere Verlustleistung zu erhalten. Hier bietet sich ein Metallwiderstand mit einem Temperaturkoeffizienten von 3,9 ‰/K an.The temperature voltage U T is proportional to the absolute temperature. The temperature coefficient is + 3.3 ‰ / K. If one chooses a resistor with the same temperature coefficient for the resistor R 1 , the arrangement is temperature compensated. It is even more favorable to choose the temperature coefficient of the resistance R 1 larger than the temperature coefficient of the temperature voltage U T in order to obtain a smaller and smaller output power as the temperature rises, ie also a lower power loss. A metal resistor with a temperature coefficient of 3.9 ‰ / K is ideal here.

Beim Ausführungsbeispiel nach Figur 2 ist die positive Betriebsstromleitung 10 abweichend vom Ausführungsbeispiel nach Figur 1 an den Kollektor des Ausgangstransistors T73 T8 angeschlossen, der seinerseits über die Last L mit der Plusklemme der Batterie verbunden ist. Die Bezugsstromquelle liegt wieder zwischen der positiven Betriebsstromleitung 10 und der negativen Betriebsstromleitung 9. Der Widerstand R1 liegt zwischen dem Emitter des Transistors T8 und der negativen Betriebsstromleitung 9. Die aneinander angeschlossenen Emitter der beiden Transistoren T8 und T9 sind über den Widerstand R3 mit dem Emitter des Transistors T1 verbunden, während vom Emitter des Transistors T1 ein Widerstand R2 zur positiven Betriebsstromleitung 10 führt. Durch die Einfügung der Widerstände R2 und R3 wird gegenüber dem Ausführungsbeispiel nach Figur 1 eine Verkleinerung des durch die Last L fließenden Stroms in Abhängigkeit von der zwischen den beiden Betriebsstromleitungen 9 und 10 liegenden Spannung erreicht.In the exemplary embodiment according to FIG. 2, in a departure from the exemplary embodiment according to FIG. 1, the positive operating current line 10 is connected to the collector of the output transistor T 73 T 8 , which in turn is connected to the positive terminal of the battery via the load L. The reference current source is again between the positive operating current line 10 and the negative operating current line 9. The resistor R 1 lies between the emitter of the transistor T 8 and the negative operating current line 9. The interconnected emitters of the two transistors T 8 and T 9 are via the resistor R. 3 connected to the emitter of the transistor T 1 , while a resistor R 2 leads from the emitter of the transistor T 1 to the positive operating current line 10. By inserting the resistors R 2 and R 3 , a reduction compared to the embodiment of Figure 1 of the current flowing through the load L as a function of the voltage between the two operating current lines 9 and 10.

Figur 3 zeigt eine weitere Variante einer erfindungsgemäßen Schaltungsanordnung. Der Aufbau entspricht weitgehend dem Ausführungsbeispiel nach den Figuren 1 und 2. Jedoch liegt die Last L in der Emitterzuleitung des Ausgangstransistors T7, T8, während dessen Kollektor an der positiven Batterieklemme liegt, an die die positivie Betriebsstromleitung 10 unmittelbar angeschlossen ist. Die Regelstrecke R1 der Bezugsstromquelle liegt zwischen dem Emitter des Ausgangstransistors T7, T8 und der Last L, wobei die negative Betriebsstromleitung 9 an die von der Regelstrecke R1 zur Last L führende Verbindungsleitung angeschlossen ist.Figure 3 shows a further variant of a circuit arrangement according to the invention. The structure largely corresponds to the exemplary embodiment according to FIGS. 1 and 2. However, the load L lies in the emitter lead of the output transistor T 7 , T 8 , while its collector is connected to the positive battery terminal to which the positive operating current line 10 is connected directly. The controlled system R 1 of the reference current source lies between the emitter of the output transistor T 7 , T 8 and the load L, the negative operating current line 9 being connected to the connecting line leading from the controlled system R 1 to the load L.

Bei den Ausführungsbeispielen nach den Figuren 4 und 5 ist im Gegensatz zu den Ausführungsbeispielen nach den Figuren 1 bis 3 das Potential der ersten Betriebsstromleitung 10 der Bezugsstromquelle nicht von dem Potential der Plusklemme der Batterie abgeleitet. Vielmehr ist dort die Betriebsstromleitung 10 von der Plusklemme der Batterie abgetrennt und statt dessen an einen äußeren Anschluß 20' angeschlossen, der als Steueranschluß der gesamten Schaltungsanordnung dient und anstelle des Anschlusses 20 als "Basis" des Ausgangstransistors T73 T8 wirkt. Diesem Anschluß 20' wird bei diesen Ausführungsbeispielen das der Basis 20 des Ausgangstransistors T7, T8 zuzuführende, zur Ansteuerung dieses Transistors dienende Steuersignal zugeführt. Die gesamte Schaltungsanordnung wirkt deshalb als modifizierter Darlingtontransistor.In the embodiments of Figures 4 and 5 in contrast to the embodiments according to Figures 1 to 3, the potential of the first operating current line is not derived 1 0 of the reference current source of the potential of the positive terminal of the battery. Rather, there the operating current line 10 is disconnected from the positive terminal of the battery and instead connected to an external connection 20 ', which serves as the control connection of the entire circuit arrangement and acts instead of the connection 20 as the "base" of the output transistor T 73 T 8 . In these exemplary embodiments, this connection 20 'is supplied with the control signal which is to be supplied to the base 20 of the output transistor T 7 , T 8 and is used to control this transistor. The entire circuit arrangement therefore acts as a modified Darlington transistor.

Bei den Ausführungsbeispielen nach den Figuren 4 und 5 ist ferner jeweils eine zum Anlaufen der Bezugsstromquelle dienende Anlaufschaltung vorgesehen, die aus den Schaltelementen T 101 T 11 und R4 besteht.In the exemplary embodiments according to FIGS. 4 and 5 there is also one for starting the reference current source Start-up circuit provided, which consists of the switching elements T 101 T 11 and R 4 .

Das Ausführungsbeispiel nach Figur 5 enthält ferner zur Stromrückregelung die bereits beim Ausführungsbeispiel nach Figur 2 verwendeten Widerstände R2, R3.The exemplary embodiment according to FIG. 5 also contains the resistors R 2 , R 3 already used in the exemplary embodiment according to FIG. 2 for current feedback control.

Zur Überspannungsabschaltung sind bei diesem Ausführungsbeispiel ferner die Schaltelemente R6, Z1, Z2, R5, T 12 und T 13 vorgesehen.In this embodiment, the switching elements R 6 , Z 1 , Z 2 , R 5 , T 12 and T 13 are also provided for overvoltage shutdown.

Die Wirkungsweise dieses Schaltungsteils ist folgende:

  • Ist die Kollektor-Emitter-Spannung des Ausgangstransistors T7, T8 kleiner als die Durchbruchsspannung der Zenerdiode Z1, so befindet sich die Schaltungsanordnung im Normalzustand, das heißt, der Strom wird auf den Wert
  • (7a) I2 =
    Figure imgb0010
    · ln
    Figure imgb0011
begrenzt. Liegt dagegen die Kollektor-Emitter-Spannung des Ausgangstransistors T7, T8 zwischen der Durchbruchsspannung der Zenerdiode Z1 und der Summe der Durchbruchsspannungen der beiden Zenerdioden Z1 und Z2, so findet eine Rückregelung des Stromes gemäß der anliegenden Kollektor-Emitter-Spannung statt. Liegt schließlich die Kollektor-Emitter-Spannung des Ausgangstransistors T7, T8 höher als die Summe der Durchbruchsspannungen der beiden Zenerdioden Z1 und Z2, so werden die Transistoren T12 und T13 leitend, so daß der Ansteuerstrom vom Kollektor des Transistors T6 zur negativen Leitung 9 abgeführt wird, d.h. der Ausgangstransistor T7, T8 gesperrt wird. Die Kollektor-Emitter-Spannung kann nun weiter ansteigen, ohne daß der Ausgangstransistor T7 T8 durch Überlastung zerstört wird, aber es ist
Figure imgb0012
The operation of this circuit part is as follows:
  • If the collector-emitter voltage of the output transistor T 7 , T 8 is less than the breakdown voltage of the Zener diode Z 1 , the circuit arrangement is in the normal state, that is, the current is at the value
  • (7a) I 2 =
    Figure imgb0010
    · Ln
    Figure imgb0011
limited. If, on the other hand, the collector-emitter voltage of the output transistor T 7 , T 8 lies between the breakdown voltage of the Zener diode Z 1 and the sum of the breakdown voltages of the two Zener diodes Z 1 and Z 2 , the current is readjusted in accordance with the applied collector-emitter voltage instead of. Finally, if the collector-emitter voltage of the output transistor T 7 , T 8 is higher than the sum of the breakdown voltages of the two Zener diodes Z 1 and Z 2 , the transistors T 12 and T 13 become conductive, so that the drive current from the collector of the transistor T 6 is discharged to the negative line 9, ie the output transistor T 7 , T 8 is blocked. The collector-emitter voltage can now rise further without the output transistor T 7 T 8 being over load is destroyed, but it is
Figure imgb0012

Der Widerstand R5 hat die Aufgabe, Sperrströme der Tran- sistoren T12 und T13 abzuleiten und die Zenerdioden Z1 und Z2 in einem definierten Arbeitspunkt zu betreiben. Durch entsprechende Wahl der Zenerspannungen kann die Überspannungsabschaltung bzw. der Einsatz der Rückregelung den verschiedenen Anwendungsfällen angepaßt werden.The resistor R 5 has the transit sis t e n T or derive the object, reverse currents 12 and T 13 and to operate the Zener diodes Z 1 and Z 2 in a defined operating point. The overvoltage cut-off or the use of reverse regulation can be adapted to the various applications by appropriately selecting the Zener voltages.

Claims (9)

1. Schaltungsanordnung mit einem mit seiner Emitter-Kollektor-Strecke in Reihe zu einer Last (L) und in Reihe zu einem ohmschen Widerstand (R1) liegenden Ausgangstransistor (T7, T8), bei der die äußeren Enden dieser Reihenschaltung mit einer ersten und einer zweiten Batterieklemme (+ bzw. -) verbunden sind, dadadurch gekennzeichnet, daß eine an sich bekannte Bezugsstromquelle mit von der Versorgungsspannung unabhängigem, mit einem Widerstand einstellbarem Auskoppelstrom (I1) vorgesehen ist, wobei dieser Widerstand durch den ohmschen Widerstand (R1) gebildet wird, und daß der Auskoppelstrom (I1) der Basis (20) des Ausgangstransistors (T7, T8) zugeführt wird.1. Circuit arrangement with an emitter-collector path in series with a load (L) and in series with an ohmic resistor (R 1 ) lying output transistor (T 7 , T 8 ), in which the outer ends of this series circuit with a The first and a second battery terminal (+ or -) are connected, characterized in that a known reference current source is provided with an outcoupling current (I 1 ) that is independent of the supply voltage and adjustable with a resistance, this resistance being determined by the ohmic resistance (R 1 ) is formed, and that the output current (I 1 ) of the base (20) of the output transistor (T 7 , T 8 ) is supplied. 2. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß der Ausgangstransistor (T7, T8) aus einem ersten Transistor (T8) und einem zweiten Transistor (T ) vom gleichen Leitungstyp wie der erste Transistor (T8) besteht, wobei der Kollektor des zweiten Transistors (T7) an den Kollektor des ersten Transistors (T8) und der Emitter des zweiten Transistors (T7) an die Basis des ersten Transistors (T8) angeschlossen ist und die Basis des zweiten Transistors (T7) den Steueranschluß (20) des Ausgangstransistors (T7, T8) bildet.2. Circuit arrangement according to claim 1, characterized in that the output transistor (T 7 , T 8 ) consists of a first transistor (T 8 ) and a second transistor (T) of the same conductivity type as the first transistor (T 8 ), the Collector of the second transistor (T 7 ) to the collector of the first transistor (T 8 ) and the emitter of the second transistor (T 7 ) to the base of the first transistor (T 8 ) and the base of the second transistor (T 7 ) forms the control terminal (20) of the output transistor (T 7 , T 8 ). 3. Schaltungsanordnung nach Anspruch 2, dadurch gekennzeichnet, daß ein dritter Transistor (T9) vom gleichen Leitungstyp wie der erste (T8) und der zweite Transistor (T7) vorgesehen ist, dessen Emitter-Basis-Strecke parallel zur Emitter-Basis-Strecke des ersten Transistors (T8) liegt und dessen Kollektor an die Basis des zweiten Transistors (T7) angeschlossen ist, so daß die drei Transistoren (T7, T82 T9) einen Stromspiegel bilden, dessen Eingang durch die Basis (20) des zweiten Transistors (T7) und dessen Ausgang durch die miteinander verbundenen Kollektoren des ersten (T8) und des zweiten Transistors (T7) gebildet wird.3. A circuit arrangement according to claim 2, characterized in that a third transistor (T 9 ) of the same conductivity type as the first (T 8 ) and the second transistor (T 7 ) is provided, whose emitter-base path parallel to the emitter base Section of the first transistor (T 8 ) and its collector is connected to the base of the second transistor (T 7 ), so that the three transistors (T 7 , T 82 T 9 ) form a current mirror, the input of which is through the base ( 20) of the second transistor (T 7 ) and its output is formed by the interconnected collectors of the first (T 8 ) and the second transistor (T 7 ). 4. Schaltungsanordnung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die Bezugsstromquelle zwischen einer ersten Betriebsstromleitung (10) und einer zweiten Betriebsstromleitung (9) angeordnet ist, wobei das Potential der zweiten Betriebsstromleitung (9) von dem Potential der zweiten Batterieklemme (-) abgeleitet ist.4. Circuit arrangement according to one of claims 1 to 3, characterized in that the reference current source between a first operating current line (10) and a second operating current line (9) is arranged, wherein the potential of the second operating current line (9) from the potential of the second battery terminal ( -) is derived. 5. Schaltungsanordnung nach Anspruch 4, bei der die Bezugsstromquelle einen vierten Transistor (T1) vom gleichen Leitungstyp wie der erste (T8), der zweite (T7) und der dritte Transistor (T9) enthält, dessen Emitter mit der Regelstrecke (R1) der Bezugsstromquelle verbunden ist, dadurch gekennzeichnet, daß zwischen den Emitter des vierten Transistors (T1) und die Regelstrecke (R1) ein zweiter Widerstand (R3) angeschlossen ist und daß am Emitter des vierten Transistors (T1) ein dritter Widerstand (R2) liegt, der mit seinem anderen Anschluß an ein von der ersten Batterieklemme (+) abgeleitetes Potential angeschlossen ist.5. Circuit arrangement according to claim 4, wherein the reference current source contains a fourth transistor (T 1 ) of the same conductivity type as the first (T 8 ), the second (T 7 ) and the third transistor (T 9 ), the emitter of which is connected to the controlled system (R 1 ) of the reference current source, characterized in that a second resistor (R 3 ) is connected between the emitter of the fourth transistor (T 1 ) and the controlled system (R 1 ) and that the emitter of the fourth transistor (T 1 ) there is a third resistor (R 2 ), the other connection of which is connected to a potential derived from the first battery terminal (+). 6. Schaltungsanordnung nach den Ansprüchen 2 und 5, dadurch gekennzeichnet, daß in die Verbindungsleitung zwischen dem dritten Widerstand (R2) und der ersten Batterieklemme (+) die Reihenschaltung aus einer ersten Zenerdiode (Z1) und einem vierten Widerstand (R6) gelegt ist, daß zwischen die zweite Betriebsstromleitung (9) und die Anode der ersten Zenerdiode (Z1) die Reihenschaltung aus einem fünften Widerstand (R5) und einer zweiten Zenerdiode (Z2) gelegt ist, daß an die Anode der zweiten Zenerdiode (Z2) jeweils die Basis eines fünften (T12) und eines sechsten Transistors (T13) vom Leitungstyp des ersten (T8) und des zweiten Transistors (T7) angeschlossen ist, wobei die Emitter dieser beiden Transistoren (T12, T13) jeweils an die zweite Betriebsstromleitung (9) angeschlossen sind, der Kollektor des fünften Transistors (T12) an die Basis des zweiten Transistors (T7) und der Kollektor des sechsten Transistors (T13) an die Basis des ersten Transistors (T8) angeschlossen ist.6. Circuit arrangement according to claims 2 and 5, characterized in that in the connecting line between the third resistor (R 2 ) and the first battery terminal (+), the series circuit comprising a first Zener diode (Z 1 ) and a fourth resistor (R 6 ) is placed between the second operating current line (9) and the anode of the first Zener diode (Z 1 ), the series circuit comprising a fifth resistor (R 5 ) and a second Zener diode (Z 2 ) is placed on the anode of the second Zener diode ( Z 2 ) the base of a fifth (T 12 ) and a sixth transistor (T 13 ) of the conductivity type of the first (T 8 ) and the second transistor (T 7 ) is connected, the emitters of these two transistors (T 12 , T 13 ) are each connected to the second operating current line (9), the collector of the fifth transistor (T 12 ) to the base of the second transistor (T 7 ) and the collector of the sixth transistor (T 13 ) to the base of the first transistor (T 8th ) connected. 7. Schaltungsanordnung nach einem der Ansprüche 4 bis 6, dadurch gekennzeichnet, daß das Potential der ersten Betriebsstromleitung (10) der Bezugsstromquelle von dem Potential der ersten Batterieklemme (+) abgeleitet ist (Figuren 1, 2 und 3).7. Circuit arrangement according to one of claims 4 to 6, characterized in that the potential of the first operating current line (10) of the reference current source is derived from the potential of the first battery terminal (+) (Figures 1, 2 and 3). 8. Schaltungsanordnung nach einem der Ansprüche 4 bis 6, dadurch gekennzeichnet, daß die erste Betriebsstromleitung (10) der Bezugsstromquelle an den Steueranschluß (20') der Schaltungsanordnung angeschlossen ist, dem das der Basis (20) des Ausgangstransistors (T7, T8) zuzuführende Steuersignal zuführbar ist (Figuren 4 und 5).8. Circuit arrangement according to one of claims 4 to 6, characterized in that the first operating current line (10) of the reference current source is connected to the control connection (20 ') of the circuit arrangement, to which the base (20) of the output transistor (T 7 , T 8 ) control signal to be supplied can be supplied (FIGS. 4 and 5). 9. Schaltungsanordnung nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß zwischen die Basis (20) und den Kollektor des Ausgangstransistors (T7, T8) ein Kondensator (13) gelegt ist.9. Circuit arrangement according to one of claims 1 to 8, characterized in that a capacitor (13) is placed between the base (20) and the collector of the output transistor (T 7 , T 8 ).
EP83109227A 1982-10-21 1983-09-17 Circuit arrangement with a transistor output circuit and a protection circuit for limiting the output current of the transistor output circuit Expired EP0107028B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3238880 1982-10-21
DE19823238880 DE3238880A1 (en) 1982-10-21 1982-10-21 CIRCUIT ARRANGEMENT

Related Child Applications (1)

Application Number Title Priority Date Filing Date
EP87118980.9 Division-Into 1983-09-17

Publications (3)

Publication Number Publication Date
EP0107028A2 true EP0107028A2 (en) 1984-05-02
EP0107028A3 EP0107028A3 (en) 1985-08-21
EP0107028B1 EP0107028B1 (en) 1989-01-18

Family

ID=6176179

Family Applications (2)

Application Number Title Priority Date Filing Date
EP87118980A Expired - Lifetime EP0281684B1 (en) 1982-10-21 1983-09-17 Over-voltage-protected darlington switch
EP83109227A Expired EP0107028B1 (en) 1982-10-21 1983-09-17 Circuit arrangement with a transistor output circuit and a protection circuit for limiting the output current of the transistor output circuit

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP87118980A Expired - Lifetime EP0281684B1 (en) 1982-10-21 1983-09-17 Over-voltage-protected darlington switch

Country Status (5)

Country Link
US (1) US4567537A (en)
EP (2) EP0281684B1 (en)
JP (1) JPS5991715A (en)
DE (3) DE3238880A1 (en)
ES (1) ES8502297A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214745A (en) * 1988-01-29 1989-09-06 Hitachi Ltd Solid state current sensing circuit and protection circuit
EP0639894A1 (en) * 1993-08-18 1995-02-22 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Circuit for limiting the maximum current supplied to a load by a power transistor
US6396249B1 (en) 1999-09-30 2002-05-28 Denso Corporation Load actuation circuit

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3424003A1 (en) * 1984-06-29 1986-01-02 Robert Bosch Gmbh, 7000 Stuttgart Circuit arrangement
GB2163614A (en) * 1984-08-22 1986-02-26 Philips Electronic Associated Battery economising circuit
DE3512563A1 (en) * 1985-04-06 1986-10-16 Robert Bosch Gmbh, 7000 Stuttgart CIRCUIT ARRANGEMENT FOR LIMITING THE PERFORMANCE OF SHORT-CIRCUIT-PROOF AMPLIFIERS
US4672302A (en) * 1986-03-06 1987-06-09 Rca Corporation Circuit for controlling the load current level in a transistor
DE3744756A1 (en) * 1987-07-07 1989-01-26 Ifm Electronic Gmbh Constant-current generator
DE3802767A1 (en) * 1988-01-30 1989-08-10 Bosch Gmbh Robert ELECTRONIC DEVICE
US4786855A (en) * 1988-02-04 1988-11-22 Linear Technology Inc. Regulator for current source transistor bias voltage
US4851759A (en) * 1988-05-26 1989-07-25 North American Philips Corporation, Signetics Division Unity-gain current-limiting circuit
US5027016A (en) * 1988-12-29 1991-06-25 Motorola, Inc. Low power transient suppressor circuit
DE3919950C1 (en) * 1989-06-19 1990-10-31 Telefunken Electronic Gmbh, 7100 Heilbronn, De Circuit for central and current monitoring - has collector-emitter path of transistor and loud coupled across DC supply
US5262713A (en) * 1991-01-31 1993-11-16 Texas Instruments Incorporated Current mirror for sensing current
EP0574070B9 (en) * 1992-06-10 2002-08-28 Koninklijke Philips Electronics N.V. Interface circuit for linking microprocessors
US5351336A (en) * 1992-07-17 1994-09-27 Wilkerson A W Motor control having improved speed regulation under intermittent loading
US5367600A (en) * 1992-07-21 1994-11-22 Wilkerson A W Motor control for a treadmill having improved power supply and improved speed regulation under intermittent loading
JP2635277B2 (en) * 1992-12-01 1997-07-30 三菱電機株式会社 Sensor unit control system
EP0606160A1 (en) * 1993-01-08 1994-07-13 National Semiconductor Corporation Protection circuit used for deactivating a transistor during a short circuit having an inductive component
US5504448A (en) * 1994-08-01 1996-04-02 Motorola, Inc. Current limit sense circuit and method for controlling a transistor
US5672962A (en) * 1994-12-05 1997-09-30 Texas Instruments Incorporated Frequency compensated current output circuit with increased gain
US5734260A (en) * 1996-08-26 1998-03-31 Telcom Semiconductor, Inc. Short-circuit protection circuit
JP3444263B2 (en) * 2000-03-30 2003-09-08 株式会社日立製作所 Insulated gate semiconductor device with built-in control circuit
US8125695B2 (en) * 2003-03-24 2012-02-28 Hewlett-Packard Development Company, L.P. Imaging system and method
DE102015103247A1 (en) 2015-03-05 2016-09-08 Ge Energy Power Conversion Technology Limited Switch module with short-circuit protection and power electronics module with this
CN108664075B (en) * 2017-04-01 2024-02-23 无锡友达电子有限公司 Power output stage with unique short circuit protection

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3792316A (en) * 1972-05-15 1974-02-12 Soc Gen Semiconduttori Spa Protection device for a power element of an integrated circuit
FR2301948A1 (en) * 1975-02-22 1976-09-17 Itt Transistor circuit with internal overload and shorting protection - consisting of internal emitter series resistor and internal turn-off circuit
GB2042297A (en) * 1979-01-29 1980-09-17 Rca Corp Overcurrent protection circuit for power transistor
WO1982001105A1 (en) * 1980-09-22 1982-04-01 Western Electric Co Current source with modified temperature coefficient
US4359652A (en) * 1980-07-07 1982-11-16 Motorola, Inc. Over voltage detection circuit for use in electronic ignition systems

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3796943A (en) * 1973-01-02 1974-03-12 Nat Semiconductor Corp Current limiting circuit
US4177416A (en) * 1978-03-09 1979-12-04 Motorola, Inc. Monolithic current supplies having high output impedances
US4282478A (en) * 1978-10-03 1981-08-04 Rca Corporation Reference current supply circuits
DE3015831C2 (en) * 1980-04-24 1982-06-24 Werner Messmer Gmbh & Co Kg, 7760 Radolfzell Electronic switch for high load currents, especially for the lamp circuit of motor vehicles
US4338646A (en) * 1981-04-27 1982-07-06 Motorola, Inc. Current limiting circuit
DE3146600A1 (en) * 1981-11-25 1983-07-07 Robert Bosch Gmbh, 7000 Stuttgart Ring current source

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3792316A (en) * 1972-05-15 1974-02-12 Soc Gen Semiconduttori Spa Protection device for a power element of an integrated circuit
FR2301948A1 (en) * 1975-02-22 1976-09-17 Itt Transistor circuit with internal overload and shorting protection - consisting of internal emitter series resistor and internal turn-off circuit
GB2042297A (en) * 1979-01-29 1980-09-17 Rca Corp Overcurrent protection circuit for power transistor
US4359652A (en) * 1980-07-07 1982-11-16 Motorola, Inc. Over voltage detection circuit for use in electronic ignition systems
WO1982001105A1 (en) * 1980-09-22 1982-04-01 Western Electric Co Current source with modified temperature coefficient

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ELECTRONICS, Band 47, Nr. 3, 7. Februar 1974, Seiten 119-123, New York, US; R.C. DOBKIN: "IC with load protection simulates power transistor" *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214745A (en) * 1988-01-29 1989-09-06 Hitachi Ltd Solid state current sensing circuit and protection circuit
US5008586A (en) * 1988-01-29 1991-04-16 Hitachi, Ltd. Solid state current sensing circuit and protection circuit
GB2214745B (en) * 1988-01-29 1992-09-02 Hitachi Ltd Current sensing circuit for a power semiconductor device
EP0639894A1 (en) * 1993-08-18 1995-02-22 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Circuit for limiting the maximum current supplied to a load by a power transistor
US5635868A (en) * 1993-08-18 1997-06-03 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Power transistor current limiter
US6396249B1 (en) 1999-09-30 2002-05-28 Denso Corporation Load actuation circuit

Also Published As

Publication number Publication date
JPS5991715A (en) 1984-05-26
EP0107028B1 (en) 1989-01-18
ES526676A0 (en) 1984-12-16
US4567537A (en) 1986-01-28
EP0281684A1 (en) 1988-09-14
DE3382062D1 (en) 1991-01-24
DE3238880A1 (en) 1984-04-26
JPH0469445B2 (en) 1992-11-06
EP0281684B1 (en) 1990-12-12
EP0107028A3 (en) 1985-08-21
ES8502297A1 (en) 1984-12-16
DE3379016D1 (en) 1989-02-23

Similar Documents

Publication Publication Date Title
EP0281684B1 (en) Over-voltage-protected darlington switch
DE1813326C3 (en) Integrated circuit for biasing the base-emitter path of a transistor using a temperature-dependent bias
EP0160836B1 (en) Temperature sensor
DE2207233C3 (en) Electronic signal amplifier
DE3537920C2 (en) Stabilizer with protection against transient overvoltages, the polarity of which is opposite to the polarity of the generator, in particular for use in motor vehicles
DE3447002C2 (en)
DE2045768B2 (en) Control device for an alternator
EP0570821B1 (en) Active free-wheeling element
DE2200580C3 (en) Differential amplifier comparison circuit
DE2924171C2 (en)
DE1126496B (en) Current regulator to maintain a constant direct current
DE1075746B (en) Device for temperature compensation of a flat transistor
DE3723579C1 (en) Longitudinal voltage regulator
DE2813073A1 (en) DISCRIMINATOR CIRCUIT
DE2233612B2 (en) Output stage for a test signal generator
EP0048490B1 (en) Circuit arrangement for transforming a binary input signal into a telegraphy signal
DE3021890C2 (en)
DE3539848C2 (en)
DE2344447B2 (en) Power supply devices, in particular for motor vehicles
DE1638010C3 (en) Solid-state circuit for reference amplifiers
DE1275198B (en) Transistor bridge inverter
DE2637500C2 (en) Power amplifier for amplifying electrical voltages
DE3010145A1 (en) AMPLIFIER CIRCUIT
CH619086A5 (en)
DE1934223A1 (en) Circuit arrangement for generating a stabilized DC voltage

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19830917

AK Designated contracting states

Designated state(s): DE FR GB

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 19870217

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)
REF Corresponds to:

Ref document number: 3379016

Country of ref document: DE

Date of ref document: 19890223

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20010828

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20010925

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20011128

Year of fee payment: 19

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20020917

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20030401

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20020917

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20030603

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST